KVM: arm64: vgic-v3: Limit IPI-ing when accessing GICR_{C,S}ACTIVER0

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When a vcpu is accessing *its own* redistributor's SGIs/PPIs, there
is no point in doing a stop-the-world operation. Instead, we can
just let the access occur as we do with GICv2.

This is a very minor optimisation for a non-nesting guest, but
a potentially major one for a nesting L1 hypervisor which is
likely to access the emulated registers pretty often (on each
vcpu switch, at the very least).

Reported-by: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230112154840.1808595-1-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>

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Marc Zyngier 2023-01-12 15:48:40 +00:00 • committed by Oliver Upton

parent 59d78a2ec0

commit fd2b165ce2

1 changed files with 8 additions and 5 deletions

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arch/arm64/kvm/vgic/vgic-mmio.c

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