riscv: csr: define vtype register elements

Browse source

Define masks and shifts for vtype CSR according to the vector specs:
- v0.7.1 used in early T-Head cores, known as xtheadvector in the kernel
- v1.0

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
Reviewed-by: Andy Chiu <andybnac@gmail.com>
Tested-by: Andy Chiu <andybnac@gmail.com>
Link: https://patch.msgid.link/20251214163537.1054292-4-geomatsi@gmail.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>

...

This commit is contained in:

Sergey Matyukevich 2026-01-25 21:09:57 -07:00 • committed by Paul Walmsley

parent ef3ff40346

commit fd515e037e

1 changed files with 17 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

17

arch/riscv/include/asm/csr.h

View file