ARM: dts: r8a7793: Add L2 cache-controller node

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Add a device node for the L2 cache, and link the CPU node to it.

The L2 cache for the Cortex-A15 CPU cores is 1 MiB large (organized as
64 KiB x 16 ways).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

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Geert Uytterhoeven 2015-06-03 10:36:39 +02:00 • committed by Simon Horman

parent 8ffe93a5b2

commit fdd0dbd8a2

1 changed files with 7 additions and 0 deletions

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