ARM: dts: aspeed: Add silicon id node

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This register describes the silicon id and chip unique id. It varies
between CPU revisions, but is always part of the SCU.

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20200921091644.133107-4-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>

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Joel Stanley 2020-09-21 18:46:44 +09:30

parent e0218dca57

commit fe100b382c

3 changed files with 15 additions and 0 deletions

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arch/arm/boot/dts/aspeed-g4.dtsi

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arch/arm/boot/dts/aspeed-g5.dtsi

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arch/arm/boot/dts/aspeed-g6.dtsi

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