arm64: dts: amlogic: Add cache information to the Amlogic GXM SoCS

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As per the GXM datasheet add missing cache information to the Amlogic GXM
SoC.

- Each Cortex-A53 core has 32KB of L1 instruction cache available and
	32KB of L1 data cache available.
- Along with 512KB Unified L2 cache.

Cache memory significantly reduces the time it takes for the CPU
to access data and instructions, leading to faster program execution
and overall system responsiveness.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20250825065240.22577-6-linux.amoon@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

...

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Anand Moon 2025-08-25 12:21:45 +05:30 • committed by Neil Armstrong

parent 3b6ad2a433

commit fe2c12bc0a

1 changed files with 24 additions and 0 deletions

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arch/arm64/boot/dts/amlogic/meson-gxm.dtsi

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