x86: Don't setup ioapic irq for sci twice

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The sparseirq rework triggered a warning in the iommu code, which was
caused by setting up ioapic for ACPI irq 9 twice. This function is
solely to handle interrupts which are on a secondary ioapic and
outside the legacy irq range.

Replace the sparse irq_to_desc check with a non ifdeffed version.

[ tglx: Moved it before the ioapic sparse conversion and simplified
  	the inverse logic ]

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <4CB00122.3030301@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ingo Molnar <mingo@elte.hu>

...

This commit is contained in:

Yinghai Lu 2010-10-08 22:44:02 -07:00 • committed by Thomas Gleixner

parent f981a3dc19

commit fe6dab4e79

1 changed files with 4 additions and 4 deletions

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arch/x86/kernel/apic/io_apic.c

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