drm/meson: Add support for VIC alternate timings

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This change is an attempt to handle the alternate clock for the CEA mode.
60Hz vs. 59.94Hz, 30Hz vs 29.97Hz or 24Hz vs 23.97Hz on the Amlogic Meson SoC
DRM Driver pixel clock generation.

The actual clock generation will be moved to the Common Clock framework once
all the video clock are handled by the Amlogic Meson SoC clock driver,
then these alternate timings will be handled in the same time in a cleaner
fashion.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Maxime Jourdan <mjourdan@baylibre.com>
[narmstrong: fix maybe-uninitialized warnings after applying]
Link: https://patchwork.freedesktop.org/patch/msgid/1541501675-3928-1-git-send-email-narmstrong@baylibre.com

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This commit is contained in:

Neil Armstrong 2018-11-06 11:54:35 +01:00

parent 5d0bfe4484

commit ff217bc710

3 changed files with 89 additions and 52 deletions

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12

drivers/gpu/drm/meson/meson_dw_hdmi.c

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127

drivers/gpu/drm/meson/meson_vclk.c

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2

drivers/gpu/drm/meson/meson_vclk.h

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