ASoC: mediatek: mt8195: enable apll tuner

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Normally, the clock source of audio module is either 26M or APLL1/APLL2,
but APLL1/APLL2 are not the multiple of 26M.

In the patch, APLL1 and APLL2 tuners are enabled to handle sample rate
mismatch when the data path crosses two different clock domains.

Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Link: https://lore.kernel.org/r/20220221055716.18580-1-trevor.wu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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Trevor Wu 2022-02-21 13:57:16 +08:00 • committed by Mark Brown

parent b9afe038b1

commit ff5a90173d

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3 changed files with 292 additions and 4 deletions

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282

sound/soc/mediatek/mt8195/mt8195-afe-clk.c

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sound/soc/mediatek/mt8195/mt8195-afe-clk.h

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3

sound/soc/mediatek/mt8195/mt8195-afe-pcm.c

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