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546,446 commits

Author SHA1 Message Date
Markos Chandras
4e88a86213 MIPS: Add cases for CPU_I6400
Add a CPU_I6400 case to various switch statements, doing the same thing
as for CPU_P5600.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10635/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-08-26 15:23:03 +02:00
Markos Chandras
90b8baa2c1 MIPS: Add MIPS I6400 PRid and cputype identifiers
Add a Processor ID and CPU type for the MIPS I6400 core.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10634/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-08-26 15:23:02 +02:00
Alban Bedel
7653716bf9 MIPS: ath79: irq: IRQCHIP_DECLARE moved to linux/irqchip.h
Remove the ugly cross tree include now that IRQCHIP_DECLARE moved to
linux/irqchip.h.

Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10633/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-08-26 15:23:02 +02:00
Julia Lawall
a0c81ce087 gpio: xlp: fix error return code
Return a negative error code on failure.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@@
identifier ret; expression e1,e2;
@@
(
if (\(ret < 0\|ret != 0\))
 { ... return ret; }
|
ret = 0
)
... when != ret = e1
    when != &ret
*if(...)
{
  ... when != ret = e2
      when forall
 return ret;
}
// </smpl>

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 14:49:23 +02:00
Stefan Agner
fd96811576 gpio: vf610: handle level IRQ's properly
The GPIO IRQ controller is able to generate level triggered
interrupts, however, these were handled by handle_simple_irq so far
which did not take care of IRQ masking. This lead to "nobody cared
(try booting with the "irqpoll" option)" stack traces.

Use the generic interrupt handlers depending on the IRQ type.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 14:45:11 +02:00
Maoguang Meng
58a5e1b64b pinctrl: mediatek: Implement wake handler and suspend resume
This patch implement irq_set_wake to get who is wakeup source and
setup on suspend resume.

Signed-off-by: Maoguang Meng <maoguang.meng@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Acked-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 14:39:43 +02:00
Hongzhou Yang
d48c2c0264 pinctrl: mediatek: Fix multiple registration issue.
Since our common driver need support main chip and PMU
at the same time, that means it will register two
pinctrl device, and the pinctrl_desc structure should
be used two times.

But pinctrl_desc use global static definition, then
the latest registered pinctrl device will overwrite
the old one's, all members in pinctrl_desc will set to
the new one's, such as name, pins and pins numbers, etc.
This is a bug.

Move pinctrl_desc into mtk_pinctrl, assign new value for
each pinctrl device to fix it.

Cc: stable@vger.kernel.org # v4.1+
Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Reviewed-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 14:37:44 +02:00
Takashi Iwai
b25cf30a01 ALSA: hda - Remove superfluous pcm NULL check
The variable pcm can be never NULL since it was rewritten with
list_for_each_entry().

Suggested-by: Markus Osterhoff <linux-kernel@k-raum.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-08-26 14:21:14 +02:00
kbuild test robot
1c0beb2744 ASoC: rockchip: fix platform_no_drv_owner.cocci warnings
sound/soc/rockchip/rockchip_rt5645.c:214:3-8: No need to set .owner here. The core will do it.

 Remove .owner field if calls are used which set it automatically

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-26 13:01:02 +01:00
kbuild test robot
0137d5ff84 ASoC: rockchip: fix platform_no_drv_owner.cocci warnings
sound/soc/rockchip/rockchip_max98090.c:225:3-8: No need to set .owner here. The core will do it.

 Remove .owner field if calls are used which set it automatically

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci

Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-26 13:00:59 +01:00
Guilherme G. Piccoli
4d9aac397a powerpc/PCI: Disable MSI/MSI-X interrupts at PCI probe time in OF case
Since commit 1851617cd2 ("PCI/MSI: Disable MSI at enumeration even if
kernel doesn't support MSI"), the setup of dev->msi_cap/msix_cap and the
disable of MSI/MSI-X interrupts isn't being done at PCI probe time, as
the logic responsible for this was moved in the aforementioned commit
from pci_device_add() to pci_setup_device(). The latter function is not
reachable on PowerPC pseries platform during Open Firmware PCI probing
time.

This exhibits as drivers not being able to enable MSI, eg:

  bnx2x 0000:01:00.0: no msix capability found

This patch calls pci_msi_setup_pci_dev() explicitly to disable MSI/MSI-X
during PCI probe time on pSeries platform.

Fixes: 1851617cd2 ("PCI/MSI: Disable MSI at enumeration even if kernel doesn't support MSI")
[mpe: Flesh out change log and clarify comment]
Signed-off-by: Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-08-26 21:40:50 +10:00
Guilherme G. Piccoli
22b6839b91 PCI: Make pci_msi_setup_pci_dev() non-static for use by arch code
Commit 1851617cd2 ("PCI/MSI: Disable MSI at enumeration even if kernel
doesn't support MSI") changed the location of the code that initialises
dev->msi_cap/msix_cap and then disables MSI/MSI-X interrupts at PCI
probe time in devices that have this flag set. It moved the code from
pci_msi_init_pci_dev() to a new function named pci_msi_setup_pci_dev(),
called by pci_setup_device().

The pseries PCI probing code does not call pci_setup_device(), so since
the aforementioned commit the function pci_msi_setup_pci_dev() is not
called and MSI/MSI-X interrupts are left enabled. Additionally because
dev->msi_cap/msix_cap are not initialised no driver can ever enable
MSI/MSI-X.

To fix this, the pseries PCI probe should manually call
pci_msi_setup_pci_dev(), so this patch makes it non-static.

Fixes: 1851617cd2 ("PCI/MSI: Disable MSI at enumeration even if kernel doesn't support MSI")
[mpe: Update change log to mention dev->msi_cap/msix_cap]
Signed-off-by: Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-08-26 21:40:49 +10:00
Shinobu Uehara
580a7ee933 pinctrl: sh-pfc: r8a7794: add USB pin groups
Add USB0/1 pin groups to R8A7794 PFC driver.

Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[Sergei: rebased, renamed, added changelog.]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 13:40:25 +02:00
Nicholas Krause
78de5d5220 gpio: max732x: Fix error handling in probe()
This fixes error handling in the function max732x_probe by checking
if the calls to the function max732x_readb fail by returning a error
code.

Signed-off-by: Nicholas Krause <xerofoify@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 13:34:55 +02:00
Xing Zheng
f8ce20005d ASoC: rockchip: fix a misjudgement by return
Being careless, judge the return value of snd_soc_card_jack_new
is opposite, so it should be fixed.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-26 12:13:19 +01:00
Kalle Valo
0ba3ac03c1 Merge ath-next from ath.git
Major changes in ath10k:

* add spectral scan support for qca99x0
* add qca6164 support
2015-08-26 12:40:23 +03:00
Raja Mani
ee92a2099f ath10k: fix compilation warnings in wmi phyerr pull function
Below compilation warnings are observed in gcc version 4.8.2.
Even though it's not seen in bit older gcc versions (for ex, 4.7.3),
It's good to fix it by changing format specifier from %d to
%zd in wmi pull phyerr functions.

wmi.c: In function 'ath10k_wmi_op_pull_phyerr_ev':
wmi.c:3567:8: warning: format '%d' expects argument of type 'int',
              but argument 4 has type 'long unsigned int' [-Wformat=]
              left_len, sizeof(*phyerr));
                        ^
wmi.c: In function 'ath10k_wmi_10_4_op_pull_phyerr_ev':
wmi.c:3612:8: warning: format '%d' expects argument of type 'int',
	      but argument 4 has type 'long unsigned int' [-Wformat=]
              left_len, sizeof(*phyerr));
                        ^
Fixes: 991adf71a6 ("ath10k: refactor phyerr event handlers")
Fixes: 2b0a2e0d7c ("ath10k: handle 10.4 firmware phyerr event")
Signed-off-by: Raja Mani <rmani@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-26 12:33:52 +03:00
Mike Marciniszyn
a9dd941d84 kbuild: avoid listing /lib/modules in kernel spec file
This causes conflicts when using multiple kernels built
with this mechanism.

Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Michal Marek <mmarek@suse.com>
2015-08-26 11:26:35 +02:00
Michal Kazior
36582e5d4d ath10k: add qca6164 support
This adds additional 0x0041 PCI Device ID
definition to ath10k for QCA6164 which is a 1
spatial stream sibling of the QCA6174 (which is 2
spatial stream chip).

The QCA6164 needs a dedicated board.bin file which
is different than the one used for QCA6174. If the
board.bin is wrong the device will crash early
while trying to boot firmware. The register dump
will look like this:

 ath10k_pci 0000:02:00.0: firmware register dump:
 ath10k_pci 0000:02:00.0: [00]: 0x05010000 0x000015B3 0x000A012D 0x00955B31
 ...

Note the value 0x000A012D.

Special credit goes to Alan Liu
<alanliu@qca.qualcomm.com> for providing support
help which enabled me to come up with this patch.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-26 12:07:23 +03:00
Raja Mani
4535edbd42 ath10k: add spectral scan support for 10.4 fw
To enable/configure spectral scan parameters in 10.4 firmware, existing
wmi spectral related functions can be reused. Link those functions in
10.4 wmi ops table.

In addition, adjust bin size (only when size is 68 bytes) before reporting
bin samples to user space. The background for this adjustment is that
qca99x0 reports bin size as 68 bytes (64 bytes + 4 bytes) in report
mode 2. First 64 bytes carries in-band tones (-32 to +31) and last 4 byte
carries band edge detection data (+32) mainly used in radar detection
purpose. Additional last 4 bytes are stripped to make bin size valid one.

This bin size adjustment will happen only for qca99x0, all other chipsets
will report proper bin sizes (64/128) without extra 4 bytes being added
at the end. The changes are validated in qca99x0 using 10.4 firmware.

Signed-off-by: Raja Mani <rmani@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-26 11:09:12 +03:00
Michal Kazior
5e55e3cbd1 ath10k: fix dma_mapping_error() handling
The function returns 1 when DMA mapping fails. The
driver would return bogus values and could
possibly confuse itself if DMA failed.

Fixes: 767d34fc67 ("ath10k: remove DMA mapping wrappers")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-26 11:04:44 +03:00
Michal Kazior
503422d952 ath10k: add missing mutex unlock on failpath
Kernel would complain about leaving a held lock
after going back to userspace and would
subsequently deadlock.

Fixes: e04cafbc38 ("ath10k: fix peer limit enforcement")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-26 11:04:26 +03:00
Grygorii Strashko
5d9452e7c5 gpio: omap: fix clk_prepare/unprepare usage
As per CCF documentation (clk.txt) the clk_prepare/unprepare APIs
are not allowed in atomic context. But now OMAP GPIO driver
uses them while applying debounce settings and as part
of PM runtime irqsafe operations:

- omap_gpio_debounce() is holding the lock with IRQs off.
  + omap2_set_gpio_debounce()
   + clk_prepare_enable()
    + clk_prepare() this one might sleep.

- pm_runtime_get_sync() is holding the lock with IRQs off
  + omap_gpio_runtime_suspend()
    + raw_spin_lock_irqsave()
    + omap_gpio_dbck_disable()
      + clk_disable_unprepare()

Hence, fix it by moeving dbclk prepare/unprepare in OMAP GPIO
omap_gpio_probe/omap_gpio_remove. Also, while here, ensure that
debounce functionality is disabled if clk_get() failed,
because otherwise kernel will carsh in omap2_set_gpio_debounce().

Reported-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 09:52:57 +02:00
Grygorii Strashko
235f1eb1ab gpio: omap: protect regs access in omap_gpio_irq_handler
The access to HW registers has to be be protected in
omap_gpio_irq_handler(), as it may race with code executed on
another CPUs.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 09:52:53 +02:00
Grygorii Strashko
e85ec6c304 gpio: omap: fix omap2_set_gpio_debounce
According to TRMs:

Required input line stable =
  (the value of the GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME + 1) × 31,
where the value of the GPIO_DEBOUNCINGTIME[7:0].DEBOUNCETIME bit field
is from 0 to 255.

But now omap2_set_gpio_debounce() will calculate debounce time and
behave incorrectly in the following cases:
1) requested debounce time is !0 and <32
   calculated DEBOUNCETIME = 0x1 == 62 us;
   expected value of DEBOUNCETIME = 0x0 == 31us
2) requested debounce time is 0
   calculated DEBOUNCETIME = 0x1 == 62 us;
   expected: disable debounce and DEBOUNCETIME = 0x0
3) requested debounce time is >32 and <63
   calculated DEBOUNCETIME = 0x0 and debounce will be disabled;
   expected: enable debounce and DEBOUNCETIME = 0x1 == 62 us

Hence, rework omap2_set_gpio_debounce() to fix above cases:
1) introduce local variable "enable" and use it to identify
when debounce need to be enabled or disabled. Disable debounce
if requested debounce time is 0.
2) use below formula for debounce time calculation:
   debounce = (DIV_ROUND_UP(debounce, 31) - 1) & 0xFF;

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 09:52:48 +02:00
Grygorii Strashko
89d18e3af8 gpio: omap: switch to use platform_get_irq
Switch OMAP GPIO driver to use platform_get_irq(), because
it is not recommened to use platform_get_resource(pdev, IORESOURCE_IRQ, ..)
for requesting IRQ resources any more, as they can be not ready yet
in case of DT-boot.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 09:52:43 +02:00
Grygorii Strashko
bb8cdf9510 gpio: omap: remove wrong irq_domain_remove usage in probe
The bank->chip.irqdomain is uninitialized at the moment when
irq_domain_remove() is called, so remove this call.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 09:51:26 +02:00
Geert Uytterhoeven
91d33cfedf pinctrl: at91: Use generic irq_{request,release}_resources()
The at91-specific irq_{request,release}_resources() callbacks are
identical to the generic ones, modulo the bug fix in 5b76e79c77
("gpiolib: irqchip: prevent driver unloading if gpio is used as irq
only").

Until commit 8b67a1f0ad ("gpio: don't override irq_*_resources()
callbacks"), the buggy at91-specific callbacks were never used, though.

Hence drop the at91-specific ones in favor of the generic ones.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 09:32:20 +02:00
Grygorii Strashko
41d6bb4c89 gpiolib: add description for gpio irqchip fields in struct gpio_chip
Add missed description for GPIO irqchip fields in struct gpio_chip.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 09:29:50 +02:00
Mika Westerberg
109fdf1572 pinctrl: cherryview: Use raw_spinlock for locking
When running -rt kernel and an interrupt happens on a GPIO line controlled by
Intel Cherryview/Braswell pinctrl driver we get:

 BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917
 in_atomic(): 1, irqs_disabled(): 1, pid: 0, name: swapper/0
 Preemption disabled at:[<ffffffff81092e9f>] cpu_startup_entry+0x17f/0x480

 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.1.5-rt5 #16
  ...
 Call Trace:
  <IRQ>  [<ffffffff816283c6>] dump_stack+0x4a/0x61
  [<ffffffff81077e17>] ___might_sleep+0xe7/0x170
  [<ffffffff8162d6cf>] rt_spin_lock+0x1f/0x50
  [<ffffffff812e52ed>] chv_gpio_irq_ack+0x3d/0xa0
  [<ffffffff810a72f5>] handle_edge_irq+0x75/0x180
  [<ffffffff810a3457>] generic_handle_irq+0x27/0x40
  [<ffffffff812e57de>] chv_gpio_irq_handler+0x7e/0x110
  [<ffffffff810050aa>] handle_irq+0xaa/0x190
  ...

This is because desc->lock is raw_spinlock and is held when chv_gpio_irq_ack()
is called by the genirq core. chv_gpio_irq_ack() in turn takes pctrl->lock
which in -rt is an rt-mutex causing might_sleep() rightfully to complain about
sleeping function called from invalid context.

In order to keep -rt happy but at the same time make sure that register
accesses get serialized, convert the driver to use raw_spinlock instead.

Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 09:27:39 +02:00
Mika Westerberg
78e1c89693 pinctrl: baytrail: Use raw_spinlock for locking
The Intel Baytrail pinctrl driver implements irqchip callbacks which are
called with desc->lock raw_spinlock held. In mainline this is fine because
spinlock resolves to raw_spinlock. However, running the same code in -rt we
get:

 BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917
 in_atomic(): 1, irqs_disabled(): 1, pid: 0, name: swapper/0
 Preemption disabled at:[<ffffffff81092e9f>] cpu_startup_entry+0x17f/0x480

 CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.1.5-rt5 #13
  ...
 Call Trace:
  <IRQ>  [<ffffffff816283c6>] dump_stack+0x4a/0x61
  [<ffffffff81077e17>] ___might_sleep+0xe7/0x170
  [<ffffffff8162d6cf>] rt_spin_lock+0x1f/0x50
  [<ffffffff812e3b88>] byt_gpio_clear_triggering+0x38/0x60
  [<ffffffff812e3bc1>] byt_irq_mask+0x11/0x20
  [<ffffffff810a7013>] handle_level_irq+0x83/0x150
  [<ffffffff810a3457>] generic_handle_irq+0x27/0x40
  [<ffffffff812e3a5f>] byt_gpio_irq_handler+0x7f/0xc0
  [<ffffffff810050aa>] handle_irq+0xaa/0x190
  ...

This is because in -rt spinlocks are preemptible so taking the driver
private spinlock in irqchip callbacks causes might_sleep() to trigger.

In order to keep -rt happy but at the same time make sure that register
accesses get serialized, convert the driver to use raw_spinlock instead.

Also shorten the critical section a bit in few places.

Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-26 09:25:33 +02:00
Xiong Zhang
26951caf55 drm/i915/skl: enable DDI-E hotplug
v2: fix one error found by checkpath.pl
v3: Add one ignored break for switch-case. DDI-E hotplug
    function doesn't work after updating drm-intel tree,
    I checked the code and found this missing which isn't
    the root cause for broke DDI-E hp.  The broken
    DDI-E hp function is fixed by "Adding DDI_E power
    well domain".

Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Timo Aaltonen <timo.aaltonen@canonical.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-08-26 10:24:25 +03:00
Chen Yu
2508a45a92 surface pro 3: Add support driver for Surface Pro 3 buttons
Since Surface Pro 3 does not follow the specs of "Windows ACPI Design
Guide for SoC Platform", code in drivers/input/misc/soc_array.c can
not detect these buttons on it. According to bios implementation,
Surface Pro 3 encapsulates these buttons in a device named "VGBI",
with _HID "MSHW0028". When any of the buttons is pressed, a specify
ACPI notification code for this button will be delivered to "VGBI". For
example, if power button is pressed down, ACPI notification code of 0xc6
will be sent by Notify(VGBI, 0xc6).

This patch leverages "VGBI" to distinguish different ACPI notification
code from Power button, Home button, Volume button, then dispatches these
code to input layer. Lid is already covered by acpi button driver, so
there's no need to rewrite.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=84651
Tested-by: Ethan Schoonover <es@ethanschoonover.com>
Tested-by: Peter Amidon <psa.pub.0@picnicpark.org>
Tested-by: Donavan Lance <tusklahoma@gmail.com>
Tested-by: Stephen Just <stephenjust@gmail.com>
Signed-off-by: Chen Yu <yu.c.chen@intel.com>
[dvhart@linux.intel.com: Formatting corrections in MAINTAINERS and Intel (c)]
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
2015-08-26 00:21:27 -07:00
Thierry Reding
8e9d597a37 drm/i915: Fix build warning on 32-bit
The gtt.stolen_size field is of type size_t, and so should be printed
using %zu to avoid build warnings on either 32-bit and 64-bit builds.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-08-26 10:15:36 +03:00
Rodrigo Vivi
5f8b253147 drm/i915/skl: Update DDI buffer translation programming.
SKL-Y can now use the same programming for all VccIO values after an
adjustment to I_boost.  SKL-U DP table adjustments.

1. Remove SKL Y 0.95V from "SKL H and S" columns in all tables. The
   other SKL Y column removes the "0.85V VccIO" so it now applies to all
   voltages.

2. DP table changes SKL U 400mV+0db dword 0 value from 2016h to 201Bh.

3. DP table changes SKL U 600mv+0db dword 0 value from 2016h to 201Bh.

4. DP table increases I_boost to level 3 for SKL Y 400mv+9.5db.

v2: Fix compilation warnings as pointed by Paulo.

Reference: Graphics Spec Change r97962
Cc: Arthur Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[Jani: reformatted commit message for shorter lines.]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-08-26 09:55:48 +03:00
Giedrius Statkevičius
fc0bfacd04 hp-wireless: remove unneeded goto/label in hpwl_init
acpi_bus_register_driver() already returns an appropriate value (0 on
success, and some negative value on error) to be used in __init functions
so the goto/label is redundant in hpwl_init thus remove it and directly
return the value

Signed-off-by: Giedrius Statkevičius <giedrius.statkevicius@gmail.com>
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
2015-08-25 23:34:15 -07:00
Mark Yao
4c156c21c7 drm/rockchip: vop: support plane scale
Win_full support 1/8 to 8 scale down/up engine, support
all format scale.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-08-26 14:16:26 +08:00
Mark Yao
77faa1619a drm/rockchip: vop: restore vop registers when resume
The registers will be reset to default values when whole
power domain off, so restore registers from regsbak.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-08-26 14:16:26 +08:00
Mark Yao
c1998f0858 drm/rockchip: vop: Default enable win2/3 area0 bit
Win2/3 support multiple area function, but we haven't found
a suitable way to use it yet, so let's just use them as other windows
with only area 0 enabled.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-08-26 14:16:26 +08:00
Mark Yao
84c7f8ca43 drm/rockchip: vop: Add yuv plane support
vop support yuv with NV12, NV16 and NV24, only 2 plane yuv.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-08-26 14:16:26 +08:00
Mark Yao
acf8c3e0a9 drm/rockchip: vop: Fix window dest start point
Dest start point use crtc_x/y is wrong, crtc_x/y is not equal
to dest.x1/y1 at plane scale.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-08-26 14:16:26 +08:00
Mark Yao
f1c79abef5 drm/rockchip: vop: Fix virtual stride calculation
vir_stride need number words of the virtual width, and fb->pitches
save bytes_per_pixel, so just div 4 switch to stride.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-08-26 14:16:25 +08:00
Takashi Iwai
a92d5ee866 ALSA: hda - Fix widget sysfs tree corruption after refresh
When snd_hdac_refresh_widget_sysfs() is called before the first
hda_widget_sysfs_init(), the next call overrides and eventually
fails.  This results in unexpected Oops, something like:
  BUG: unable to handle kernel NULL pointer dereference at 00000000000000c8
  IP: [<ffffffff8180e2a3>] hdmi_chmap_ctl_info+0x23/0x40

The fix is to add a check of the existing sysfs tree.  Also, for more
safety, this patch adds the checks of device_is_registered() in
snd-hdac_refresh_wdiget_sysfs(), too.

Fixes: fa4f18b4f4 ('ALSA: hda - Refresh widgets sysfs at probing Haswell+ HDMI codecs')
Bugizlla: https://bugzilla.kernel.org/show_bug.cgi?id=103431
Reported-by: Andreas Reis <andreas.reis@gmail.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2015-08-26 07:43:47 +02:00
Rusty Russell
b51aa1cc78 tools/lguest: Clean up include dir
It contains a symlinked header we use; ignore it and clean it up
on 'make clean'.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-08-26 06:12:35 +02:00
Rusty Russell
e523caa601 tools/lguest: Fix redefinition of struct virtio_pci_cfg_cap
Ours uses a u32 for the data, since we ensure it's always
aligned and it's x86 so it doesn't matter anyway.

  lguest.c:128:8: error: redefinition of ‘struct virtio_pci_cfg_cap’

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Fixes: 3121bb023e ("virtio: define virtio_pci_cfg_cap in header.")
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-08-26 06:12:35 +02:00
Eugene Shatokhin
f50791ac1a usbnet: Get EVENT_NO_RUNTIME_PM bit before it is cleared
It is needed to check EVENT_NO_RUNTIME_PM bit of dev->flags in
usbnet_stop(), but its value should be read before it is cleared
when dev->flags is set to 0.

The problem was spotted and the fix was provided by
Oliver Neukum <oneukum@suse.de>.

Signed-off-by: Eugene Shatokhin <eugene.shatokhin@rosalab.ru>
Acked-by: Oliver Neukum <oneukum@suse.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-25 19:44:13 -07:00
Dave Jiang
7b7d0ca777 dmaengine: ioatdma: Fix variable array length
Sparse reported:
drivers/dma/ioat/prep.c:637:27: sparse: Variable length array is used.

Assigning a static value for the array.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-26 07:53:58 +05:30
Dave Jiang
5c65cb93a3 dmaengine: ioatdma: fix sparse "error" with prep lock
The prep lock gets acquired in ioat_check_space_lock and released in
ioat_tx_submit_unlock. Setting the annotations so sparse does not freak out.

drivers/dma/ioat/dma.c:273:30: sparse: context imbalance in 'ioat_tx_submit_unlock' - unexpected unlock
drivers/dma/ioat/dma.c:476:5: sparse: context imbalance in 'ioat_check_space_lock' - wrong count at exit

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-26 07:53:58 +05:30
Maxime Ripard
4d112426c3 dmaengine: hdmac: Add memset capabilities
Just like for the XDMAC, the SoCs that embed the HDMAC don't have any kind
of GPU, and need to accelerate a few framebuffer-related operations through
their DMA controller.

However, unlike the XDMAC, the HDMAC doesn't have the memset capability
built-in. That can be easily emulated though, by doing a transfer with a
fixed address on the variable that holds the value we want to set.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-26 07:50:21 +05:30
Vinod Koul
8a4ce226b9 dmaengine: sort the sh Makefile
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-26 07:50:17 +05:30