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1,462,193 commits

Author SHA1 Message Date
Giorgi Tchankvetadze
3e63ff8e22 staging: greybus: pwm: Fix typo in comment
Change "privodes" to "provides" in a comment.

Signed-off-by: Giorgi Tchankvetadze <giorgitchankvetadze1997@gmail.com>
Link: https://patch.msgid.link/20260214100947.70527-1-giorgitchankvetadze1997@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-02-23 14:55:59 +01:00
Chen Ni
3f4e403304 soc: fsl: cpm1: qmc: Fix error check for devm_ioremap_resource() in qmc_qe_init_resources()
Fix wrong variable used for error checking after devm_ioremap_resource()
call. The function checks qmc->scc_pram instead of qmc->dpram, which
could lead to incorrect error handling.

Fixes: eb680d5630 ("soc: fsl: cpm1: qmc: Add support for QUICC Engine (QE) implementation")
Signed-off-by: Chen Ni <nichen@iscas.ac.cn>
Acked-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20260209015904.871269-1-nichen@iscas.ac.cn
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-02-23 14:49:27 +01:00
Richard Genoud
014077044e soc: fsl: qbman: fix race condition in qman_destroy_fq
When QMAN_FQ_FLAG_DYNAMIC_FQID is set, there's a race condition between
fq_table[fq->idx] state and freeing/allocating from the pool and
WARN_ON(fq_table[fq->idx]) in qman_create_fq() gets triggered.

Indeed, we can have:
         Thread A                             Thread B
    qman_destroy_fq()                    qman_create_fq()
      qman_release_fqid()
        qman_shutdown_fq()
        gen_pool_free()
           -- At this point, the fqid is available again --
                                           qman_alloc_fqid()
           -- so, we can get the just-freed fqid in thread B --
                                           fq->fqid = fqid;
                                           fq->idx = fqid * 2;
                                           WARN_ON(fq_table[fq->idx]);
                                           fq_table[fq->idx] = fq;
     fq_table[fq->idx] = NULL;

And adding some logs between qman_release_fqid() and
fq_table[fq->idx] = NULL makes the WARN_ON() trigger a lot more.

To prevent that, ensure that fq_table[fq->idx] is set to NULL before
gen_pool_free() is called by using smp_wmb().

Fixes: c535e923bb ("soc/fsl: Introduce DPAA 1.x QMan device driver")
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Tested-by: CHAMPSEIX Thomas <thomas.champseix@alstomgroup.com>
Link: https://lore.kernel.org/r/20251223072549.397625-1-richard.genoud@bootlin.com
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-02-23 14:49:27 +01:00
Rafael J. Wysocki
3afd8df024 PM: runtime: Change pm_runtime_put() return type to void
The primary role of pm_runtime_put() is to decrement the runtime PM
usage counter of the given device.  It always does that regardless of
the value returned by it later.

In addition, if the runtime PM usage counter after decrementation turns
out to be zero, a work item is queued up to check whether or not the
device can be suspended.  This is not guaranteed to succeed though and
even if it is successful, the device may still not be suspended going
forward.

There are multiple valid reasons why pm_runtime_put() may not decide to
queue up the work item mentioned above, including, but not limited to,
the case when user space has written "on" to the device's runtime PM
"control" file in sysfs.  In all of those cases, pm_runtime_put()
returns a negative error code (even though the device's runtime PM
usage counter has been successfully decremented by it) which is very
confusing.  In fact, its return value should only be used for debug
purposes and care should be taken when doing it even in that case.

Accordingly, to avoid the confusion mentioned above, change the return
type of pm_runtime_put() to void.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Link: https://patch.msgid.link/14387202.RDIVbhacDa@rafael.j.wysocki
2026-02-23 14:08:17 +01:00
Rafael J. Wysocki
7a73801fda pmdomain: imx: gpcv2: Discard pm_runtime_put() return value
Passing pm_runtime_put() return value to the callers is not particularly
useful.

Returning an error code from pm_runtime_put() merely means that it has
not queued up a work item to check whether or not the device can be
suspended and there are many perfectly valid situations in which that
can happen, like after writing "on" to the devices' runtime PM "control"
attribute in sysfs for one example.

Accordingly, update imx_pgc_domain_suspend() to simply discard the
return value of pm_runtime_put() and always return success to the
caller.

This will facilitate a planned change of the pm_runtime_put() return
type to void in the future.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://patch.msgid.link/15658107.tv2OnDr8pf@rafael.j.wysocki
2026-02-23 14:05:38 +01:00
Penghe Geng
901084c51a mmc: core: Avoid bitfield RMW for claim/retune flags
Move claimed and retune control flags out of the bitfield word to
avoid unrelated RMW side effects in asynchronous contexts.

The host->claimed bit shared a word with retune flags. Writes to claimed
in __mmc_claim_host() or retune_now in mmc_mq_queue_rq() can overwrite
other bits when concurrent updates happen in other contexts, triggering
spurious WARN_ON(!host->claimed). Convert claimed, can_retune,
retune_now and retune_paused to bool to remove shared-word coupling.

Fixes: 6c0cedd1ef ("mmc: core: Introduce host claiming by context")
Fixes: 1e8e55b670 ("mmc: block: Add CQE support")
Cc: stable@vger.kernel.org
Suggested-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Penghe Geng <pgeng@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 13:45:50 +01:00
Pei Xiao
fed6e50848
spi: atcspi200: Remove redundant assignment to .owner
The coccicheck tool reports the following warning for this driver:

./spi-atcspi200.c:670:3-8: No need to set .owner here. The core will do it.

The manual assignment of .owner = THIS_MODULE; in the platform_driver
struct is redundant. The platform_driver_register() function, which is
called to register the driver, is a macro that automatically sets the
driver's owner to THIS_MODULE.

The driver core handles this assignment internally, making the explicit
initialization in the struct definition unnecessary. Remove the
unnecessary line.

Signed-off-by: Pei Xiao <xiaopei01@kylinos.cn>
Link: https://patch.msgid.link/tencent_65C9C09CBD2B68C400F7145521A4B217E606@qq.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-23 12:17:57 +00:00
Antoni Pokusinski
6f7e9b1154
spi: omap2-mcspi: add support for 3-wire transfers
Update omap_mcspi_setup_transfer() so that the driver supports
communication over a single data line for 3-wire SPI devices.

Signed-off-by: Antoni Pokusinski <apokusinski01@gmail.com>
Link: https://patch.msgid.link/20260214212800.262461-1-apokusinski01@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-23 12:17:56 +00:00
Cosmin Tanislav
4d28f38f64
spi: dt-bindings: renesas,rzv2h-rspi: allow multiple DMAs
All supported SoCs have multiple DMA controllers that can be used with
the RSPI peripheral. The current bindings only allow a single pair of RX
and TX DMAs.

The DMA core allows specifying multiple DMAs with the same name, and it
will pick the first available one.

There is an exception in the base dt-schema rules specifically for
allowing this behavior (dtschema/schemas/dma/dma.yaml).

dma-names:
  anyOf:
    - uniqueItems: true
    - items:
        # Hack around Renesas bindings which repeat entries to support
        # multiple possible DMA providers
        enum: [rx, tx]

Allow multiple DMAs to have the same name and only restrict the possible
names of the DMA channels, not their count.

For RZ/T2H and RZ/N2H SoCs, limit the number of DMA channels to 6, as
they have 3 DMA controllers.

For RZ/V2H and RZ/V2N SoCs, limit the number of DMA channels to 10, as
they have 5 DMA controllers.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260128215132.1353381-2-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-23 12:17:55 +00:00
Krzysztof Kozlowski
5e897a498a
spi: stm32: Use NULL instead of 0 for pointer
Pointers should use NULL instead of explicit '0', as pointed out by
sparse:

  spi-stm32.c:1659:65: warning: Using plain integer as NULL pointer

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260216085816.69888-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-23 12:17:54 +00:00
Patrice Chotard
52531750d3
spi: stm32-ospi: Remove exec_op() callback debug log
Since commit ad44888451 ("spi: spi-mem: Introduce a default ->exec_op()
debug log") a common debug log is available in spi-mem, so remove the one
from spi-stm32-ospi driver.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://patch.msgid.link/20260213-upstream_ospi_remove_exec_op_debug_log-v1-1-164f17515fd0@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-23 12:17:53 +00:00
Alain Volmat
837f6691d5
spi: stm32: fix rx DMA request error handling
Avoid trying to release the RX DMA channel when an error occurs
during RX dma_request_chan() call. Instead, jump directly to
release the TX channel, if applicable.

Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/linux-spi/aYXvY6NH7OlZ-OAF@stanley.mountain/T/#u
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://patch.msgid.link/20260212-spi-stm32-fix-dma-rx-release-v1-1-53a37c31626b@foss.st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-23 12:17:52 +00:00
Charles Keepax
20a88c156f
spi: cs42l43: Don't support sidecar properties on device tree systems
On some systems the cs42l43 has amplifiers attached to its
SPI controller that are not properly defined in ACPI. However,
this exists to provide compatibility with existing Windows ACPI.

On device tree systems this functionality should never be used,
there is no reason not to specify the amplifiers properly through
device tree.  Make this more clear by only allowing the "sidecar"
functionality to be used on non-DT systems.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://patch.msgid.link/20260223100717.4011114-1-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-23 12:17:51 +00:00
Antoniu Miclaus
ffef412304
spi: allow ancillary devices to share parent's chip selects
When registering an ancillary SPI device, the current code flags a chip
select conflict with the parent device. This happens because the
ancillary device intentionally uses one of the parent's chip selects,
but __spi_add_device() checks against all existing devices including
the parent.

Allow this by passing the parent device pointer to __spi_add_device()
and skipping the conflict check when the existing device is the parent.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Reviewed-by: David Lechner <dlechner@baylibre.com>
Link: https://patch.msgid.link/bcb1eb34fc5e86fd5dbb4472ad1d3ea3cf3e9779.1770393792.git.antoniu.miclaus@analog.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-23 12:17:50 +00:00
Charles Keepax
6510e1324b
ASoC: cs42l43: Report insert for exotic peripherals
For some exotic peripherals the type detect can return a reserved value
of 0x4. This will currently return an error and not report anything to
user-space, update this to report the insert normally.

Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://patch.msgid.link/20260223093616.3800350-1-ckeepax@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-23 12:17:43 +00:00
Christian Brauner
52b364fed6 shmem: adapt to rhashtable-based simple_xattrs with lazy allocation
Adapt tmpfs/shmem to use the rhashtable-based xattr path and switch
from an embedded struct to pointer-based lazy allocation.

Change shmem_inode_info.xattrs from embedded 'struct simple_xattrs' to
a pointer 'struct simple_xattrs *', initialized to NULL. This avoids
the rhashtable overhead for every tmpfs inode, which helps when a lot of
inodes exist.

The xattr store is allocated on first use:

- shmem_initxattrs(): Allocates via simple_xattrs_alloc() when
  security modules set initial xattrs during inode creation.

- shmem_xattr_handler_set(): Allocates on first setxattr, with a
  short-circuit for removal when no xattrs are stored yet.

All read paths (shmem_xattr_handler_get, shmem_listxattr) check for
NULL xattrs pointer and return -ENODATA or 0 respectively.

Replaced xattr entries are freed via simple_xattr_free_rcu() to allow
concurrent RCU readers to finish.

shmem_evict_inode() conditionally frees the xattr store only when
allocated.

Also change simple_xattr_add() from void to int to propagate
rhashtable insertion failures. shmem_initxattrs() is the only caller.

Link: https://patch.msgid.link/20260216-work-xattr-socket-v1-3-c2efa4f74cb7@kernel.org
Acked-by: Darrick J. Wong <djwong@kernel.org>
Reviewed-by: Jan Kara <jack@suse.cz>
Signed-off-by: Christian Brauner <brauner@kernel.org>
2026-02-23 13:06:38 +01:00
Christian Brauner
b32c4a2136 xattr: add rhashtable-based simple_xattr infrastructure
Add rhashtable support to the simple_xattr subsystem while keeping the
existing rbtree code fully functional. This allows consumers to be
migrated one at a time without breaking any intermediate build.

struct simple_xattrs gains a dispatch flag and a union holding either
the rbtree (rb_root + rwlock) or rhashtable state:

  struct simple_xattrs {
      bool use_rhashtable;
      union {
          struct { struct rb_root rb_root; rwlock_t lock; };
          struct rhashtable ht;
      };
  };

simple_xattrs_init() continues to set up the rbtree path for existing
embedded-struct callers.

Add simple_xattrs_alloc() which dynamically allocates a simple_xattrs
and initializes the rhashtable path. This is the entry point for
consumers switching to pointer-based lazy allocation.

The five core functions (get, set, list, add, free) dispatch based on
the use_rhashtable flag.

Existing callers continue to use the rbtree path unchanged. As each
consumer is converted it will switch to simple_xattrs_alloc() and the
rhashtable path. Once all consumers are converted a follow-up patch
will remove the rbtree code.

Link: https://patch.msgid.link/20260216-work-xattr-socket-v1-2-c2efa4f74cb7@kernel.org
Acked-by: Darrick J. Wong <djwong@kernel.org>
Reviewed-by: Jan Kara <jack@suse.cz>
Signed-off-by: Christian Brauner <brauner@kernel.org>
2026-02-23 13:06:38 +01:00
Christian Brauner
94d709be8c
xattr: add rcu_head and rhash_head to struct simple_xattr
In preparation for converting simple_xattrs from rbtree to rhashtable,
add rhash_head and rcu_head members to struct simple_xattr. The
rhashtable implementation will use rhash_head for hash table linkage
and RCU-based lockless reads, requiring that replaced or removed xattr
entries be freed via call_rcu() rather than immediately.

Add simple_xattr_free_rcu() which schedules RCU-deferred freeing of an
xattr entry.  This will be used by callers of simple_xattr_set() once
they switch to the rhashtable-based xattr store.

No functional changes.

Link: https://patch.msgid.link/20260216-work-xattr-socket-v1-1-c2efa4f74cb7@kernel.org
Acked-by: Darrick J. Wong <djwong@kernel.org>
Signed-off-by: Christian Brauner <brauner@kernel.org>
2026-02-23 13:06:38 +01:00
Ariel Silver
162d331d83 wifi: mac80211: bounds-check link_id in ieee80211_ml_reconfiguration
link_id is taken from the ML Reconfiguration element (control & 0x000f),
so it can be 0..15. link_removal_timeout[] has IEEE80211_MLD_MAX_NUM_LINKS
(15) elements, so index 15 is out-of-bounds. Skip subelements with
link_id >= IEEE80211_MLD_MAX_NUM_LINKS to avoid a stack out-of-bounds
write.

Fixes: 8eb8dd2ffb ("wifi: mac80211: Support link removal using Reconfiguration ML element")
Reported-by: Ariel Silver <arielsilver77@gmail.com>
Signed-off-by: Ariel Silver <arielsilver77@gmail.com>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260220101129.1202657-1-Ariel.Silver@cybereason.com
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-02-23 12:35:34 +01:00
Andreas Gruenbacher
2ff7cf7e06 gfs2: Call unlock_new_inode before d_instantiate
As Neil Brown describes in detail in the link referenced below, new
inodes must be unlocked before they can be instantiated.

An even better fix is to use d_instantiate_new(), which combines
d_instantiate() and unlock_new_inode().

Fixes: 3d36e57ff7 ("gfs2: gfs2_create_inode rework")
Reported-by: syzbot+0ea5108a1f5fb4fcc2d8@syzkaller.appspotmail.com
Link: https://lore.kernel.org/linux-fsdevel/177153754005.8396.8777398743501764194@noble.neil.brown.name/
Signed-off-by: Andreas Gruenbacher <agruenba@redhat.com>
2026-02-23 12:31:12 +01:00
Luke Wang
d6bf2e64de mmc: core: Optimize time for secure erase/trim for some Kingston eMMCs
Kingston eMMC IY2964 and IB2932 takes a fixed ~2 seconds for each secure
erase/trim operation regardless of size - that is, a single secure
erase/trim operation of 1MB takes the same time as 1GB. With default
calculated 3.5MB max discard size, secure erase 1GB requires ~300 separate
operations taking ~10 minutes total.

Add a card quirk, MMC_QUIRK_FIXED_SECURE_ERASE_TRIM_TIME, to set maximum
secure erase size for those devices. This allows 1GB secure erase to
complete in a single operation, reducing time from 10 minutes to just 2
seconds.

Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Arnd Bergmann
f3b9683bf5 mmc: dw_mmc: move pmops into core driver
Since the platform power management structure is now shared with the PCI
front-end, there is a link failure if only the PCI variant is enabled:

arm-linux-gnueabi/bin/arm-linux-gnueabi-ld: drivers/mmc/host/dw_mmc-pci.o:(.data+0x74): undefined reference to `dw_mci_pltfm_pmops'

This could be fixed by selecting the platform driver from the PCI one
in Kconfig, or by reverting the change to the PCI driver, but since this
is now used by all dw_mmc variants, just move the structure into the core
code as well.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Andre Korol
4cd4e82316 mmc: loongson2-mmc: drop redundant memset after dma_alloc_coherent()
dma_alloc_coherent() returns zeroed memory, so the memset() immediately
after allocation is redundant.

Signed-off-by: Andre Korol <andre.korol.dev@gmail.com>
Reviewed-by: Binbin Zhou <zhoubinbin@loongson.cn>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Shawn Lin
8ea84b50a9 mmc: dw_mmc: Remove mshc alias support
Remove the long-deprecated mshc alias support, as the mmc core already
provides alias functionality through the standard mmc alias. This eliminates
the redundant dual-alias system. The driver now obtains the controller ID
from struct mmc_host::index(supplied by mmc alias) instead of the legacy mshc
alias.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Shawn Lin
9b541ceaf5 mmc: dw_mmc-k3: Remove mshc alias support
Remove the long-deprecated mshc alias support, as the mmc core already
provides alias functionality through the standard mmc alias. This eliminates
the redundant dual-alias system. The driver now obtains the controller ID
from struct mmc_host::index(supplied by mmc alias) instead of the legacy mshc
alias.

dw_mci_hi6220_parse_dt() which parse mshc alias is used for hi6220, hi3660 and
hi3670. Given hi6220 never assigned mshc alias on the DTS files, and hi3360
and hi3670 share the same code, so with it removed, add a return value to
dw_mci_hs_set_timing() and let dw_mci_hi3660_init() check if index exceeds
TIMING_MODE in the firs place to bail out early, the same as before.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Shawn Lin
6aaa6c561f arm64: dts: hisilicon: hikey960/970: Convert to use standard mmc alias
Convert the long-deprecated mshc alias to standard mmc alias.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Albert Yang
1e61836476 MAINTAINERS: add MMC files to BST entry
Add the MMC device tree binding and driver files to the existing
ARM/BST SOC SUPPORT maintainer entry.

Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Albert Yang
695824f456 mmc: sdhci: add Black Sesame Technologies BST C1200 controller driver
Add SDHCI controller driver for Black Sesame Technologies C1200 SoC.

This driver supports the DWCMSHC SDHCI controller with BST-specific
enhancements including:
- Custom clock management and tuning
- Power management support
- BST-specific register configurations
- Support for eMMC and SD card interfaces
- Hardware limitation workaround for 32-bit DMA addressing

The driver addresses specific hardware constraints where:
- System memory uses 64-bit bus, eMMC controller uses 32-bit bus
- eMMC controller cannot access memory through SMMU due to hardware bug
- All system DRAM is configured outside 4GB boundary (ZONE_DMA32)
- Uses SRAM-based bounce buffer within 32-bit address space

Signed-off-by: Ge Gordon <gordon.ge@bst.ai>
Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Albert Yang
ef7eb1a709 mmc: sdhci: allow drivers to pre-allocate bounce buffer
Allow platform drivers to pre-allocate bounce buffer by checking if
host->bounce_buffer is already set before attempting allocation.

This enables platforms with specific DMA constraints (such as 32-bit
DMA on controllers that cannot access high memory) to use their own
reserved memory regions for the bounce buffer.

Suggested-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Albert Yang
d515962316 dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller
Add device tree bindings for the Black Sesame Technologies
DWCMSHC SDHCI controller used in C1200 SoC.

The binding describes a Synopsys DesignWare Cores Mobile Storage
Host Controller with BST-specific extensions including:
- Two register regions (core SDHCI and CRM registers)
- Optional memory-region for bounce buffer support
- Fixed clock input

Signed-off-by: Ge Gordon <gordon.ge@bst.ai>
Signed-off-by: Albert Yang <yangzh0906@thundersoft.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Yixun Lan
1e9f43a1db mmc: sdhci-of-k1: spacemit: Add support for K3 SoC
The SDHCI controller found on SpacemiT K3 SoC share the same IP with K1
generation and introduce a compatible data to denote the change that broken
64BIT DMA issue has been fixed.

Signed-off-by: Yixun Lan <dlan@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Yixun Lan
b4206966e2 dt-bindings: mmc: spacemit,sdhci: add support for K3 SoC
The SDHCI controller found on SpacemiT K3 SoC share the same IP with
K1 generation, while fixed the broken 64BIT DMA issue. Introduce a
compatible string to enable support for it.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Yixun Lan <dlan@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Linus Walleij
366b594156 mmc: sdhci: Stop advertising the driver in dmesg
As much as we have grown used to seeing this message on
every kernel boot, it does not add any technical value.

Drop all messages from sdhci_drv_init(), and drop the
module_init() and module_exit() calls as well since they
now become empty.

The modules becomes a pure library module, meaning it will
get pulled in by modprobe() when the symbols inside it
are needed, or compiled in if any users are compiled in.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:55 +01:00
Jeff Chen
c0b68bc25e mmc: sdio: add NXP vendor and IW61x device IDs
Add NXP's SDIO vendor ID (0x0471) and IW61x device ID (0x0205) to
sdio_ids.h for future support of NXP Wi-Fi chips over SDIO.

Signed-off-by: Jeff Chen <jeff.chen_1@nxp.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
2c7fe99a71 mmc: dw_mmc-pltfm: use modern PM macros
Use the modern PM macros for the suspend and resume functions to be
automatically dropped by the compiler when CONFIG_PM or CONFIG_PM_SLEEP
are disabled, without having to use #ifdef guards.

When this's done, remove all variant drivers' local pm definition and
replace it with dw_mci_pltfm_pmops.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
[Ulf: Fixed conflict by dropping changes for dw_mmc-rockchip]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
765f4836ec mmc: dw_mmc-pci: Use BAR_2 and pcim_iomap_region()
PCIe endpoint framework defines standard BAR enum for EP drivers
to use, so remove PCI_BAR_NO here.

Then, pcim_iomap_regions has been deprecated for a long time, replace
it with pcim_iomap_region();

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
c6969a13f6 mmc: dw_mmc: Remove unused register access macros
The mci_readw/mci_writew/mci_readq/mci_writeq macros were added
to provide 16-bit and 64-bit register access operations, but they
have remained unused since their introduction. Remove these dead code.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
7597d68cea mmc: dw_mmc: Improve dw_mci_get_cd()
The current dw_mci_get_cd() implementation maintains a DW_MMC_CARD_PRESENT
flag primarily for logging purposes, which adds unnecessary complexity.
Additionally, the if-else-elif control flow does not align with the Linux
kernel coding style.

This commit simplifies the function by:
- Removing the redundant card presence flag
- Replacing the conditional chain with a cleaner implementation
- Improving code readability while maintaining functionality

The change reduces code complexity without affecting the actual card
detection behavior.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
29d3f6a643 mmc: dw_mmc: Remove DW_MCI_SEND_STATUS and DW_MCI_RECV_STATUS macros
Use MMC_DATA_READ and MMC_DATA_WRITE defined by MMC core instead.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
e453a08b3a mmc: dw_mmc: Remove redundant struct mmc_data forward declaration
The header file linux/mmc/core.h, which is already included in dw_mmc.h,
contains the forward declaration of struct mmc_data. There's no need to
redeclare it here.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
792bd24b6e mmc: dw_mmc: Remove struct dw_mci_board
The only user of dw_mci_board is dw_pci-pci, now we can provide
the caps from dw_mci_drv_data, so we could let dw_pci-pci use
dw_mci_drv_data and remove caps from struct dw_mci_board.

With that, struct dw_mci_board is no longer needed, we can remove
it. Then we should check all settings in dw_mci_parse_dt in order
not to overwrite them if provided from variant drivers.

Also, without CONFIG_OF support, dw_mmc doesn' work as host->pdata
is always ERR_PTR(-EINVAL), we could remove it together.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
ec6d8bb39d mmc: dw_mmc: Remove bus_hz from struct dw_mci_board
struct dw_mci already keeps one, reuse it. Now, as dw_mmc-pci still
provide struct dw_mci_board, so host->bus_hz will not be overwritten.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
d3fcd6362a mmc: dw_mmc: Move detect_delay_ms from struct dw_mci_board to struct dw_mci
Now, as dw_mmc-pci still provide struct dw_mci_board, so host->detect_delay_ms
will not be overwritten. So it's fine to move it.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
dc1f8aacc9 mmc: dw_mmc: Remove fifo_depth from struct dw_mci_board
struct dw_mci already keeps one, so remove it from struct dw_mci_board.
Now, as dw_mmc-pci still provide struct dw_mci_board, so host->fifo_depth
will not be overwritten.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
d917f35c33 mmc: dw_mmc: Move rstc from struct dw_mci_board to struct dw_mci
Nobody using dw_mci_board passes in rstc, move it to the common struct
dw_mci needed by all users.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
cea6e1a151 mmc: dw_mmc: Remove caps2 and pm_caps from struct dw_mci_board
Nobody uses them.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
fedf31e204 mmc: dw_mmc: Remove assignment of pdata in dw_mci_pltfm_register()
No one using dw_mci_pltfm_register() passes in platform_data when
searching host and arch directories, remove it.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
137cf0a4d6 mmc: dw_mmc: Remove SDMMC_INT_ERROR
SDMMC_INT_ERROR is defined as 0xbfc2, which looks like a magic number and
it's never used, so remove it.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
57cc962430 mmc: dw_mmc: Remove dma_ops from struct dw_mci_board
It does take dma_ops from struct dw_mci_board, but we immediately
re-assign it from either dw_mci_idmac_ops or dw_mci_edmac_ops in
dw_mci_init_dma(). That means it's never used now, or has been
broken for a long time without noticed. It seems no drivers need
it, so remove it now.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00
Shawn Lin
4db2a6c857 mmc: dw_mmc: Check return value of dma_ops->init() in resume
dma_ops->init() may fail, should check the return value.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2026-02-23 12:06:54 +01:00