Commit graph

576,624 commits

Author SHA1 Message Date
Tang Yuantian
e3a6dadc6d ahci: qoriq: Update the default Rx watermark value
The PTC[RXWM] sets the watermark value for Rx FIFO. The default
value 0x20 might be insufficient for some hard drives. If the
watermark value is too small, a single-cycle overflow may occur
and is reported as a CRC or internal error in the PxSERR register.
Updated the value to 0x29 according to the validation test.
All LS platforms are affected.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-12-16 10:24:35 -05:00
Tang Yuantian
ef0cc7fef4 ahci: qoriq: Adjust the default register values on ls1043a
Updated the registers' values to enhance SATA performance and
reliability.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-12-16 10:24:35 -05:00
Ulrich Ölmann
85533e3b32 drm/panel: add kernel doc for size attributes in panel_desc
Document that 'width' and 'height' are measured in millimeters.

Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-12-16 16:21:13 +01:00
Lucas Stach
8def22e50f drm/panel: simple: Add support for Kyocera TCG121XGLP panel
The Kyocera TCG121XGLP panel is an XGA LCD TFT panel connected through
LVDS, which can be supported by the simple panel driver.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-12-16 16:13:47 +01:00
Lucas Stach
f42fb5539a devicetree: add vendor prefix for Kyocera Corporation
KYO is the stock ticker symbol of Kyocera Corporation.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-12-16 16:13:24 +01:00
Rafał Miłecki
541c9a84cd ssb: pick SoC invariants code from MIPS BCM47xx arch
There is code in ssb fetching "invariants" that is basically a set of
board specific data. Every host requires its own implementation of
reading function. In ssb we have support for PCI, PCMCIA & SDIO.
For some (historical?) reason code reading "invariants" for SoC was
placed in arch code and provided by a callback. This is not needed
nowadays, so lets move that into ssb. This way we keep all "invariants"
functions in a single module making code cleaner.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-12-16 16:36:25 +02:00
Russell King
dd39a26538 scripts: recordmcount: break hardlinks
recordmcount edits the file in-place, which can cause problems when
using ccache in hardlink mode.  Arrange for recordmcount to break a
hardlinked object.

Link: http://lkml.kernel.org/r/E1a7MVT-0000et-62@rmk-PC.arm.linux.org.uk

Cc: stable@vger.kernel.org # 2.6.37+
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2015-12-16 09:28:23 -05:00
Kalle Valo
d0ca990067 Merge ath-next from ath.git
Major changes:

ath9k

* add random number generator support (CONFIG_ATH9K_HWRNG)
2015-12-16 16:28:20 +02:00
Mark Brown
c1f4a14940 Merge remote-tracking branches 'spi/fix/dspi' and 'spi/fix/spidev' into spi-linus 2015-12-16 13:28:32 +00:00
Mark Brown
9ce5db27f4 Merge remote-tracking branch 'spi/fix/core' into spi-linus 2015-12-16 13:28:31 +00:00
Xiubo Li
fcac0233d8 regmap: use IS_ALIGNED instead of % to improve the performance
The stride value should always equal to 2^n, so we can use bit
rotation instead of % to improve the performance.

Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-16 13:03:20 +00:00
Jani Nikula
19c8054c4d drm/i915: prefer for_each_intel_* macros for iteration
Use the for_each_intel_* macros for iterating intel_encoder,
intel_connector, and intel_crtc. No functional changes.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450262896-5325-1-git-send-email-jani.nikula@intel.com
2015-12-16 14:35:25 +02:00
Andy Gross
ee01d0c91e regulator: qcom-smd: Add support for PMA8084
This patch adds support and documentation for the PMA8084 regulators
found on APQ8084 platforms.

Signed-off-by: Andy Gross <agross@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-16 12:29:54 +00:00
Andy Gross
57d6567680 regulator: qcom-smd: Add PM8916 support
This patch adds support and documentation for the PM8916 regulators
found on MSM8916 platforms.

Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-16 12:29:54 +00:00
Andy Gross
7a40058589 soc: qcom: documentation: Update SMD/RPM Docs
This patch moves the qcom,smd-rpm.txt to the correct location and splits
out the smd and rpm documentation.  In addition, a smd-rpm-regulator
document is added.

Signed-off-by: Andy Gross <agross@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-16 12:29:54 +00:00
Johan Hovold
157f38f993 spi: fix parent-device reference leak
Fix parent-device reference leak due to SPI-core taking an unnecessary
reference to the parent when allocating the master structure, a
reference that was never released.

Note that driver core takes its own reference to the parent when the
master device is registered.

Fixes: 49dce689ad ("spi doesn't need class_device")
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
2015-12-16 12:28:25 +00:00
Jie Yang
1cf8dfd90f ASoC: Intel: sst: fix sst_memcpy32 wrong with non-4x bytes issue
sst_memcpy32() only copied bytes/4 32bits, which means it dropped
the remaining bytes%4 bytes wrongly.

Here add copying those missing bytes, first to a 32bits tmp, and
then write the tmp to 32bits iomem.

Signed-off-by: Jie Yang <yang.jie@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-16 12:28:04 +00:00
Mark Brown
56ea1075e7 spi: spidev: Hold spi_lock over all defererences of spi in release()
We use the spi_lock spinlock to protect against races between the device
being removed and file operations on the spidev.  This means that in the
removal path all references to the device need to be done under lock as
in removal we dropping references to the device.

Reported-by: Vegard Nossum <vegard.nossum@oracle.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-16 12:09:35 +00:00
Takashi Iwai
f2777c1344 Merge branch 'topic/firewire-update' into for-next 2015-12-16 12:09:10 +01:00
Michael Ellerman
2475c36213 Partial revert of "powerpc: Individual System V IPC system calls"
This partially reverts commit a34236155a.

While reviewing the glibc patch to exploit the individual IPC calls,
Arnd & Andreas noticed that we were still requiring userspace to pass
IPC_64 in order to get the new style IPC API.

With a bit of cleanup in the kernel we can drop that requirement, and
instead only provide the new style API, which will simplify things for
userspace.

Rather than try and sneak that patch into 4.4, instead we will drop the
individual IPC calls for powerpc, and merge them again in 4.5 once the
cleanup patch has gone in.

Because we've already added sys_mlock2() as syscall #378, we don't do a
full revert of the IPC calls. Instead we drop the __NR #defines, and
send those now undefined syscall numbers to sys_ni_syscall(). This
leaves a gap in the syscall numbers, but we'll reuse them when we merge
the individual IPC calls.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2015-12-16 21:52:32 +11:00
Måns Rullgård
5398b7ef6c i2c: xlr: add interrupt support for Sigma Designs chips
The Sigma Designs variant of this controller has the ability to generate
interrupts.  This is controlled using two additional registers, oddly
enough overlapping with the defined but unused HDSTATIM.

This patch adds support for using this feature instead of busy-looping
if an IRQ is specified.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-16 11:42:58 +01:00
Måns Rullgård
a45af72a60 i2c: xlr: fix extra read/write at end of rx transfer
The BYTECNT register holds the transfer size minus one.  Setting it to
the correct value removes the need for a dummy read/write at the end of
each transfer.  As zero-length transfers are not supported, do not
advertise I2C_FUNC_SMBUS_QUICK.

In other words, this patch makes the driver transfer the number of bytes
requested unless this is zero, which is not supported by the hardware
and is thus refused.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2015-12-16 11:42:30 +01:00
Yoshinori Sato
6f2b611db2 clocksource/drivers/h8300: Initializer cleanup.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 11:33:35 +01:00
Yoshinori Sato
f37632d1e9 clocksource/drivers/h8300: Simplify delta handling
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 11:33:33 +01:00
Yoshinori Sato
2f445e0aa0 clocksource/drivers/h8300: Fix timer not overflow case
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 11:33:31 +01:00
Yoshinori Sato
2a0ff87774 clocksource/drivers/h8300: Change to overflow interrupt
Counter overflow detection use for overflow interrupt

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 11:33:22 +01:00
Sergei Shtylyov
59508084e1 pinctrl: sh-pfc: r8a7791: add EtherAVB pin groups
Add the EtherAVB pin groups to the R8A7791 PFC driver.

Also add the copyright for all the Cogent Embedded's past work on this file.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-16 11:23:38 +01:00
Takeshi Kihara
34dc4e16af pinctrl: sh-pfc: r8a7795: Add SATA support
This patch adds SATA0 pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: adjusted for new PFC driver]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-16 11:23:37 +01:00
Takeshi Kihara
20cacae155 pinctrl: sh-pfc: r8a7795: Add SDHI support
Add SDHI[0-3] pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-16 11:23:37 +01:00
Geert Uytterhoeven
ed66700c03 pinctrl: sh-pfc: r8a7794: Add SCIF_CLK support
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-16 11:18:16 +01:00
Geert Uytterhoeven
53ec9ccd1c pinctrl: sh-pfc: r8a7790: Add SCIF_CLK support
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-16 11:18:12 +01:00
Geert Uytterhoeven
57a9d1acd0 pinctrl: sh-pfc: r8a7779: Add SCIF_CLK support
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-16 11:18:07 +01:00
Jani Nikula
ada8f95598 drm/i915/debugfs: add a separate debugfs file for VBT
In the future the VBT might not be in mailbox #4 of the ACPI OpRegion,
thus unavailable in i915_opregion, so add a separate file for the VBT.

v2: Drop the locking as unneeded (Chris)
v3: Rebase

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450178232-27780-1-git-send-email-jani.nikula@intel.com
2015-12-16 11:30:24 +02:00
Jani Nikula
2455a8e43d drm/i915: don't use a temp buffer for opregion debugfs file
Hasn't been necessary since

commit 115719fcea
Author: Williams, Dan J <dan.j.williams@intel.com>
Date:   Mon Oct 12 21:12:57 2015 +0000

    i915: switch from acpi_os_ioremap to memremap

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/74664a556a56d0eceb0029bbd77ffc1d771b0628.1450089383.git.jani.nikula@intel.com
2015-12-16 11:29:42 +02:00
Jani Nikula
827303855d drm/i915/opregion: make VBT pointer a const
Because we can. It's not to be touched so tell the compiler too.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/4b1872b121fb34a193cff9a5cb4e7c858d4a55aa.1450089383.git.jani.nikula@intel.com
2015-12-16 11:28:26 +02:00
Jani Nikula
6531873464 drm/i915/opregion: make VBT size limit more strict
The VBT in OpRegion should fit in mailbox #4.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/4bdb3f5820e3dbd1cdfa7b65cadfce4f80b880f0.1450089383.git.jani.nikula@intel.com
2015-12-16 11:26:52 +02:00
Jani Nikula
f0067a31e8 drm/i915: refactor VBT validation
Make the validation function a boolean operating on a buffer of given
size, removing the extra pointer dances.

Move the OpRegion based VBT validation to intel_opregion_setup(), only
initializing opregion->vbt if it's valid.

v2: move logging about valid VBT to opregion setup too (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450178175-27420-1-git-send-email-jani.nikula@intel.com
2015-12-16 11:22:44 +02:00
Jani Nikula
8b8e1a8990 drm/i915/bios: rename intel_parse_bios to intel_bios_init
While at it, move the declaration to where everything else is declared.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/7d9d879603038889f0128cf7cbbd9f591edc11dd.1450089383.git.jani.nikula@intel.com
2015-12-16 11:22:20 +02:00
Jani Nikula
e2051c4473 drm/i915/bios: move debug logging about VBT source to intel_parse_bios()
The decision about which source will be used for VBT is done in
intel_parse_bios(), not in the VBT validation function. Make the VBT
validation function strictly about validation, and move the debug
logging to where it logically belongs.

Also split the logging about where the valid VBT was found and what the
signature is. This will make even more sense in the future when the
validation for ACPI OpRegion based VBT takes place at OpRegion setup
time.

v2: Split logging about VBT signature and BDB version.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450178092-27148-1-git-send-email-jani.nikula@intel.com
2015-12-16 11:22:06 +02:00
Jani Nikula
caf37fa4b7 drm/i915/bios: have functions return vbt, not bdb, header pointer
This will simplify further work.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/d2c5210402fdd8c277e1d50892b0620d10c50ae8.1450089383.git.jani.nikula@intel.com
2015-12-16 11:21:25 +02:00
Jani Nikula
b30581a4d6 drm/i915: move "no VBT in opregion" quirk to intel_opregion_setup()
Check the quirk in intel_opregion_setup(), and don't initialize
opregion->vbt at all if the quirk says it's not present, hiding the
quirk from the rest of the driver.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/7cdc86eb441f8b7075142445a800b07ecf8c76cb.1450089383.git.jani.nikula@intel.com
2015-12-16 11:21:02 +02:00
Deepak M
b3cbd98b25 drm/i915: Add Intel opregion mailbox 5 structure
Mailbox 5 is BIOS to Driver Notification mailbox is intended
to support BIOS to Driver event notification or data storage
for BIOS to Driver data synchronization purpose. Mailbox 5 is
the extension of mailbox 3.

v4 by Jani:
 - don't add asle_ext to dev_priv as it's unused
 - use u8 for bddc and rsvd fields in asle ext struct
 - add BUILD_BUG_ON the asle ext struct size
 - debug logging for asle ext present

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/c2d4009659fca32280d9859ec34a62f45b86d895.1450089383.git.jani.nikula@intel.com
2015-12-16 11:19:37 +02:00
Vladimir Zapolskiy
d662ed2043 clocksource/drivers/lpc32: Correct pr_err() output format
If by some reason timerclk is not available, both clockevent and
clocksource initializations correctly exit, but output of errno to
kernel log buffer may be confusing:

  lpc32xx_clk_init: failed to map system control block registers
  lpc32xx_clocksource_init: clock get failed (4294966779)
  lpc32xx_clockevent_init: clock get failed (4294966779)

Use signed integer output in the correspondent pr_err() string formats:

  lpc32xx_clocksource_init: clock get failed (-517)
  lpc32xx_clockevent_init: clock get failed (-517)

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 09:59:41 +01:00
Grygorii Strashko
9c9ae5ffee clocksource/drivers/arm_global_timer: Fix suspend resume
Now the System stall is observed on TI AM437x based board (am437x-gp-evm)
during resuming from System suspend when ARM Global timer is selected as
clocksource device (CPUIdle not enabled) - SysRq are working, but nothing
else.

The reason of stall is that ARM Global timer loses its contexts during
System suspend:
   GT_CONTROL.TIMER_ENABLE = 0 (unbanked)
   GT_COUNTERx = 0

Hence, update ARM Global timer driver to reflect above behaviour
- re-enable ARM Global timer on resume (GT_CONTROL.TIMER_ENABLE = 1)
  if not enabled.

CC: Arnd Bergmann <arnd@arndb.de>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Felipe Balbi <balbi@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 09:58:47 +01:00
Jisheng Zhang
272a25a247 clocksource/drivers/pistachio: Fix wrong calculated clocksource read value
Let's assume the counter value is 0xf0000000, the pistachio clocksource
read cycles function should return ~0x0fffffff but actually it returns
0xffffffff0fffffff.

That occurs because:

	~(cycle_t)value is different from (cycle_t)~value.

unsigned long val = ~(unsigned long)0xf0000000;
40049a:       48 b8 ff ff ff 0f ff    movabs $0xffffffff0fffffff,%rax

unsigned long val = (unsigned long)~0xf0000000;
40049a:       48 c7 45 f8 ff ff ff    movq   $0xfffffff,-0x8(%rbp)

We fix this issue by calculating bitwise-not counter, then cast to
cycle_t.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 09:45:10 +01:00
Jisheng Zhang
08e4b44852 clockevents/drivers/arm_global_timer: Use writel_relaxed in gt_compare_set
Use the relaxed version to improve performance. we measured time of
4096 rounds of gt_compare_set() spent on Marvell BG2Q:

before the patch: 3690648ns on average
after the patch: 1083023ns on average

improved by 70%!

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-12-16 09:44:23 +01:00
Julia Lawall
e70d41b59f iwlwifi: dvm: fix compare_const_fl.cocci warnings
Move constants to the right of binary operators.

Generated by: scripts/coccinelle/misc/compare_const_fl.cocci

type=cleanup

Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2015-12-16 10:21:32 +02:00
Sara Sharon
c97dab4079 iwlwifi: mvm: change protocol offload flows
RFC4862 states that "In all cases, a node MUST NOT respond to
a Neighbor Solicitation for a tentative address".
Currently the driver configures the NS offload and does not wait
for address to become permanent, thus violating the RFC.
Just removing the address from the address list is not good enough
for all cases, since the NS messages are needed for the duplicate
address detection and should not be discarded.

For d0i3 disable NS offload. Put tentative address in the address
list so the NS packet will not be filtered out by ucode.
For D3 the platform will not wake from NS packets - so enable
NS offload while removing the tentative address from the list.

Given that now NS offload might be disabled, and that the ucode
uses the IP data for other puroposes (L3 filtering) add two
independent flags indicating if IPv4\IPv6 data is valid.

Signed-off-by: Sara Sharon <sara.sharon@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2015-12-16 10:19:53 +02:00
Golan Ben-Ami
e6eb8ca9e4 iwlwifi: expose fw usniffer mode to more utilities
Today, in order to configure fw in usniffer mode, the ucode
must have the corresponding tlv, which is revealed to the driver
while parsing the ucode.

Expose the mode of the usniffer to other utilities in the driver
(other than the ucode parser) by passing back a pointer to the value.
This can be very useful for allowing configuring the fw dbg data
using an external configuration file, because this configuration
depends on the fw usniffer mode.

Signed-off-by: Golan Ben-Ami <golan.ben.ami@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
2015-12-16 10:19:21 +02:00
Simon Wunderlich
5a1dd8a477 batman-adv: lock crc access in bridge loop avoidance
We have found some networks in which nodes were constantly requesting
other nodes BLA claim tables to synchronize, just to ask for that again
once completed. The reason was that the crc checksum of the asked nodes
were out of sync due to missing locking and multiple writes to the same
crc checksum when adding/removing entries. Therefore the asked nodes
constantly reported the wrong crc, which caused repeating requests.

To avoid multiple functions changing a backbone gateways crc entry at
the same time, lock it using a spinlock.

Signed-off-by: Simon Wunderlich <sw@simonwunderlich.de>
Tested-by: Alfons Name <AlfonsName@web.de>
Signed-off-by: Marek Lindner <mareklindner@neomailbox.ch>
Signed-off-by: Antonio Quartulli <antonio@meshcoding.com>
2015-12-16 15:17:09 +08:00