This driver is the only one that calls regulator_sync_voltage(), but it
can currently be built with CONFIG_REGULATOR disabled, producing
this build error:
drivers/cpufreq/tegra124-cpufreq.c: In function 'tegra124_cpu_switch_to_pllx':
drivers/cpufreq/tegra124-cpufreq.c:68:2: error: implicit declaration of function 'regulator_sync_voltage' [-Werror=implicit-function-declaration]
regulator_sync_voltage(priv->vdd_cpu_reg);
My first attempt was to implement a helper for this function
for regulator_sync_voltage, but Mark Brown explained:
We don't do this for *all* regulator API functions - there's some where
using them strongly suggests that there is actually a dependency on
the regulator API. This does seem like it might be falling into the
specialist category [...]
Looking at the code I'm pretty unclear on what the authors think the
use of _sync_voltage() is doing in the first place so it may be even
better to just remove the call. It seems to have been included in the
first commit so there's not changelog explaining things and there's
no comment either. I'd *expect* it to be a noop as far as I can see.
This adds the dependency to make the driver always build successfully
or not be enabled at all. Alternatively, we could investigate if the
driver should stop calling regulator_sync_voltage instead.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
SCTP is lacking proper np->opt cloning at accept() time.
TCP and DCCP use ipv6_dup_options() helper, do the same
in SCTP.
We might later factorize this code in a common helper to avoid
future mistakes.
Reported-by: Dmitry Vyukov <dvyukov@google.com>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Vlad Yasevich <vyasevich@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This gets rid of the following compile warn:
net/mpls/mpls_iptunnel.c:40:5: warning: no previous prototype for
mpls_output [-Wmissing-prototypes]
Signed-off-by: Roopa Prabhu <roopa@cumulusnetworks.com>
Acked-by: Robert Shearman <rshearma@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add a warn message when clip table overflows. If clip table isn't
allocated, return from cxgb4_clip_release() to avoid panic.
Disable offload if clip isn't enabled in the hardware.
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We already know "err" is zero so there is no need to check.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The "err = " assignment is missing here.
Fixes: 0d65fc1304 ('mlxsw: spectrum: Implement LAG port join/leave')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The handling of epib and psdata remains a bit unclear in the driver,
as we access the same fields both as CPU-endian and through DMA
from the device.
Sparse warns about this:
ti/netcp_core.c:1147:21: warning: incorrect type in assignment (different base types)
ti/netcp_core.c:1147:21: expected unsigned int [usertype] *[assigned] epib
ti/netcp_core.c:1147:21: got restricted __le32 *<noident>
This uses __le32 types in a few places and uses __force where the code
looks fishy. The previous patch should really have produced the correct
behavior, but this second patch is needed to shut up the warnings about
it. Ideally it would be slightly rewritten to not need those casts,
but I don't dare do that without access to the hardware for proper
testing.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
The netcp driver produces tons of warnings when CONFIG_LPAE is enabled
on ARM:
drivers/net/ethernet/ti/netcp_core.c: In function 'netcp_tx_map_skb':
drivers/net/ethernet/ti/netcp_core.c:1084:13: warning: passing argument 1 of 'set_words' from incompatible pointer type [-Wincompatible-pointer-types]
This is the result of trying to pass a pointer to a dma_addr_t to
a function that expects a u32 pointer to copy that into a DMA descriptor.
Looking at that code in more detail to fix the warnings, I see multiple
related problems:
* The conversion functions are not endian-safe, as the DMA descriptors
are almost certainly fixed-endian, but the CPU is not.
* On 64-bit machines, passing a pointer through a u32 variable is a
bug, accessing an indirect pointer as a u32 pointer even more so.
* The handling of epib and psdata mixes native-endian and device-endian
data.
In this patch, I try to sort out the types for most accesses here,
adding le32_to_cpu/cpu_to_le32 where appropriate, and passing pointers
through two 32-bit words in the descriptor padding, to make it plausible
that the driver does the right thing if compiled for big-endian or
64-bit systems.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This bit is also reserved on Skylake. Actually the only
platform that supports this is Haswell, so let's fix
this logic and apply this link entry time only for the
platform that supports it, i.e. Haswell.
This also changes the style to let more clear platform
differences outside the reg write. We would probably catch
this case sooner if separated, or not...
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1449880291-21388-1-git-send-email-rodrigo.vivi@intel.com
- oftree support for getting reset devices by index
- fixed return value consistency of of_reset_control_get
- added support for STi co-processor resets
- added STi status callback
- added HiSilicon Hi6220 reset driver
- added ath79 system restart support
- various fixes
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Merge tag 'reset-for-4.5-2' of git://git.pengutronix.de/git/pza/linux into next/drivers
Merge "Reset controller changes for v4.5 v2" from Philipp Zabel:
- oftree support for getting reset devices by index
- fixed return value consistency of of_reset_control_get
- added support for STi co-processor resets
- added STi status callback
- added HiSilicon Hi6220 reset driver
- added ath79 system restart support
- various fixes
* tag 'reset-for-4.5-2' of git://git.pengutronix.de/git/pza/linux:
reset: ath79: Add system restart support
arm64: dts: Add reset dts config for Hisilicon Hi6220 SoC
reset: hi6220: Reset driver for hisilicon hi6220 SoC
reset: hisilicon: document hisi-hi6220 reset controllers bindings
reset: remove unused device pointer from struct reset_control
XFRM can deal with SYNACK messages, sent while listener socket
is not locked. We add proper rcu protection to __xfrm_sk_clone_policy()
and xfrm_sk_policy_lookup()
This might serve as the first step to remove xfrm.xfrm_policy_lock
use in fast path.
Fixes: fa76ce7328 ("inet: get rid of central tcp/dccp listener timer")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Steffen Klassert <steffen.klassert@secunet.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We will soon switch sk->sk_policy[] to RCU protection,
as SYNACK packets are sent while listener socket is not locked.
This patch simply adds RCU grace period before struct xfrm_policy
freeing, and the corresponding rcu_head in struct xfrm_policy.
Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Steffen Klassert <steffen.klassert@secunet.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add the ARM64 Linux support for Socionext UniPhier SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix vf610 SAI clock configuration bug which is discovered by the newly
added master mode support in SAI audio driver.
- Fix buggy L2 cache latency values in vf610 device trees, which may
cause system hang when cpu runs at a higher frequency.
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Merge tag 'imx-fixes-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: imx: fixes for 4.4, 2nd round" from Shawn Guo:
The i.MX fixes for 4.4, 2nd round:
- Fix vf610 SAI clock configuration bug which is discovered by the newly
added master mode support in SAI audio driver.
- Fix buggy L2 cache latency values in vf610 device trees, which may
cause system hang when cpu runs at a higher frequency.
* tag 'imx-fixes-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: vf610: use reset values for L2 cache latencies
ARM: dts: vf610: fix clock definition for SAI2
ARM: imx: clk-vf610: fix SAI clock tree
The GPIO block for ls2080a platform has little endian registers,
the GPIO driver needs this property to read/write registers by
right interface.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The GPIO block on different QorIQ chips could have registers in different
endianess. Define the property to specify which endian is used by the
hardware.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Add the "little-endian" property to fix the issue that eSDHC
is not working and dumping out "mmc0: Controller never released
inhibit bit(s)." error messages constantly.
Fixes: 5461597f6c ("dts/ls2080a: Update DTSI to add support of various peripherals")
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Merge "Broadcom devicetree-arm64 changes for v4.5" from Florian Fainelli:
This pull request contains Broadcom ARM64-based Device Tree changes:
- Anup Patel adds L2 cache, SMMU, syscon-based reboot, PMU v3, iProc RNG200 (HWRNG) and
NAND flash controller support to the Northstar 2 SoCs
- Ray Jui adds the I2C Device Tree nodes to the Norsthar 2 SoCs
- Jon Mason enables the clock providers on the Norsthar 2 SoCs
* tag 'arm-soc/for-4.5/devicetree-arm64' of http://github.com/Broadcom/stblinux:
ARM64: dts: enable clock support for Broadcom NS2
arm64: dts: Add BRCM IPROC NAND DT node for NS2
arm64: dts: Add I2C nodes for NS2
arm64: dts: Add IPROC RNG200 DT node for NS2
arm64: dts: Add ARM PMUv3 DT node in NS2 DT
arm64: dts: Add syscon based reboot in DT for NS2
arm64: dts: Add SMMU DT node for NS2
arm64: dts: Add L2-cache DT node for NS2
This includes support for the evaluation board of the rk3368
as well as the dts-part for the newly added thermal management
support, rk3368 pwm nodes and an alias.
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Merge tag 'v4.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Merge "rockchip dts64 changes for 4.5" from Heiko Stuebner:
First round of 64bit devicetree changes for Rockchip socs.
This includes support for the evaluation board of the rk3368
as well as the dts-part for the newly added thermal management
support, rk3368 pwm nodes and an alias.
* tag 'v4.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add rk3368 evaluation board
arm64: dts: rockchip: add the pwm node info for RK3368 SoCs
arm64: dts: rockchip: Enable the Thermal on R88 board
arm64: dts: rockchip: Add main thermal info to rk3368.dtsi
arm64: dts: rockchip: Add the thermal data found on RK3368
arm64: dts: rockchip: Setup rk3368 ethernet0 alias for u-boot
Some USB device / host controller combinations seem to have problems
with Link Power Management. For example, Steinar found that his xHCI
controller wouldn't handle bandwidth calculations correctly for two
video cards simultaneously when LPM was enabled, even though the bus
had plenty of bandwidth available.
This patch introduces a new quirk flag for devices that should remain
disabled for LPM, and creates quirk entries for Steinar's devices.
Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Reported-by: Steinar H. Gunderson <sgunderson@bigfoot.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
According to USB 2 specs ports need to signal resume for at least 20ms,
in practice even longer, before moving to U0 state.
Both host and devices can initiate resume.
On device initiated resume, a port status interrupt with the port in resume
state in issued. The interrupt handler tags a resume_done[port]
timestamp with current time + USB_RESUME_TIMEOUT, and kick roothub timer.
Root hub timer requests for port status, finds the port in resume state,
checks if resume_done[port] timestamp passed, and set port to U0 state.
On host initiated resume, current code sets the port to resume state,
sleep 20ms, and finally sets the port to U0 state. This should also
be changed to work in a similar way as the device initiated resume, with
timestamp tagging, but that is not yet tested and will be a separate
fix later.
There are a few issues with this approach
1. A host initiated resume will also generate a resume event. The event
handler will find the port in resume state, believe it's a device
initiated resume, and act accordingly.
2. A port status request might cut the resume signalling short if a
get_port_status request is handled during the host resume signalling.
The port will be found in resume state. The timestamp is not set leading
to time_after_eq(jiffies, timestamp) returning true, as timestamp = 0.
get_port_status will proceed with moving the port to U0.
3. If an error, or anything else happens to the port during device
initiated resume signalling it will leave all the device resume
parameters hanging uncleared, preventing further suspend, returning
-EBUSY, and cause the pm thread to busyloop trying to enter suspend.
Fix this by using the existing resuming_ports bitfield to indicate that
resume signalling timing is taken care of.
Check if the resume_done[port] is set before using it for timestamp
comparison, and also clear out any resume signalling related variables
if port is not in U0 or Resume state
This issue was discovered when a PM thread busylooped, trying to runtime
suspend the xhci USB 2 roothub on a Dell XPS
Cc: stable <stable@vger.kernel.org>
Reported-by: Daniel J Blueman <daniel@quora.org>
Tested-by: Daniel J Blueman <daniel@quora.org>
Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
- Update all omaps to use pinctrl macros. This makes comparing the pinmux
settings against the documentation much earlier. Javier compared the
checksums of the generated dtb files to make sure nothing changed for
the dtb files.
- Updates for dm816x
- Add GPMC DMA channels for am437x
- Updates for LogicPD Torpedo
- Basic support for CompuLab cm-t335
- Remove tps65217.dtsi file, we're better off adding SoC generic board
dtsi files for the common features
- Add support for ELM on am33xx
- Add support for Bosch shc c3 board
- Add qspi aliases for am437x and dra7
- Wake-up support for dra7-evm uart1
- Basic support for CompuLab sbc-t43
- Basic support for CompuLab cl-som-am57x
- Use MMC pwrseq for libertas WLAN on igep0020 and igep0030
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Merge tag 'omap-for-v4.5/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "Device tree changes for omaps for v4.5 merge window" from Tony Lindgren:
- Update all omaps to use pinctrl macros. This makes comparing the pinmux
settings against the documentation much earlier. Javier compared the
checksums of the generated dtb files to make sure nothing changed for
the dtb files.
- Updates for dm816x
- Add GPMC DMA channels for am437x
- Updates for LogicPD Torpedo
- Basic support for CompuLab cm-t335
- Remove tps65217.dtsi file, we're better off adding SoC generic board
dtsi files for the common features
- Add support for ELM on am33xx
- Add support for Bosch shc c3 board
- Add qspi aliases for am437x and dra7
- Wake-up support for dra7-evm uart1
- Basic support for CompuLab sbc-t43
- Basic support for CompuLab cl-som-am57x
- Use MMC pwrseq for libertas WLAN on igep0020 and igep0030
* tag 'omap-for-v4.5/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (97 commits)
ARM: dts: omap3-igep0030: Use MMC pwrseq to init SDIO WiFi
ARM: dts: omap3-igep0020: Use MMC pwrseq to init SDIO WiFi
ARM: dts: am57xx: cl-som-am57x: skip resetting ETH PHYs
ARM: dts: am57xx: sbc-am57x: add HDMI support
ARM: dts: am57xx: compulab-sb-som: add HDMI connector
ARM: dts: am57xx: sbc-am57x: add LCD support
ARM: dts: am57xx: sbc-am57x: add GPIO expander support
ARM: dts: am57xx: sbc-am57x: add EEPROM support
ARM: dts: am57xx: sbc-am57x: add usb vbus pinmux
ARM: dts: am57xx: cl-som-am57x: add MMC1 support
ARM: dts: am57xx: sbc-am57x: add basic board support
ARM: dts: am57xx: cl-som-am57x: add analog audio support
ARM: dts: am57xx: cl-som-am57x: add touchscreen support
ARM: dts: am57xx: cl-som-am57x: add USB support
ARM: dts: am57xx: cl-som-am57x: add dual EMAC support
ARM: dts: am57xx: cl-som-am57x: add spi-flash support
ARM: dts: am57xx: cl-som-am57x: add eMMC support
ARM: dts: am57xx: cl-som-am57x: add EEPROM support
ARM: dts: am57xx: cl-som-am57x: add I2C3 support
ARM: dts: am57xx: cl-som-am57x: dts: add RTC support
...
- Fix Armada 388 GP dts
- Add clock related to PMU for Dove
- Add SolidRun Armada 388 Clearfog A1 dts
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Merge tag 'mvebu-dt-4.5-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt for 4.5 (part 2)" from Gregory CLEMENT:
- Fix Armada 388 GP dts
- Add clock related to PMU for Dove
- Add SolidRun Armada 388 Clearfog A1 dts
* tag 'mvebu-dt-4.5-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: Add SolidRun Armada 388 Clearfog A1 DT file
dt-bindings: add Marvell PMU documentation
ARM: dts: dove: add Dove divider clocks
dt-bindings: add Marvell core PLL and clock divider PMU documentation
ARM: mvebu: remove duplicated regulator definition in Armada 388 GP
Among the bigger changes are two new Veyron boards, support for
the dual-core cortex-a7 rk3036 soc and addition of support for
the crypto engine of the rk3288. Smaller changes include some
IR receivers, updates of thermal settings more reflecting real-
life and testing-results.
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Merge tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "rockchip dts32 changes for 4.5" from Heiko Stuebner:
First round of arm devicetree changes.
Among the bigger changes are two new Veyron boards, support for
the dual-core cortex-a7 rk3036 soc and addition of support for
the crypto engine of the rk3288. Smaller changes include some
IR receivers, updates of thermal settings more reflecting real-
life and testing-results.
* tag 'v4.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add gpio-ir-receiver to the R89 board
ARM: dts: rockchip: add touchscreen node to veyron minnie
ARM: dts: rockchip: add veyron-mickey board
ARM: dts: rockchip: add veyron-brain board
ARM: dts: rockchip: make sure edp_24m is associated to xin24m on veyron
ARM: dts: rockchip: override thermal settings on veyron-speedy
ARM: dts: rockchip: update the thermal management on rk3288
ARM: dts: rockchip: Add Crypto node for rk3288
ARM: dts: rockchip: add rk3036-evb board
ARM: dts: rockchip: add core rk3036 dtsi
clk: rockchip: add dt-binding header for rk3036
clk: rockchip: add an id for rk3288 crypto clk
ARM: dts: rockchip: Add IR receiver to RK3288 Radxa Rock 2 Square
ARM: dts: rockchip: add channels properties for i2s
ARM: dts: rockchip: set system-power-controller property on rk3288-rock2
ARM: dts: rockchip: Setup rk3066/rk3188 ethernet0 alias for u-boot
ARM: dts: rockchip: Setup rk3288 ethernet0 alias for u-boot
UniPhier SoCs (except PH1-sLD3) have several nodes in common.
Factor out them into uniphier-common32.dtsi. This improves the code
maintainability.
PH1-sLD3 is so old that it has more or less different register maps
than the others. So, it cannot be included in this refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The UART3 is assigned with IRQ 29 for old SoCs, IRQ 177 for new ones,
and PH1-Pro4 is on the boundary.
PH1-sLD3: UART3 is unavailable
PH1-LD4, PH1-sLD8: only IRQ 29 is supported
PH1-Pro4: both IRQ 29 and 177 are supported
PH1-Pro5, ProXstream2, PH1-LD6b: only IRQ 177 is supported
This SoC can choose either IRQ 29 or IRQ 177, but the former is shared
with another hardware (low speed serial0). The latter is dedicated
for this hardware and more recommended.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Push the Rohm touchscreen to the STUIB, as the TVK UIB has
a Synaptics RMI4 touchscreen.
- Set up the right sensor IRQs for the Snowball, so that
periodic data ready-IRQ capture starts working.
- Use wakeup-source consequently.
- Remove legacy regulator-compatible strings.
- Define the sensors on the HREFP TVK board properly.
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Merge tag 'ux500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "Device Tree changes for Ux500" from Linus Walleij:
- Push the Rohm touchscreen to the STUIB, as the TVK UIB has
a Synaptics RMI4 touchscreen.
- Set up the right sensor IRQs for the Snowball, so that
periodic data ready-IRQ capture starts working.
- Use wakeup-source consequently.
- Remove legacy regulator-compatible strings.
- Define the sensors on the HREFP TVK board properly.
* tag 'ux500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: configure the sensors on the TVK board correctly
ARM: u300: remove regulator-compatible usage
ARM: ux500: remove regulator-compatible usage
ARM: ux500: replace legacy *,wakeup property with wakeup-source
ARM: ux500: Assign proper sensor IRQs for Snowball
ARM: ux500: push down Rohm TS to STUIB
* Remove now unnecessary header
* Introduce ARCH_RENESAS
* Remove unmaintened URL from MAINTAINERS
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Merge tag 'renesas-cleanup-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup
Merge "Renesas ARM Based SoC Cleanup for v4.5" from Simon Horman:
* Remove now unnecessary header
* Introduce ARCH_RENESAS
* Remove unmaintened URL from MAINTAINERS
* tag 'renesas-cleanup-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Remove legacy mach/irqs.h
ARM: shmobile: Introduce ARCH_RENESAS
MAINTAINERS: Remove link to oss.renesas.com which is closed
These are a couple of changes that may conflict with other branches,
so we're keeping them in a separate branch that can be merged into
those if necessary.
* treewide/cleanup:
ARM: use "depends on" for SoC configs instead of "if" after prompt
ARM/clocksource: use automatic DT probing for ux500 PRCMU
ARM: use const and __initconst for smp_operations
ARM: hisi: do not export smp_operations structures
The card detect pin is currently called sdmcc-cd.
This patch fixes the typo and renames the pin to sdmmc-cd.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Even if dev->driver is null because we are being removed,
it is safer to not leave device locked.
Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru>
Reviewed-by: Ross Zwisler <ross.zwisler@linux.intel.com>
Reviewed-by: Vishal Verma <vishal.l.verma@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Use the new CQ abstraction to simplify completions in the iSER
initiator.
Signed-off-by: Sagi Grimberg <sagig@mellanox.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
We'll need it later with the new CQ abstraction. also switch
login bufs to void pointers.
Signed-off-by: Sagi Grimberg <sagig@mellanox.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Remove struct rdma_iu and instead allocate the struct ib_rdma_wr array
early and fill out directly. This allows us to chain the WRs, and thus
archives both less lock contention on the HCA workqueue as well as much
simpler error handling.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Bart Van Assche <bart.vanassche@sandisk.com>
This adds an abstraction that allows ULPs to simply pass a completion
object and completion callback with each submitted WR and let the RDMA
core handle the nitty gritty details of how to handle completion
interrupts and poll the CQ.
In detail there is a new ib_cqe structure which just contains the
completion callback, and which can be used to get at the containing
object using container_of. It is pointed to by the WR and WC as an
alternative to the wr_id field, similar to how many ULPs already use
the field to store a pointer using casts.
A driver using the new completion callbacks allocates it's CQs using
the new ib_create_cq API, which in addition to the number of CQEs and
the completion vectors also takes a mode on how we poll for CQEs.
Three modes are available: direct for drivers that never take CQ
interrupts and just poll for them, softirq to poll from softirq context
using the to be renamed blk-iopoll infrastructure which takes care of
rearming and budgeting, or a workqueue for consumer who want to be
called from user context.
Thanks a lot to Sagi Grimberg who helped reviewing the API, wrote
the current version of the workqueue code because my two previous
attempts sucked too much and converted the iSER initiator to the new
API.
Signed-off-by: Christoph Hellwig <hch@lst.de>
The Atmel maxtouch DT binding documents that the compatible string for
the device is "atmel,maxtouch" and the I2C core always reports a module
alias of the form i2c:alias where alias is the compatible string model:
$ grep MODALIAS /sys/devices/platform/12e00000.i2c/i2c-8/8-004b/uevent
MODALIAS=i2c:maxtouch
But there isn't maxtouch entry in the I2C device ID table so when the
i2c:maxtouch MODALIAS uevent is reported, kmod is not able to match the
alias with a module to load:
$ modinfo atmel_mxt_ts | grep alias
alias: of:N*T*Catmel,maxtouch
alias: i2c:mXT224
alias: i2c:atmel_mxt_tp
alias: i2c:atmel_mxt_ts
alias: i2c:qt602240_ts
So add the maxtouch entry to the I2C device ID table to allow the module
to be autoloaded when the device is registered via OF.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Unregister the NAND device from the NAND subsystem when removing a denali
NAND controller, otherwise the MTD attached to the NAND device is still
exposed by the MTD layer, and accesses to this device will likely crash
the system.
Fixes: 2a0a288ec2 ("mtd: denali: split the generic driver and PCI layer")
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
