Commit graph

576,624 commits

Author SHA1 Message Date
Tejun Heo
0d94276645 cgroup: rename Documentation/cgroups/ to Documentation/cgroup-legacy/
In preparation for adding cgroup2 documentation, rename
Documentation/cgroups/ to Documentation/cgroup-legacy/.

Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Li Zefan <lizefan@huawei.com>
2015-11-16 11:13:34 -05:00
Tejun Heo
67e9c74b8a cgroup: replace __DEVEL__sane_behavior with cgroup2 fs type
With major controllers - cpu, memory and io - shaping up for the
unified hierarchy, cgroup2 is about ready to be, gradually, released
into the wild.  Replace __DEVEL__sane_behavior flag which was used to
select the unified hierarchy with a separate filesystem type "cgroup2"
so that unified hierarchy can be mounted as follows.

  mount -t cgroup2 none $MOUNT_POINT

The cgroup2 fs has its own magic number - 0x63677270 ("cgrp").

v2: Assign a different magic number to cgroup2 fs.

Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Li Zefan <lizefan@huawei.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
2015-11-16 11:13:34 -05:00
Heikki Krogerus
b4c580a43d usb: dwc3: pci: add support for Intel Broxton SOC
PCI IDs for Broxton based platforms.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-16 10:12:29 -06:00
Chunming Zhou
43c27fb5c2 drm/amdgpu: update pd while updating vm as well
Change-Id: I93a861cd6707f7d91672b9e19757cc50008cd7a2
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 11:06:00 -05:00
Christian König
5d82730af7 drm/amdgpu: fix handling order in scheduler CS
We need to clear parser.ibs and num_ibs before amd_sched_fence_create,
otherwise the IB could be freed twice if fence creates fails.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-16 11:05:59 -05:00
Christian König
e284022163 drm/amdgpu: fix incorrect mutex usage v3
Before this patch the scheduler fence was created when we push the job
into the queue, so we could only get the fence after pushing it.

The mutex now was necessary to prevent the thread pushing the jobs to
the hardware from running faster than the thread pushing the jobs into
the queue.

Otherwise the thread pushing jobs into the queue would have accessed
possible freed up memory when it tries to get a reference to the fence.

So what you get in the end is thread A:
mutex_lock(&job->lock);
...
Kick of thread B.
...
mutex_unlock(&job->lock);

And thread B:
mutex_lock(&job->lock);
....
mutex_unlock(&job->lock);
kfree(job);

I'm actually not sure if I'm still up to date on this, but this usage
pattern used to be not allowed with mutexes. See here as well
https://lwn.net/Articles/575460/.

v2: remove unrelated changes, fix missing owner
v3: rebased, add more commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:58 -05:00
Christian König
4a56228337 drm/amdgpu: cleanup scheduler fence get/put dance
The code was correct, but getting two references when the ownership
is linearly moved on is a bit awkward and just overhead.

Signed: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:58 -05:00
Chunming Zhou
7034decf6a drm/amdgpu: add command submission workflow tracepoint
OGL needs these tracepoints to investigate performance issue.

Change-Id: I5e58187d061253f7d665dfce8e4e163ba91d3e2b
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
2015-11-16 11:05:57 -05:00
Flora Cui
5f2e816b29 drm/amdgpu: update Fiji's tiling mode table
Change-Id: I925c15015390113f7e27746ec5751eaa6a92c2a7
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:56 -05:00
Rex Zhu
c305fd5fff drm/amdgpu: fix bug that can't enter thermal interrupt for bonaire.
Set reversed bit to enable/disable thermal interrupt.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-11-16 11:05:56 -05:00
Arnd Bergmann
e1b35f6103 drm/amdgpu: fix seq_printf format string
The amdgpu driver has a debugfs interface that shows the amount of
VRAM in use, but the newly added code causes a build error on
all 32-bit architectures:

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1076:17: warning: format '%lu' expects argument of type 'long unsigned int', but argument 4 has type 'long long int' [-Wformat=]

This fixes the format string to use "%llu" for printing 64-bit
numbers, which works everywhere, as long as we also cast to 'u64'.
Unlike atomic64_t, u64 is defined as 'unsigned long long' on
all architectures.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: a2ef8a9749 ("drm/amdgpu: add vram usage into debugfs")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:55 -05:00
Maxim Sheviakov
515c752dab drm/radeon: fix quirk for MSI R7 370 Armor 2X
There was a typo in the original.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=92865

Signed-off-by: Maxim Sheviakov <mrader3940@yandex.ru>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:54 -05:00
Jay Cornwall
a80b30476d drm/amdgpu: Fix default page access routing
The VM default page (used when a VM translation fails) is allocated in
system memory. The VM is misconfigured to interpret the physical address
as referencing a VRAM physical page.

Route default page accesses to system memory.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jay Cornwall <jay@jcornwall.me>
Cc: <stable@vger.kernel.org> # v4.2+
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:53 -05:00
Alex Deucher
24dd2f64c5 drm/radeon: unconditionally set sysfs_initialized
Avoids spew on resume for systems where sysfs may
fail even on init.

bug:
https://bugzilla.kernel.org/show_bug.cgi?id=106851

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-11-16 11:05:53 -05:00
Christian König
7e52a81c2f drm/amdgpu: cleanup amdgpu_cs_parser handling
No need any more to allocate that structure dynamically, just put it on the
stack. This is a start to cleanup some of the scheduler fallouts.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:52 -05:00
Christian König
e4a58a28b5 drm/amdgpu: fix leaking the IBs on error
Fixing a memory leak when the scheduler is enabled.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:51 -05:00
Chunming Zhou
f5617f9dde drm/amd: add kmem cache for sched fence
Change-Id: I45bb8ff10ef05dc3b15e31a77fbcf31117705f11
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 11:05:51 -05:00
Chunming Zhou
b49c84a576 drm/amdgpu: add kmem cache for amdgpu fence
Change-Id: I5ad8dd156ccf27a6f18004aa0a215a0925b6e67b
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 11:05:50 -05:00
Flora Cui
451f698bca drm/amdgpu: update fiji_mgcg_cgcg_init table
Change-Id: If44b8057741c78208f1976f60f31b535c944d0bd
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-11-16 11:05:49 -05:00
Christian König
16ae42feb0 drm/amdgpu: use common fence for amdgpu_vm_fence
Just cleanup the function parameters.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:49 -05:00
Christian König
b56c22853e drm/amdgpu: use fence_is_later() for vm_flush as well v2
v2: remove superfluous check

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-16 11:05:48 -05:00
Christian König
c2776afe74 drm/amdgpu: use a timer for fence fallback
Less overhead than a work item and also adds proper cleanup handling.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:47 -05:00
Christian König
935c186aae drm/amdgpu: remove fence trace points
Mostly unused and replaced by the common trace points.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:46 -05:00
Flora Cui
fa6760482b drm/amdgpu: update Fiji's mmPA_SC_RASTER_CONFIG value
Change-Id: I6d138306a878450e5bf8a77a2f1aacc380a39fe5
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:46 -05:00
Michel Dänzer
938204985c drm/radeon: Only prompt for enabling PAT when we'd allow write-combining
No use bothering users about this for whom we disable write-combining for
other reasons anyway.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:45 -05:00
Michel Dänzer
a28bbd5824 drm/radeon: Always disable RADEON_GEM_GTT_UC along with RADEON_GEM_GTT_WC
Write-combining is a CPU feature. From the GPU POV, these both simply
mean no GPU<->CPU cache coherency.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:44 -05:00
Michel Dänzer
96ea47c0ec drm/radeon: Disable uncacheable CPU mappings of GTT with RV6xx
They reportedly cause random GPU hangs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91268

Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:43 -05:00
Tejun Heo
34c06254ff cgroup: fix cftype->file_offset handling
6f60eade24 ("cgroup: generalize obtaining the handles of and
notifying cgroup files") introduced cftype->file_offset so that the
handles for per-css file instances can be recorded.  These handles
then can be used, for example, to generate file modified
notifications.

Unfortunately, it made the wrong assumption that files are created
once for a given css and removed on its destruction.  Due to the
dependencies among subsystems, a css may be hidden from userland and
then later shown again.  This is implemented by removing and
re-creating the affected files, so the associated kernfs_node for a
given cgroup file may change over time.  This incorrect assumption led
to the corruption of css->files lists.

Reimplement cftype->file_offset handling so that cgroup_file->kn is
protected by a lock and updated as files are created and destroyed.
This also makes keeping them on per-cgroup list unnecessary.

Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: James Sedgwick <jsedgwick@fb.com>
Fixes: 6f60eade24 ("cgroup: generalize obtaining the handles of and notifying cgroup files")
Acked-by: Johannes Weiner <hannes@cmpxchg.org>
Acked-by: Zefan Li <lizefan@huawei.com>
2015-11-16 10:58:26 -05:00
Jungseok Lee
18fc93fd64 percpu: remove PERCPU_ENOUGH_ROOM which is stale definition
As pure cleanup, this patch removes PERCPU_ENOUGH_ROOM which is not
used any more. That is, no code refers to the definition.

Acked-by: Christoph Lameter <cl@linux.com>
Signed-off-by: Jungseok Lee <jungseoklee85@gmail.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16 10:50:25 -05:00
Drew Richardson
3fbac6ccb6 arm: perf: Add event descriptions
Add additional information about the ARM architected hardware events
to make counters self describing. This makes the hardware PMUs easier
to use as perf list contains possible events instead of users having
to refer to documentation like the ARM TRMs.

Signed-off-by: Drew Richardson <drew.richardson@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-11-16 15:41:49 +00:00
Drew Richardson
f4ab36cb10 arm: perf: Convert event enums to #defines
The enums are not necessary and this allows the event values to be
used to construct static strings at compile time.

Signed-off-by: Drew Richardson <drew.richardson@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-11-16 15:41:49 +00:00
Mark Rutland
b916b785af drivers/perf: kill armpmu_register
Nothing outside of drivers/perf/arm_pmu.c should call armpmu_register
any more, so it no longer needs to be in include/linux/perf/arm_pmu.h.
Additionally, by folding it in to arm_pmu_device_probe we can allow
drivers to override struct pmu fields without getting blatted by the
armpmu code.

This patch folds armpmu_register into arm_pmu_device_probe. The logging
to the console is moved to after the PMU is successfully registered with
the core perf code.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Suggested-by: Will Deacon <will.deacon@arm.com>
Cc: Drew Richardson <drew.richardson@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-11-16 15:41:49 +00:00
Guillaume Gomez
4d4142696e percpu: Remove unneeded return from void function
Signed-off-by: Guillaume Gomez <guillaume1.gomez@gmail.com>
Acked-by: Christoph Lameter <cl@linux.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16 10:40:50 -05:00
Eric W. Biederman
95ace75414 locks: Don't allow mounts in user namespaces to enable mandatory locking
Since no one uses mandatory locking and files with mandatory locks can
cause problems don't allow them in user namespaces.

Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Jeff Layton <jeff.layton@primarydata.com>
2015-11-16 10:01:34 -05:00
Ludovic Desroches
13e2a6fd31 ARM: at91/dt: sama5d2 Xplained: add several devices
Add sdmmc and flexcom devices

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-11-16 15:53:06 +01:00
Alexandre Belloni
1392f7c905 ARM: at91/dt: remove bootargs
Passing earlyprintk in the bootargs may crash the board as it depends on
having a sane DEBUG_UART_PHYS configured which is not always the case.

Also remove ignore_loglevel

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-11-16 15:53:05 +01:00
Alexandre Belloni
15f7e2537a ARM: at91/dt: remove leftovers clock definition
The clocks group properties and the clock@0 node are useless, remove them
to avoid copy pasting in future device trees.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-11-16 15:53:05 +01:00
Sudeep Holla
67ae8b9b78 ARM: at91/dt: replace gpio-key,wakeup with wakeup-source property
Though the keyboard driver for GPIO buttons(gpio-keys) will continue to
check for/support the legacy "gpio-key,wakeup" boolean property to
enable gpio buttons as wakeup source, "wakeup-source" is the new
standard binding.

This patch replaces the legacy "gpio-key,wakeup" with the unified
"wakeup-source" property in order to avoid any futher copy-paste
duplication.

Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-11-16 15:53:04 +01:00
Wenyou Yang
f67d84690d ARM: at91/dt: sama5d4: change watchdog compatible
Change the watchdog compatible to "atmel,sama5d4-wdt" to support
SAMA5D4 watchdog driver.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-11-16 15:53:04 +01:00
Nicolas Ferre
f14882945d ARM: at91/defconfig: remove CONFIG_SSB from Atmel defconfigs
This "Sonics Silicon Backplane" support is not needed on Atmel SoCs: remove it.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-11-16 15:53:03 +01:00
Jeff Layton
9e8925b67a locks: Allow disabling mandatory locking at compile time
Mandatory locking appears to be almost unused and buggy and there
appears no real interest in doing anything with it.  Since effectively
no one uses the code and since the code is buggy let's allow it to be
disabled at compile time.  I would just suggest removing the code but
undoubtedly that will break some piece of userspace code somewhere.

For the distributions that don't care about this piece of code
this gives a nice starting point to make mandatory locking go away.

Cc: Benjamin Coddington <bcodding@redhat.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Jeff Layton <jeff.layton@primarydata.com>
Cc: J. Bruce Fields <bfields@fieldses.org>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Jeff Layton <jeff.layton@primarydata.com>
2015-11-16 09:49:34 -05:00
Thierry Reding
36d6e08721 arm64: defconfig: Enable printk timestamps
Timestamps in the kernel log can be useful to quickly determine where
time is spent during boot. There are tools that can generate charts of
the boot time, but it's sometimes convenient to see this live and
without the need to go through scripts to parse the logs first.

Also, this option is enabled on a large number of configurations, not
enabling it is confusing because the boot log looks very different from
what one is used to.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-16 15:48:24 +01:00
Thierry Reding
e39823e7d2 arm64: defconfig: Enable squashfs support
squashfs can be a convenient way to use a root filesystem stored as a
file on some other root filesystem.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-16 15:48:23 +01:00
Thierry Reding
ce64c809b7 arm64: defconfig: Enable sdhci-tegra driver
This driver is used to service the SDHCI interfaces found on NVIDIA
tegra SoCs. Enabling it allows SD and eMMC cards to be used for the
root filesystem.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-16 15:48:22 +01:00
Thierry Reding
0a31289369 arm64: defconfig: Enable serial-tegra driver
This driver is used to service the serial ports found on NVIDIA Tegra
SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-16 15:48:22 +01:00
Thierry Reding
73d877eb06 arm64: defconfig: Enable tegra-apbdma driver
This driver enables the use of the DMA engine from several of the
peripherals found on NVIDIA Tegra SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-16 15:48:21 +01:00
Thierry Reding
206e7ef083 arm64: defconfig: Do not disable Tegra AHB driver
This driver is enabled by default on Tegra because it is needed by the
drivers for a number of peripherals.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-16 15:48:05 +01:00
Thierry Reding
bdfeae0d73 arm64: defconfig: Enable Tegra210 support
Enable support for this new generation of the Tegra SoC.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-16 15:48:05 +01:00
Mike Snitzer
172c238612 dm thin: restore requested 'error_if_no_space' setting on OODS to WRITE transition
A thin-pool that is in out-of-data-space (OODS) mode may transition back
to write mode -- without the admin adding more space to the thin-pool --
if/when blocks are released (either by deleting thin devices or
discarding provisioned blocks).

But as part of the thin-pool's earlier transition to out-of-data-space
mode the thin-pool may have set the 'error_if_no_space' flag to true if
the no_space_timeout expires without more space having been made
available.  That implementation detail, of changing the pool's
error_if_no_space setting, needs to be reset back to the default that
the user specified when the thin-pool's table was loaded.

Otherwise we'll drop the user requested behaviour on the floor when this
out-of-data-space to write mode transition occurs.

Reported-by: Vivek Goyal <vgoyal@redhat.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
Acked-by: Joe Thornber <ejt@redhat.com>
Fixes: 2c43fd26e4 ("dm thin: fix missing out-of-data-space to write mode transition if blocks are released")
Cc: stable@vger.kernel.org
2015-11-16 09:36:08 -05:00
Ville Syrjälä
1f38089cb7 drm/i915: Model PSR AUX register selection more like the normal AUX code
v2: Split up the ctl vs. data reg handling like in the normal AUX code

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1447266856-30249-8-git-send-email-ville.syrjala@linux.intel.com
2015-11-16 16:01:31 +02:00