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506,942 commits

Author SHA1 Message Date
Philipp Zabel
26888190cb ARM: dts: pfla02: PHY reset is active-low
Note that the fec driver code currently hard-codes an active-low
reset, regardless of the flags in the device tree.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:54 +08:00
Philipp Zabel
94a1bbf85a ARM: dts: pfla02: Add GPIO LEDs
This patch enables the red and green GPIO LEDs on Phytec phyFLEX i.MX6 modules.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:53 +08:00
Philipp Zabel
7ed47ef1c9 ARM: dts: Add Phytec pbab01 with i.MX6 DualLite/Solo
The PBA-B-01 carrier board can be equipped with either Quad or DualLite/Solo
phyFLEX i.MX6 modules (PFL-A-02).
This moves all common devices into imx6qdl-phytec-pbab01.dtsi. The SoC specific
device trees then just include the pfla01 and pbab01 dtsi files corresponding
to the SoC variant.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:53 +08:00
Philipp Zabel
4fe69a934b ARM: dts: Add Phytec pfla02 with i.MX6 DualLite/Solo
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:52 +08:00
Fabio Estevam
702fbb89c5 ARM: dts: imx27-pdk: Pass the FEC pin configuration
Provide an entry for the FEC pin muxing.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:52 +08:00
Fabio Estevam
e58773268c ARM: dts: imx27-pdk: Pass the UART1 pin configuration
Provide an entry for the UART1 pin muxing.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:52 +08:00
Fabio Estevam
09c7450c27 ARM: dts: imx27-pdk: Keep the dt nodes sorted
For better readability keep the dt nodes sorted.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:51 +08:00
Alexander Shiyan
4090635410 ARM i.MX51: Add Digi ConnectCore devicetree
This patch adds support for Digi ConnectCore® i.MX51/Wi-i.MX51 SOM
and basic support for the ConnectCore for i.MX51 JumpStart Kit.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:51 +08:00
Alexander Shiyan
3c3ea29619 ARM: dts: i.MX: Use single naming style for i.MX WEIM device
This patch converts all i.MX WEIM users to use single naming style
for devices.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:51 +08:00
Denis Carikli
a690170044 ARM: dts: cpuimx51 Add touchscreen support.
Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:50 +08:00
Denis Carikli
5ddbc1084f ARM: dts: cpuimx35 Add touchscreen support.
Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:50 +08:00
Denis Carikli
9c72e2ad21 ARM: dts: mbimxsd51 baseboard: Add USB support.
Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:50 +08:00
Stefan Agner
99db398640 ARM: dts: add initial Colibri VF61 board support
Add initial Toradex Colibri VF61 board support. Ethernet, UART
and SDHC cards are working. Cache latencies need to be a bit
higher than vf610.dtsi suggests. Those values are validated
by running multiple memory tests.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:49 +08:00
Stefan Agner
9d7bf297cb of: add vendor prefix for Toradex AG
Adds toradex to the list of DT vendor prefixes.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:49 +08:00
Fabio Estevam
88308eddde ARM: dts: imx27-pdk: Pass the memory range
imx27-pdk has 128 MB of DRAM. Pass the memory range in dt.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:49 +08:00
Alexander Shiyan
6a21e4bbd7 ARM: dts: imx27-phytec-phycore-rdk: Add display control signal definitions
This patch adds display control signal definitions.
These fields are not used in the driver yet, but will be used for
reference to indicate the polarity of the signals.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:48 +08:00
Michael Heimpold
457c17e1aa ARM: dts: imx28-duckbill: use symbolic names from gpio.h
Use GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW instead of 0 and 1.

Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:48 +08:00
Michael Heimpold
99d1d68f4d ARM: dts: imx28-duckbill: fix phy reset gpio
Fix a copy & paste error: on duckbills the GPIO used for resetting
the ethernet phy differs from FSL's MX28EVK board.

Reported-by: Stefan Wahren <info@lategoodbye.de>
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:47 +08:00
Michael Heimpold
25fc228ea9 ARM: dts: imx28: include gpio.h to allow use of symbolic names
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:47 +08:00
Michael Heimpold
6a20770c12 ARM: dts: imx28-duckbill: fix mmc settings
I2SE's duckbills are only equipped with a micro SD card slot and
thus only provide a 4-bit interface.

Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:47 +08:00
Fabio Estevam
7538d4ff65 ARM: dts: imx51-babbage: Add USB OTG support
Tested by pinging from the host PC to the imx51-babbage via a g_ether
connection.

Signed-off by: Dave Ebright <dave.ebright@parsons.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:46 +08:00
Fabio Estevam
9bf206a9d1 ARM: dts: imx51-babbage: Add USB Host1 support
Signed-off by: Dave Ebright <dave.ebright@parsons.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:46 +08:00
Fabio Estevam
ebc374657b ARM: dts: imx35-pdk: Add initial device tree support
Add support for UART, eSDHC and NAND.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:46 +08:00
Xiubo Li
266a71b3d3 ARM: dts: vf610-twr: Enables FTM PWM device.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:45 +08:00
Xiubo Li
f54c2fea24 ARM: dts: vf610-twr: Add PWM0's pinctrl node
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:45 +08:00
Xiubo Li
7c978e0fd5 ARM: dts: vf610: Add Freescale FTM PWM node.
This adds devicetree node for VF610, and there are 8 channels
supported.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:45 +08:00
Philipp Zabel
b1e2e54610 ARM: dts: i.MX53: Add reset line to VPU device node
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:44 +08:00
Philipp Zabel
c92578c6e5 ARM: dts: i.MX53: Enable CODA7541 VPU
This IP module is always present and has no external connections.
There is no reason to disable it in the device tree.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:44 +08:00
Fabio Estevam
f0ee0450d1 ARM: dts: imx25-pdk: Add USB Host1 support
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:44 +08:00
Alexander Shiyan
8994181a75 ARM: dts: imx27-phytec-phycore-rdk: Add display support
This patch adds FB, Sharp-LQ035Q7 display (add-on module) and
corresponded pinctrl devicetree nodes to the Phytec PCM970 RDK.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:43 +08:00
Fabio Estevam
b04415cf58 ARM: dts: imx25-pdk: Add CAN support
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:43 +08:00
Fabio Estevam
9223dd8738 ARM: dts: imx25-pdk: Add keypad support
Tested with evtest.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:43 +08:00
Fabio Estevam
35d2bc8c81 ARM: dts: imx25-pdk: Add audio support
mx25pdk has a sgtl5000 codec connected to the I2C1 port.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 23:01:42 +08:00
Fabio Estevam
46ae42498e ARM: mx25: Add CLKO support
CLKO support is a clock output on mx25 which can output many of the internal
clock sources. It is useful for debugging purpose or also for driving the
audio codec for example.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16 22:51:34 +08:00
Toshi Kani
8da8373447 ACPI / processor: Fix STARTING/DYING action in acpi_cpu_soft_notify()
During CPU online/offline testing on a large system, one of the
processors got stuck after the message "bad: scheduling from the
idle thread!".  The problem is that acpi_cpu_soft_notify() calls
acpi_bus_get_device() for all action types.  CPU_STARTING and
CPU_DYING do not allow the notify handlers to sleep.  However,
acpi_bus_get_device() can sleep in acpi_ut_acquire_mutex().

Change acpi_cpu_soft_notify() to return immediately for CPU_STARTING
and CPU_DYING as they have no action in this handler.

Signed-off-by: Toshi Kani <toshi.kani@hp.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-05-16 16:36:03 +02:00
Lan Tianyu
9e50bc14a7 ACPI / battery: Accelerate battery resume callback
Most time of battery resume callback is spent on executing AML code
_BTP, _BIF and _BIF to get battery info, status and set alarm. These
AML methods may access EC operation regions several times and consumes
time.

These operations are not necessary during devices resume and can run
during POST_SUSPEND/HIBERNATION event when all processes are thawed.

This also can avoid removing and adding battery sysfs nodes every system
resume even if the battery unit is not actually changed. The original code
updates sysfs nodes without check and this seems not reasonable.

Signed-off-by: Lan Tianyu <tianyu.lan@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-05-16 16:34:17 +02:00
Rafael J. Wysocki
054c1c4539 Merge branch 'acpi-proc' into acpi-battery 2014-05-16 16:33:32 +02:00
Heikki Krogerus
a3cffce4fb ACPI / platform: add IDs for Broadcom Bluetooth and GPS chips
These IDs are used on Baytrail boards such as Lenovo Miix 2
and Asus Transformer Book T100TA. On lenovo Miix 2 8",
BCM4752 is called LNV4752. All the rest of the IDs are for
Broadcom BCM43241 module with the ID referring to different
revision number.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-05-16 16:31:17 +02:00
Mika Kuoppala
992f191f2c drm/i915: Be careful with non-disp bit in PMINTRMSK
Bit 31 in GEN6_PMINTRMSK is not an interrupt disable bit with gen8.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-05-16 16:28:56 +02:00
Baoquan He
c401eb8ee3 ACPI / processor: Check if LAPIC is present during initialization
In acpi_processor_get_info(), ACPI processor info is initialized including
ID, namely CPU index. Currently, on a UP system running an SMP kerenl with
no LAPIC in the MADT, cpu0_initialized is checked to decide whether or not
the CPU has been initialized.

However, this check may not be sufficient for kdump kernels. Most of time
only 1 CPU is supported because of known problems in kdump kernels. So say
the multiple CPUs are present in the boot kernel and a crash happens on
one specific CPU, say CPU2. Then it jumps into the kdump kernel with
"nr_cpus=1" in the command line. In this situation, the kdump kernel
will reuse the ACPI resources from the crashed kernel directly. That
means all LAPIC instances are enabled in the MADT while only one CPU is
in use.  In the kdump kernel, x86_cpu_to_apicid contains the correct APIC
ID and it's related to the CPU ID. If cpu0_initialized is checked only, 0
will be used as the CPU index instead of that APIC ID, which is not
correct.

In addition to checking cpu0_initialized, check acpi_lapic. If acpi_lapic
is 0, then no LAPIC is available from the MADT and the system should be
treated as a UP one without a LAPIC (that is, assign 0 to the CPU index).
Otherwise, use the original (valid) CPU index.

Signed-off-by: Baoquan He <bhe@redhat.com>
[rjw: Subject and changelog]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-05-16 16:27:35 +02:00
Oscar Mateo
19656430a8 drm/i915: Gracefully handle obj not bound to GGTT in is_pin_display
Otherwise, we do a NULL pointer dereference.

I've seen this happen while handling an error in
i915_gem_object_pin_to_display_plane():

If i915_gem_object_set_cache_level() fails, we call is_pin_display()
to handle the error. At this point, the object is still not pinned
to GGTT and maybe not even bound, so we have to check before we
dereference its GGTT vma.

The IGT kms_flip/bo-too-big tests for this bug.

v2: Chris Wilson says restoring the old value is easier, but that
is_pin_display is useful as a theory of operation. Take the solomonic
decision: at least this way is_pin_display is a little more robust
(until Chris can kill it off).

v3: Chris suggests the WARN in i915_gem_obj_to_ggtt has outlived its
usefulness: add a reminder to remove it.

Issue: VIZ-3772
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Testcase: igt/kms_flip/bo-too-big
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-05-16 16:24:39 +02:00
Leif Lindholm
dfc44f8030 mips: dts: Fix missing device_type="memory" property in memory nodes
A few platforms lack a 'device_type = "memory"' for their memory
nodes, relying on an old ppc quirk in order to discover its memory.
Add the missing data so that all parsing code can find memory nodes
correctly.

Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: <stable@vger.kernel.org>
Acked-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
2014-05-16 15:22:53 +01:00
Leif Lindholm
bfaed5abad arm: dts: Fix missing device_type="memory" for ste-ccu8540
The current .dts for ste-ccu8540 lacks a 'device_type = "memory"' for
its memory node, relying on an old ppc quirk in order to discover its
memory. Fix the data so that all parsing code can handle it correctly.

Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
2014-05-16 15:22:40 +01:00
Laurent Pinchart
2febd99976 ARM: dts: set 'ti,set-rate-parent' for dpll4_m5 path
Set 'ti,set-rate-parent' property for the dpll4_m5x2_mul_ck clock, which
is used for the ISP functional clock. This fixes the OMAP3 ISP driver's
clock rate configuration, which needs the rate to be propagated properly
to the divider node (dpll4_m5_ck).

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-16 17:08:57 +03:00
Laurent Pinchart
e21a4ea3c4 ARM: dts: use ti,fixed-factor-clock for dpll4_m5x2_mul_ck
We need to use set-rate-parent for dpll4_m5 clock path, so use the
ti,fixed-factor-clock version which supports set-rate-parent property.

The set-rate-parent flag itself is set in the following patch, this one
just changes the clock driver to ti,fixed-factor-clock without any other
changes.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-16 17:08:57 +03:00
Dave Gerlach
50b9689408 ARM: dts: am43xx-clocks: use ti, fixed-factor-clock for dpll_per_clkdcoldo
Use the ti,fixed-factor-clock version so that autoidle for
dpll_per_clkdcoldo is properly controlled after power management code
is introduced. Without this the clock may be held active even when
it is gated.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-16 17:08:57 +03:00
Daniel Lezcano
3f04e3d3eb Merge remote-tracking branch 'tip/timers/core/timers/core' into clockevents/3.16 2014-05-16 16:08:32 +02:00
Baoquan He
247dba58a1 ACPI / ia64: introduce variable acpi_lapic into ia64
This variable was defined and assigned in x86, is used to indicate
whether LAPIC exists in MADT. Now introduce it into ia64 to help
make correct judgment when get information for ACPI processor later.

Signed-off-by: Baoquan He <bhe@redhat.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-05-16 16:01:16 +02:00
Marek Kwaczynski
eeab266c0f ath10k: fix pmf for action frames
Fix sending and receiveing protected managment frames.
Lack of protected flag for received protected action frames
causes report these frames as unprotected robust action frames.
If the driver in AP mode sent frame with protected flag and
CCMP header using IEEE80211_KEY_FLAG_SW_MGMT_TX flag,
the FW encrypted frames once again. From user side all
received SA Query Requests and Responses were skipped and
all protected action frames were sent as malformed packets.

Signed-off-by: Marek Kwaczynski <marek.kwaczynski@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-05-16 16:53:07 +03:00
Bartosz Markowski
a6a2f74e56 ath10k: get rid of pci_assign_resource() call from pci_probe
On ARM-based (MSM mach), the pci_assign_resource() is passing
some invalid pointers and leading to L2 cache errors,
what prevents the PCI communication completly.

So far I have not found this funtion to be directly called by
any other wifi driver and did not found this assigning needed
on any other platform. So removing it completely.

Signed-off-by: Bartosz Markowski <bartosz.markowski@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-05-16 16:50:26 +03:00