The reg_read whitelist has a gen bitmask to code the gens we're allowing
the register to be read on. Until now, it was a literal, but we can be
a bit more expressive.
To ease the review, a small test program:
$ cat bit-range.c
#include <stdio.h>
#include <stdint.h>
#define U32_C(x) x ## U
#define GENMASK(h, l) (((U32_C(1) << ((h) - (l) + 1)) - 1) << (l))
#define GEN_RANGE(l, h) GENMASK(h, l)
int main(int argc, char **argv)
{
printf("0x%08x\n", GEN_RANGE(1, 1));
printf("0x%08x\n", GEN_RANGE(1, 2));
printf("0x%08x\n", GEN_RANGE(4, 4));
printf("0x%08x\n", GEN_RANGE(4, 5));
printf("0x%08x\n", GEN_RANGE(1, 31));
printf("0x%08x\n", GEN_RANGE(4, 8));
return 0;
}
$ ./bit-range
0x00000002
0x00000006
0x00000010
0x00000030
0xfffffffe
0x000001f0
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Let's change the i915_cur_delayinfo to i915_frequency_info to be in sync
with new RPS naming convention.
v2: Add "i915_frequency_info" as debugfs interface name (Ben)
Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
These defines are only used in intel_uncore.c.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
That function isn't used outside this file anymore.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
DRM_DEBUG_KMS includes printing the function name.
Signed-off-by: Christoph Jaeger <christophjaeger@linux.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Those values are, global, only used in one function and already stored
in mode_config.cursor_{width,height}.
As a result, this initialization code has been moved from the
crtc_init() function to the global modeset_init() one.
I also renamed CURSOR_{WIDTH,HEIGHT} to MAX_CURSOR_{WIDTH,HEIGHT} to be
more accurate about what these value really are.
Cc: Sagar Kamble <sagar.a.kamble@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Besides D0 device state we need the proper power wells to be on on
some platforms, so get the port power domain reference instead of an RPM
reference.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Antti Koskipää <antti.koskipaa@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Instead of reading out the CD clock rate from the HW at each modeset, do
this only during driver init and resume and use the cached value during
modeset. This moves things towards a state where the sw and hw side
setup is separated. It's also needed for VLV RPM, where we don't put
device into D0 state until modeset_global_resources is called and thus
can't access any display/gfx registers.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Antti Koskipää <antti.koskipaa@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
When trying to determine whether RPS is working as intended, more
information is better. In particular, what interrupts are being
generated and the various thresholds for generating them.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Mesa needs to be able to write OACONTROL in order to expose the
Observability Architecture's performance counters via OpenGL.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
[danvet: Add comment that this is just a temporary work-around and
that we need to check more things before we can allow OACONTROL writes
for real everywhere.]
[danvet 2: Squash in fixup to avoid a DRM_ERROR due to unsorted reg
list, spotted by Jani.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
So userspace can query the kernel for command parser support.
v2: Add i915_cmd_parser_get_version(), history log, and kerneldoc
OTC-Tracker: AXIA-4631
Change-Id: I58af650db9f6753c2dcac9c54ab432fd31db302f
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
PIPE_CONTROL and MI_FLUSH_DW have bits that would write to the
hardware status page. The driver stores request tracking info
there, so don't let userspace overwrite it.
v2: trailing comma fix, rebased
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Various commands that access memory have a bit to determine whether
the graphics address specified in the command should use the GGTT or
PPGTT for translation. These checks ensure that the bit indicates
PPGTT translation.
Most of these checks use the existing bit-checking infrastructure.
The PIPE_CONTROL and MI_FLUSH_DW commands, however, are multi-function
commands. The GGTT/PPGTT bit is only relevant for certain uses of the
command. As such, this change also extends the bit-checking code to
include a "condition" mask and offset. If the condition mask is non-zero
then the parser only performs the bit check when the bits specified by
the condition mask/offset are also non-zero.
NOTE: At this point in the series PPGTT must be enabled for the parser
to work correctly. If it's not enabled, userspace will not be setting
the PPGTT bits the way the parser requires. VLV is the only platform
where this is a problem, so at this point, we disable parsing for VLV.
v2: whitespace and trailing commas fixes, rebased
OTC-Tracker: AXIA-4631
Change-Id: I3f4c76b6734f1956ec47e698230f97d0998ff92b
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
[danvet: Drop the unecessary cast Jani spotted.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The driver leaves most interrupts masked during normal operation,
so there would have to be additional work to enable userspace to
safely request/receive an interrupt.
v2: trailing commas, rebased
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
MI_STORE_REGISTER_MEM, MI_LOAD_REGISTER_MEM, and MI_LOAD_REGISTER_IMM
commands allow userspace access to registers. Only certain registers
should be allowed for such access, so enable checking for those commands.
Each ring gets its own register whitelist.
MI_LOAD_REGISTER_REG on HSW also allows register access but is currently
unused by userspace components. Leave it rejected.
PIPE_CONTROL and MEDIA_VFE_STATE allow register access based on certain
bits being set. Reject those as well.
v2: trailing commas, rebased
OTC-Tracker: AXIA-4631
Change-Id: Ie614a2f0eb2e5917de809e5a17957175d24cc44f
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
These are used to implement scanline waits in the X server.
v2: Use #defines instead of magic numbers
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
These registers are currently used by mesa for blitting,
transform feedback extensions, and performance monitoring
extensions.
v2: REG64 macro
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The Intel DDX uses these to implement scanline waits in the X server.
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The spec defines most of these commands as privileged. A few others,
like the semaphore mbox command and some display commands, are also
reserved for the driver's use. Subsequent patches relax some of
these restrictions.
v2: Rebased
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Add command tables defining irregular length commands for each ring.
This requires a few new command opcode definitions.
v2: Whitespace adjustment in command definitions, sparse fix for !F
OTC-Tracker: AXIA-4631
Change-Id: I064bceb457e15f46928058352afe76d918c58ef5
Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
When PPGTT was disabled by default, the patch also prevented the user
from overriding this behavior via module parameter. Being able to test
this on arbitrary kernels is extremely beneficial to track down the
remaining bugs. The patch that prevented this was:
commit 93a25a9e2d
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Thu Mar 6 09:40:43 2014 +0100
drm/i915: Disable full ppgtt by default
By default PPGTT is set to -1. 0 means off, 1 means aliasing only, 2
means full, all other values are reserved.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This file contains all necessary defines, prototypes and typesdefs for
manipulating GEN graphics address translation (this does not include the
legacy AGP driver)
Reiterating the comment in the header,
"Please try to maintain the following order within this file unless it
makes sense to do otherwise. From top to bottom:
1. typedefs
2. #defines, and macros
3. structure definitions
4. function prototypes
Within each section, please try to order by generation in ascending
order, from top to bottom (ie. GEN6 on the top, GEN8 on the bottom)."
I've made some minor cleanups, and fixed a couple of typos while here -
but there should be no functional changes.
The purpose of the patch is to reduce clutter in our main header file,
making room for new growth, and make documentation of our interfaces
easier by splitting things out.
With a little more work, like making i915_gtt a pointer, we could
potentially completely isolate this header from i915_drv.h. At the
moment however, I don't think it's worth the effort.
Personally, I would have liked to put the PTE encoding functions in this
file too, but I didn't want to rock the boat too much.
A similar patch has been in use on my machine for some time. This exact
patch though has only been compile tested.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Extract all this logic into a new helper function
semaphore_wait_to_signaller_ring because:
- The current code has way too much magic.
- The current code doesn't look at bi16, which encodes VECS signallers
on HSW. Those are just added after the fact, so can't be encoded in
a neat formula.
- The current logic can't blow up since it limits its value range
sufficiently, but that's a bit too tricky to rely on in my opinion.
Especially when we start to add bdw support.
- I'm not a big fan of the explicit ring->semaphore_register list, but
I think it's more robust to use the same mapping both when
constructing the semaphore commands and when decoding them.
- Finally add a FIXME comment about lack of broadwell support here,
like in the earlier ipehr semaphore cmd detection function.
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
[danvet: Actually drop the untrue claim in the commit message Chris
pointed out.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Currently not an issue since we don't emit sempahores, but better
not forget about those.
As a little prep work extract the ipehr decoding for cleaner control
flow. And apply a bit of polish.
Cc: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The documentation calls this GFX_MODE bit "Flush TLB invalidate Mode".
However, that is not a good name for an enable bit as it doesn't make it
clear what is enabled. An even worse name is GFX_TLB_INVALIDATE_ALWAYS
as enabling that bit actually prevents the TLB from being invalidated at
every flush. This leads to great confusion when reading code and
proposed patches. To get around this try to bake in what is enabled by
setting the bit and call it GFX_TLB_INVALIDATE_EXPLICIT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: "Gupta, Sourab" <sourab.gupta@intel.com>
Acked-by: "Gupta, Sourab" <sourab.gupta@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* Support for new AMD models, along with more graceful fallback for
unsupported hw.
* Bunch of fixes from SUSE accumulated from bug reports
* Misc other fixes and cleanups
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Merge tag 'edac_for_3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC updates from Borislav Petkov:
"A bunch of EDAC updates all over the place:
- Support for new AMD models, along with more graceful fallback for
unsupported hw.
- Bunch of fixes from SUSE accumulated from bug reports
- Misc other fixes and cleanups"
* tag 'edac_for_3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
amd64_edac: Add support for newer F16h models
i7core_edac: Drop unused variable
i82875p_edac: Drop redundant call to pci_get_device()
amd8111_edac: Fix leaks in probe error paths
e752x_edac: Drop pvt->bridge_ck
MCE, AMD: Fix decoding module loading on unsupported hw
i5100_edac: Remove an unneeded condition in i5100_init_csrows()
sb_edac: Degrade log level for device registration
amd64_edac: Fix logic to determine channel for F15 M30h processors
edac/85xx: Remove deprecated IRQF_DISABLED
i3200_edac: Add a missing pci_disable_device() on the exit path
i5400_edac: Disable device when unloading module
e752x_edac: Simplify call to pci_get_device()
Because gen6_gt_force_wake_{get,put} should already be responsible for
getting/putting runtime PM. If we keep these calls, debugfs will not
be testing the get/put calls of the forcewake functions.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
If runtime PM is enabled and we unset all modes, we will runtime
suspend after __intel_set_mode() , then function
intel_modeset_check_state() will try to read the HW state while it is
suspended and trigger lots of WARNs because it shouldn't be reading
registers.
So on this patch we make intel_ddi_connector_get_hw_state() return
false in case the power domain is disabled, and we also make
intel_display_power_enabled() return false in case the device is
suspended. Notice that we can't just use
intel_display_power_enabled_sw() because while the driver is being
initialized the power domain refcounts are not reflecting the real
state of the hardware.
Just for reference, I have previously published an alternate patch for
this problem, called "drm/i915: get runtime PM at intel_set_mode".
Testcase: igt/pm_pc8
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
At i915_display_info, don't call cursor_position() for a disabled
CRTC, since the CRTC may be on a powered down pipe, and this will
cause "Unclaimed register before interrupt" error messages.
Testcase: igt/pm_pc8/debugfs-read
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Otherwise we may get some WARNs complaining that we're reading a
register while we're suspended.
Testcase: igt/pm_pc8/debugfs-read
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Added support for LTM4676 to ltc2978 driver.
Converted several drivers to use devm_hwmon_device_register_with_groups.
Various cleanup in several drivers.
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Merge tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
Pull hwmon updates from Guenter Roeck:
- New drivers for ADC128D818, LTC2945, LTC4260, and LTC4222
- Added support for LTM4676 to ltc2978 driver
- Converted several drivers to use devm_hwmon_device_register_with_groups
- Various cleanup in several drivers
* tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (36 commits)
hwmon: (pmbus/ltc2978) Add support for LTM4676
hwmon: (pmbus/ltc2978) Add new chip ID for LTC2974
hwmon: Do not accept invalid name attributes
hwmon: (max6639) Use SIMPLE_DEV_PM_OPS macro
hwmon: (lm95245) Make temp2_crit_hyst read-only
hwmon: (lm95245) Convert to use devm_hwmon_device_register_with_groups
hwmon: (lm95245) Drop useless debug message
hwmon: (lm95245) Fix hysteresis temperatures
hwmon: (max6639) Convert to use devm_hwmon_device_register_with_groups
hwmon: (max6639) Introduce local dev variable, and reduce noisiness
hwmon: (max6650) Introduce local 'dev' variable
hwmon: (max6650) Drop error message after memory allocation failures
hwmon: (max6650) Convert to use devm_hwmon_device_register_with_groups
hwmon: (max6650) Rearrange code to no longer require forward declarations
hwmon: (ltc4215) Convert to devm_hwmon_device_register_with_groups
hwmon: (coretemp) Convert to use devm_hwmon_device_register_with_groups
hwmon: (coretemp) Allocate platform data with devm_kzalloc
hwmon: (coretemp) Use sysfs_create_group to create sysfs attributes
hwmon: (ltc4245) Remove devicetree conditionals
hwmon: (ltc4245) Drop debug messages
...
Pull watchdog updates from Wim Van Sebroeck:
"This patchset contains:
- Various small clean-ups and fixes
- boot logic hanegs for mpc8xxx_wdt
- it87_wdt: Work around non-working CIR interrupts
- iTCO_wdt: Fix the parent device
- Kconfig dependencies
- simplification of code with devm_ioremap_resource() or
platform_driver_probe()
- conversion of xilinx watchdog driver to Generic watchdog Framework
- addition of extra functionality and devices for the xilinx watchdog
driver
- Addition of Tegra watchdog"
* git://www.linux-watchdog.org/linux-watchdog: (38 commits)
watchdog: Fix Elan SC520 dependencies
watchdog: ib700wdt: Use platform_driver_probe
watchdog: geodewdt: Use platform_driver_probe
watchdog: advantechwdt: Use platform_driver_probe
watchdog: acquirewdt: Use platform_driver_probe
watchdog: iTCO_wdt: Fix the parent device
watchdog: it87_wdt: Work around non-working CIR interrupts
watchdog: bcm281xx: Fix Kconfig dependency
watchdog: s3c2410_wdt: Check return value of clk_prepare_enable
watchdog: s3c2410_wdt: Remove unneeded initialization
watchdog: sunxi: Change compatibles
watchdog: orion: prepare new Dove DT Kconfig variable
watchdog: fix checkpatch warnings and error
watchdog: Add tegra watchdog
watchdog: xilinx: Remove no_timeout variable
watchdog: xilinx: Enable this driver for Zynq
watchdog: xilinx: Add missing binding
watchdog: xilinx: Use correct comment indentation
watchdog: xilinx: Use of_property_read_u32
watchdog: xilinx: Fix all printk messages
...
This commit fixes a build error reported by Fengguang, that is
triggered when CONFIG_NETWORK_PHY_TIMESTAMPING is not set:
ERROR: "ptp_classify_raw" [drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.ko] undefined!
The fix is to introduce its own file for the PTP BPF classifier,
so that PTP_1588_CLOCK and/or NETWORK_PHY_TIMESTAMPING can select
it independently from each other. IXP4xx driver on ARM needs to
select it as well since it does not seem to select PTP_1588_CLOCK
or similar that would pull it in automatically.
This also allows for hiding all of the internals of the BPF PTP
program inside that file, and only exporting relevant API bits
to drivers.
This patch also adds a kdoc documentation of ptp_classify_raw()
API to make it clear that it can return PTP_CLASS_* defines. Also,
the BPF program has been translated into bpf_asm code, so that it
can be more easily read and altered (extensively documented in [1]).
In the kernel tree under tools/net/ we have bpf_asm and bpf_dbg
tools, so the commented program can simply be translated via
`./bpf_asm -c prog` where prog is a file that contains the
commented code. This makes it easily readable/verifiable and when
there's a need to change something, jump offsets etc do not need
to be replaced manually which can be very error prone. Instead,
a newly translated version via bpf_asm can simply replace the old
code. I have checked opcode diffs before/after and it's the very
same filter.
[1] Documentation/networking/filter.txt
Fixes: 164d8c6665 ("net: ptp: do not reimplement PTP/BPF classifier")
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Daniel Borkmann <dborkman@redhat.com>
Signed-off-by: Alexei Starovoitov <ast@plumgrid.com>
Cc: Richard Cochran <richardcochran@gmail.com>
Cc: Jiri Benc <jbenc@redhat.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
To avoid WARNs when we call it.
Testcase: igt/pm_pc8/reg-read-ioctl
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75693
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
So far force_wake_timer was only used by gen6_gt_force_wake_put. Since
we always had balanced gen6_gt_force_wake_get/put calls, we could
guarantee balanced calls to intel_runtime_pm_get/put.
Commit 8232644ccf, "drm/i915: Convert
the forcewake worker into a timer func" started scheduling the
force_wake_timer at gen6_read, which resulted in an unbalanced
runtime_pm refcount.
So this commit just reverts to the old behavior until we can find a
proper way to used delayed force_wake from the register read/write
macros without leaving the runtime_pm refcounts unbalanced and without
runtime suspending the driver while forcewake is active.
Testcase: igt/pm_pc8/rte
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76544
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
CONFIG_PROC_DEVICETREE has been removed from the tree. This commit
removes a dangling select of the config symbol.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
Cc: Paul Bolle <pebolle@tiscali.nl>
Cc: Rob Herring <rob.herring@linaro.org>
Atm we reserve/allocate and free the power context during GT power
enable/disable time. There is no need to do this, we can reserve/allocate
the buffer once during driver loading and free it during driver cleanup.
The re-reservation can also fail in case the driver previously manages to
allocate something on the given fixed address.
The buffer isn't exepected to move even if allocated by the BIOS, for
safety add an assert to check this assumption.
This also fixed a bug for Ville, where re-reserving the context failed
during a GPU reset (I assume because something else got allocated on its
fixed address).
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
The "core_ops" variable isn't referenced outside this file and Sparse
complains about it:
drivers/net/ethernet/samsung/sxgbe/sxgbe_core.c:239:29: warning:
symbol 'core_ops' was not declared. Should it be static?
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Bitwise '|' was intended here instead of logical '||'.
Fixes: 1edb9ca69e ('net: sxgbe: add basic framework for Samsung 10Gb ethernet driver')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
"err" is always zero at this point so we always unregister and free the
mdio_bus before returning success. This seems like left over code and
I have deleted it.
Fixes: 1edb9ca69e ('net: sxgbe: add basic framework for Samsung 10Gb ethernet driver')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When using the "separate_tx_channels=1" module parameter, the TX queues are
initially numbered starting from the first TX-only channel number (after all the
RX-only channels). efx_set_channels() renumbers the queues so that they are
indexed from zero.
On EF10, the TX queues need to be relabelled in this way before calling the
dimension_resources NIC type operation, otherwise the TX queue PIO buffers can be
linked to the wrong VIs when using "separate_tx_channels=1".
Added comments to explain UC/WC mappings for PIO buffers
Signed-off-by: Shradha Shah <sshah@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When netback discovers frontend is sending malformed packet it will
disables the interface which serves that frontend.
However disabling a network interface involving taking a mutex which
cannot be done in softirq context, so we need to defer this process to
kthread context.
This patch does the following:
1. introduce a flag to indicate the interface is disabled.
2. check that flag in TX path, don't do any work if it's true.
3. check that flag in RX path, turn off that interface if it's true.
The reason to disable it in RX path is because RX uses kthread. After
this change the behavior of netback is still consistent -- it won't do
any TX work for a rogue frontend, and the interface will be eventually
turned off.
Also change a "continue" to "break" after xenvif_fatal_tx_err, as it
doesn't make sense to continue processing packets if frontend is rogue.
This is a fix for XSA-90.
Reported-by: Török Edwin <edwin@etorok.net>
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Make sure that vxlan_get_rx_port() is present in the kernel build in a manner
consistent with mlx4, else mlx4 can be made built-in where vxlan a module and
the phase of the build linking fails. Add CONFIG_MLX4_EN_VXLAN for that.
Also, #ifdef the advertizement and implementation of the mlx4 vxlan ndo
calls and related code under this config directive.
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Introduce a CONFIG_BE2NET_VXLAN define to control be2net's build
dependency on the VXLAN driver.
Without this fix, the kernel build fails when VxLAN driver is
selected to be built as a module while be2net is built-in.
fixes: c9c47142 ("be2net: csum, tso and rss steering offload support for VxLAN")
Signed-off-by: Sathya Perla <sathya.perla@emulex.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Commit 9b2777d608 (ieee802154: add TX power control to wpan_phy)
and following erroneously added CSMA and CCA parameters for 802.15.4
devices as PHY parameters, while they are actually MAC parameters and
can differ for any two WPAN instances. Since it is now sensible to have
multiple WPAN devices with differing CSMA/CCA parameters, make these
parameters MAC parameters instead.
Signed-off-by: Phoebe Buckheister <phoebe.buckheister@itwm.fraunhofer.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
All 802.15.4 PHY devices with drivers in tree can support only one WPAN
at any given time, yet the stack allows arbitrarily many WPAN devices to
be created and up at the same time. This cannot work with what the
hardware provides, and in the current implementation, provides an easy
DoS vector to any process on the system that may call socket() and
sendmsg().
Thus, allow only one WPAN per PHY to be up at once, just like mac80211
does for managed devices.
Signed-off-by: Phoebe Buckheister <phoebe.buckheister@itwm.fraunhofer.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
A busy release for both cleanups and new drivers this time along with
further factoring out of replicated code into the core:
- Provide support in the core for DMA mapping transfers - essentially
all drivers weren't implementing this properly, now there's no
excuse.
- Dual and quad mode support for spidev.
- Fix handling of cs_change in the generic implementation.
- Remove the S3C_DMA code from the s3c64xx driver now that all the
platforms using it have been converted to dmaengine.
- Lots of improvements to the Renesas SPI controllers.
- Drivers for Allwinner A10 and A31, Qualcomm QUP and Xylinx xtfpga.
- Removal of the bitrotted ti-ssp driver.
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Merge tag 'spi-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi Updates from Mark Brown:
"A busy release for both cleanups and new drivers this time along with
further factoring out of replicated code into the core:
- Provide support in the core for DMA mapping transfers - essentially
all drivers weren't implementing this properly, now there's no
excuse.
- Dual and quad mode support for spidev.
- Fix handling of cs_change in the generic implementation.
- Remove the S3C_DMA code from the s3c64xx driver now that all the
platforms using it have been converted to dmaengine.
- Lots of improvements to the Renesas SPI controllers.
- Drivers for Allwinner A10 and A31, Qualcomm QUP and Xylinx xtfpga.
- Removal of the bitrotted ti-ssp driver"
* tag 'spi-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (199 commits)
spi: Fix handling of cs_change in core implementation
spi: bitbang: Make spi_bitbang_stop() return void
spi: mpc52xx: Convert to use bits_per_word_mask
spi: omap-100k: Fix memory leak
spi: dw: Don't call kfree for memory allocated by devm_kzalloc
spi: fsl-dspi: Fix memory leak
spi: omap-uwire: add missing iounmap
spi: clps711x: Convert to use master->max_speed_hz
spi: clps711x: Enable driver compilation with COMPILE_TEST
spi: omap-uwire: Remove full duplex check
spi: Do not require a completion
spi: topcliff-pch: Transform noisy message to dev_vdbg
spi: coldfire-qspi: Simplify the code to set register bits for transfer speed
spi: bcm63xx: Remove unused define for PFX
spi: efm32: use $vendor,$device scheme for compatible string
spi: clps711x: Remove <mach/hardware.h> dependency
spi: topcliff-pch: Properly unregister platform devices on probe() error paths
spi: fsl-espi: Remove unused bits_per_word variable in fsl_espi_bufs
spi: altera: Remove the code to get unused platform_data
spi: fsl-lib: Fix memory leak of pinfo
...
This release has lots and lots of small cleanups and fixes in the
regulator subsystem, mainly cleaning up some bad patterns that got
duplicated in DT code, but otherwise very little of note outside
of the scope of the relevant drivers:
- Support for configuration of the initial state for gpio regulators
with multi-voltage support.
- Support for calling regulator_set_voltage() on fixed regulators.
- New drivers for Broadcom BCM590xx, Freescale pfuze200, Samsung S2MPA01 &
S2MPS11/4, some PWM controlled regulators found on some ST boards and
TI TPS65218.
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Merge tag 'regulator-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"This release has lots and lots of small cleanups and fixes in the
regulator subsystem, mainly cleaning up some bad patterns that got
duplicated in DT code, but otherwise very little of note outside of
the scope of the relevant drivers:
- Support for configuration of the initial state for gpio regulators
with multi-voltage support.
- Support for calling regulator_set_voltage() on fixed regulators.
- New drivers for Broadcom BCM590xx, Freescale pfuze200, Samsung
S2MPA01 & S2MPS11/4, some PWM controlled regulators found on some
ST boards and TI TPS65218"
* tag 'regulator-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (154 commits)
regulator: aat2870: Use regulator_map_voltage_ascend
regulator: st-pwm: Convert to get_voltage_sel
regulator: Add new driver for ST's PWM controlled voltage regulators
regulator: bcm590xx: Remove **rdev from struct bcm590xx_reg
regulator: bcm590xx: Make the modalias matches the driver name
regulator: s5m8767: Convert to use regulator_[enable|disable|is_enabled]_regmap
regulator: db8500-prcmu: Set 1.8V as a fixed voltage for vsmps2
regulator: s2mps11: Add missing of_node_put
regulator: s2mps11: Use of_get_child_by_name
Documentation: mfd: s2mps11: Document support for S2MPS14
regulator: s2mps11: Add set_suspend_disable for S2MPS14
regulator: s2mps11: Add support for S2MPS14 regulators
regulator: max8660: Fix brace alignment
regulator: dbx500: use seq_puts() instead of seq_printf()
regulator: dbx500-prcmu: Silence checkpatch warnings
regulator: anatop: Remove checking control_reg in [set|get]_voltage_sel
regulator: max8952: Silence checkpatch warning
regulator: max8925: Silence checkpatch warning
regulator: max8660: Silence checkpatch warnings
regulator: arizona-ldo1: Correct default regulator init_data
...
