Replace the string with plain NULL.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Change the register name strings in the comments for the
twl6040_reg table, so it is easier to search for specific
register.
This is cosmetic change.
Before we had for example:
TWL6040_REG_HSLCTL as register definition.
At the register table we had:
TWL6040_HSLCTL
Searching for TWL6040_HSLCTL resulted no hits.
While if we look for REG_HSLCTL, we can find the places
the register has been used.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The default gains on outputs/inputs are set to 0dB.
This is fixing the pop noise issue at the first playback, which
caused by the wrong starting point of the ramp code.
The ramp code for the outputs expects the gains to be in
their lowest configuration in order to be effective.
After the playback stops, the ramp code takes care of
ramping down the gains to their minimum.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This patch fixes a build error, introduced by commit (67fc8b9f, "PM: add
runtime PM support to core Primecell driver") which unfortunately was a little
bit incomplete and did contain a typo (11 instead of 22).
I'm not sure how this patch could have been tested back then, if it
doesn't even compile ;)
The build failure was:
drivers/spi/spi-pl022.c:2292: error: 'adev' undeclared (first use in
this function)
drivers/spi/spi-pl022.c:2344: error: 'pl022_suspend' undeclared here
(not in a function)
The build failure appears e.g. for the u8500 and realview defconfig.
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add runtime PM support to the MMCI primecell driver, making use of
the core primecell bus runtime PM support.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add runtime PM support to the core Primecell driver, following the PCI
model of how this is done.
Rather than having every driver fiddle about with enabling runtime PM,
that's dealt with in the core and instead, drivers just do a put() in
their probe and a balancing get() in their remove function to activate
runtime PM for the device.
As we're dealing with enabling runtime PM in the core, fix up spi-pl022
as it must not enable and disable runtime PM itself anymore.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
If irqs are disabled when preemption count reaches zero, the
preemptirqsoff tracer should not flag that as the end.
When interrupts are enabled and preemption count is not zero
the preemptirqsoff correctly continues its tracing.
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
For Seaboard's internal eMMC, this makes the difference between a
5.5MB/s and 10.2MB/s transfer rate. On Harmony, there wasn't any
measurable difference on my cheap/slow ~2MB/s card.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This architecture received only generic maintenance since December 2009
when it was originally submitted, and no actual additional support since
then. It has no defconfig entry either, meaning that it was never built
by the ARM KAutobuild. Incidentally it currently doesn't build either
when CONFIG_MACH_NUC932EVB is selected which is the only possible config
choice.
This is therefore dead code and should be removed. If someone wants to
revive this code, it could be retrieved from the Git repository, and
ideally be merged in mach-w90x900/ instead.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The protocol differs by having two toggle bits in the scancode. Since
one of the bits is otherwise unused, we can safely handle the bits
unconditionally.
[mchehab@redhat.com: Fix some bad whitespacing]
Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Commit 9676001559
("ALSA: fm801: add error handling if auto-detect fails") seems to
break systems that were previously working without a tuner.
As a bonus, this should fix init and cleanup for the case where the
tuner is explicitly disabled.
Reported-and-tested-by: Hor Jiun Shyong <jiunshyong@gmail.com>
References: http://bugs.debian.org/641946
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: stable@kernel.org [v3.0+]
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The ati_remote_dump() function tries to not print "Weird byte" warning
for 1-byte responses that contain 0xff or 0x00, but it doesn't work
properly as it simply falls back to the "Weird data" warning in the else
clause.
Fix that by adding an inner if clause.
Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Commit 9676001559
("ALSA: fm801: add error handling if auto-detect fails") added
incorrect error handling.
Once we have successfully called snd_device_new(), the cleanup
function fm801_free() will automatically be called by snd_card_free()
and we must *not* also call fm801_free() directly.
Reported-by: Hor Jiun Shyong <jiunshyong@gmail.com>
References: http://bugs.debian.org/641946
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: stable@kernel.org [v3.0+]
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The keycode mangling algorithm is kept the same, so the new external
keymap has the same values as the old static table.
[mchehab@redhat.com: Fix some bad whitespacing]
Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
The driver will be migrated to the RC driver API in a following
commit.
[mchehab@redhat.com: Fix some bad whitespacing]
Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
On ux500 the MTU timer blocks are powered off during
suspend/resume, so these need some reinitialization when
coming back from suspend.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We make the reset function from the driver public, then
we also move of all register defines from the public header
file into driver, where they belong.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds support for a periodic mode in the MTU (Nomadik)
timer clockevent driver. It also include changes needed for
deeper powerstates where MTU block gets powered off.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Just split off the timer code to its own file so we have a
more fine-grained file tree.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds support for the DBX500 PRCMU clocksource
to ux500 platforms.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.co>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds the DBX500 PRCMU Timer driver as a clocksource
and as sched_clock.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com>
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch makes it possible to configure away the sched_clock
part of the MTU timer.
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com>
Signed-off-by: Jonas Aberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The type of a media entity is default for this driver. This patch makes it
explicitly defined as MEDIA_ENT_T_V4L2_SUBDEV_FLASH.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Register values changed according to the data sheet and Texas Instruments DaVinci_PSP_03_02_00_37.
- TVP7002_RGB_COARSE_CLAMP_CTL changed to the default value in data sheet.
- TVP7002_HPLL_PHASE_SEL deleted because the registers write to reserved bits. The default value works fine.
Signed-off-by: Mats Randgaard <mats.randgaard@tandberg.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Apparently U8500 U-Boot versions may leave the l2x0 locked down
before executing the kernel. Make sure we unlock it before we
initialize the l2x0. This fixes a performance problem reported
by Jan Rinze.
The l2x0 core has been modified to unlock the l2x0 by default,
but it will not touch the locking registers if the l2x0 was
already enabled, as on the ux500, so we need this quirk to
make sure it is properly turned off.
Cc: stable@kernel.org
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
Cc: Adrian Bunk <adrian.bunk@movial.com>
Reported-by: Jan Rinze <janrinze@gmail.com>
Tested-by: Robert Marklund <robert.marklund@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This applies ARM errata fix 754322 for all ux500 platforms.
Cc: stable@kernel.org
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Include <asm/aes.h> to pick up the declarations for crypto_aes_encrypt_x86
and crypto_aes_decrypt_x86 to quiet the sparse noise:
warning: symbol 'crypto_aes_encrypt_x86' was not declared. Should it be static?
warning: symbol 'crypto_aes_decrypt_x86' was not declared. Should it be static?
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Mandeep Singh Baines <msb@chromium.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
When the ipr driver decides to dump the adapter, it changes the
sdt_state to GET_DUMP, then prepares the adapter so that the dump
can be read. However, if the ipr worker thread wakes up for some
reason before the driver has put the adapter in a state where it
can succesfully dump the adapter, the driver will start dumping
the adapter too early, which can potentially trigger a BUG check
in the pci config blocking API. Fix this by adding a new
sdt_state to differentiate between the ipr driver wanting to dump
the adapter in the near future and wanting to dump the adapter now.
Signed-off-by: Brian King <brking@linux.vnet.ibm.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Patch adds x86_64 assembly implementation of blowfish. Two set of assembler
functions are provided. First set is regular 'one-block at time'
encrypt/decrypt functions. Second is 'four-block at time' functions that
gain performance increase on out-of-order CPUs. Performance of 4-way
functions should be equal to 1-way functions with in-order CPUs.
Summary of the tcrypt benchmarks:
Blowfish assembler vs blowfish C (256bit 8kb block ECB)
encrypt: 2.2x speed
decrypt: 2.3x speed
Blowfish assembler vs blowfish C (256bit 8kb block CBC)
encrypt: 1.12x speed
decrypt: 2.5x speed
Blowfish assembler vs blowfish C (256bit 8kb block CTR)
encrypt: 2.5x speed
Full output:
http://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-blowfish-asm-x86_64.txthttp://koti.mbnet.fi/axh/kernel/crypto/tcrypt-speed-blowfish-c-x86_64.txt
Tests were run on:
vendor_id : AuthenticAMD
cpu family : 16
model : 10
model name : AMD Phenom(tm) II X6 1055T Processor
stepping : 0
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Add ctr(blowfish) speed test to receive results for blowfish x86_64 assembly
patch.
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Rename blowfish to blowfish_generic so that assembler versions of blowfish
cipher can autoload. Module alias 'blowfish' is added.
Also fix checkpatch warnings.
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Patch splits up the blowfish crypto routine into a common part (key setup)
which will be used by blowfish crypto modules (x86_64 assembly and generic-c).
Also fixes errors/warnings reported by checkpatch.
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Gracefully handle bnx2fc_map_sg failure, so that queuecommand returns host busy
and SCSI-ml can retry the IO.
Signed-off-by: Bhanu Prakash Gollapudi <bprakash@broadcom.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
scsi_dma_map doesn't work for NPIV since vport dev isn't fully initialized.
For more details: http://marc.info/?l=linux-scsi&m=118312448030633&w=2 and
commit - c59fd9ebc4.
Signed-off-by: Nithin Sujir <nsujir@broadcom.com>
Signed-off-by: Bhanu Prakash Gollapudi <bprakash@broadcom.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
When READ_16 command is issued, the setting of SILI Bit in CDB is confirmed
and if SILI bit is off, the processing of relavent Errata is executed.
Added code for checking SILI bit for READ_16 as described in "SSC-4".
Signed-off-by: Nagalakshmi Nandigama <nagalakshmi.nandigama@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
The OSD protocol calls for all kind of security levels that use
CRYPTO_HMAC and SH1, but the current code only supports NO_SEC,
which does not use any of these.
Remove a wrong FIXME that calls for them. Thanks Maxin for
reporting on this.
Reported-by: "Maxin B. John" <maxin.john@gmail.com>
Signed-off-by: Boaz Harrosh <bharrosh@panasas.com>
Sizeof a pointer-typed expression returns the size of the pointer, not that
of the pointed data.
The semantic patch that fixes this problem is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@@
expression *e;
type T;
identifier f;
@@
f(...,(T)e,...,
-sizeof(e)
+sizeof(*e)
,...)
// </smpl>
Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Mutual exclusion is redundant here because all the paths in the call graph
leading to esp_driver_ops.send_dma_cmd() happen under spin_lock_irqsave/
spin_lock_irqrestore. Remove it.
Tested on a Mac Quadra 660av and a Mac LC 630.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Support added for controllers capable of multi reply queues.
The following are the modifications to the driver to support NUMA.
1) Create the new structure adapter_reply_queue to contain the reply queue
info for every msix vector. This object will contain a
reply_post_host_index, reply_post_free for each instance, msix_index, among
other parameters. We will track all the reply queues on a link list called
ioc->reply_queue_list. Each reply queue is aligned with each IRQ, and is
passed to the interrupt via the bus_id parameter.
(2) The driver will figure out the msix_vector_count from the PCIe MSIX
capabilities register instead of the IOC Facts->MaxMSIxVectors. This is
because the firmware is not filling in this field until the driver has
already registered MSIX support.
(3) If the ioc_facts reports that the controller is MSIX compatible in the
capabilities, then the driver will request for multiple irqs. This count
is calculated based on the minimum between the online cpus available and
the ioc->msix_vector_count. This count is reported to firmware in the
ioc_init request.
(4) New routines were added _base_free_irq and _base_request_irq, so
registering and freeing msix vectors were done thru simple function API.
(5) The new routine _base_assign_reply_queues was added to align the msix
indexes across cpus. This will initialize the array called
ioc->cpu_msix_table. This array is looked up on every MPI request so the
MSIxIndex is set appropriately.
(6) A new shost sysfs attribute was added to report the reply_queue_count.
(7) User needs to set the affinity cpu mask, so the interrupts occur on the
same cpu that sent the original request.
Signed-off-by: Nagalakshmi Nandigama <nagalakshmi.nandigama@lsi.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This patch adds couple more Vendor/Product IDs for RDAC.. There are no
functional changes.
Signed-off-by: Babu Moger <babu.moger@netapp.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
