The async unlink behavior has been working over years. The option was
provided only as a workaround for 2.4.x kernel. Let's get rid of it.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Fix a copy paste error in iwl_calc_basic_rates which leads
to a wrong calculation of CCK basic rates.
Cc: stable@vger.kernel.org
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
From Rob Herring:
Add cpuidle driver support for Calxeda Highbank SOC.
* tag 'highbank-cpuidle' of git://sources.calxeda.com/kernel/linux:
cpuidle: add Calxeda SOC idle support
From Rob Herring:
Use common debug_ll_init function and remove the static mapping code
from mach-highbank.
* tag 'highbank-debugll-cleanup' of git://sources.calxeda.com/kernel/linux:
ARM: highbank: use common debug_ll_io_init
ARM: implement debug_ll_io_init()
From Pawel Moll:
* 'vexpress-clk-soc' of git://git.linaro.org/people/pawelmoll/linux:
ARM: vexpress: Remove motherboard dependencies in the DTS files
ARM: vexpress: Start using new Versatile Express infrastructure
ARM: vexpress: Add config bus components and clocks to DTs
mfd: Versatile Express system registers driver
mfd: Versatile Express config infrastructure
From Mike Turquette:
* depends/clk:
clk: Common clocks implementation for Versatile Express
clk: Versatile Express clock generators ("osc") driver
CLK: clk-twl6040: Initial clock driver for OMAP4+ McPDM fclk clock
clk: fix return value check in sirfsoc_of_clk_init()
clk: fix return value check in of_fixed_clk_setup()
clk: ux500: Update sdmmc clock to 100MHz for u8500
clk: ux500: Support prcmu ape opp voltage clock
mfd: dbx500: Export prmcu_request_ape_opp_100_voltage
clk: Don't return negative numbers for unsigned values with !clk
clk: Fix documentation typos
clk: Document .is_enabled op
clk: SPEAr: Vco-pll: Fix compilation warning
From Stephen Warren:
ARM: bcm2835: defconfig updates
procfs and sysfs are enabled in bcm2835_defconfig.
* tag 'bcm2835-for-3.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: enable procfs and sysfs in defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
From Stephen Warren:
ARM: bcm2835: core SoC enhancements
A machine restart/reboot implementation is added. The GPIO/pinmux
controller is instantiated, and dummy gpio.h added.
* tag 'bcm2835-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: enable GPIO/pinctrl
ARM: bcm2835: implement machine restart hook
Signed-off-by: Olof Johansson <olof@lixom.net>
From Stephen Warren:
ARM: tegra: defconfig update
Many new features are enabled in tegra_defconfig:
* BRCMFMAC: wlan driver, enable as module.
* MTD, MTD_CHAR, MTD_M25P80, SPI_TEGRA20_SLINK, CONFIG_SPI_TEGRA20_SFLASH
to enable serial flash on Cardhu and TrimSlice.
* PWM/backlight features for use with tegradrm.
* tegradrm; Tegra's new display driver.
* CMA, so that tegradrm can allocate large buffers.
* SquashFS, which is used as the root filesystem on boards based on
the Tamonten processor module.
* tag 'tegra-for-3.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: defconfig updates
From Stephen Warren:
ARM: tegra: cpuidle enhancements
A cpuidle state "LP2" is added, which power-gates the CPUs. Support for
CPUs 1..n is essentially complete, although support for CPU0 could
benefit from future use of coupled-cpuidle or similar techniques.
A couple of very minor cleanups to cpuidle were included too.
This pull request is based on tegra-for-3.8-soc.
* tag 'tegra-for-3.8-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: retain L2 content over CPU suspend/resume
ARM: tegra30: cpuidle: add powered-down state for CPU0
ARM: tegra30: flowctrl: add cpu_suspend_exter/exit function
ARM: tegra30: clocks: add CPU low-power function into tegra_cpu_car_ops
ARM: tegra30: common: enable csite clock
ARM: tegra30: cpuidle: add powered-down state for secondary CPUs
ARM: tegra: cpuidle: add CPU resume function
ARM: tegra: cpuidle: separate cpuidle driver for different chips
ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX"
ARM: tegra: cpuidle: replace LP3 with ARM_CPUIDLE_WFI_STATE
From Stephen Warren:
ARM: tegra: core SoC code enhancements
Various small clock initialization table and driver changes to support
WiFi modules, SPI controllers, and host1x (graphics/display hardware).
Various AHB/APB-related clocks were added to the Tegra30 clock driver.
The level 2 cache initialization is now driven by data from device tree,
and the cache configuration tweaked.
AUXDATA is added to support SPI controllers and host1x.
Code to decode Tegra's "speedo" process identification fuses is added.
This pull request is based on tegra-for-3.8-cleanup.
* tag 'tegra-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (26 commits)
ARM: tegra: Add Tegra30 host1x clock support
ARM: tegra: Add AUXDATA for Tegra30 host1x
ARM: tegra: Add Tegra20 host1x clock support
ARM: tegra: Add AUXDATA for Tegra20 host1x
ARM: tegra: Tegra30 speedo-based process identification
ARM: tegra: Add speedo-based process identification
ARM: tegra: flexible spare fuse read function
ARM: tegra: Implement 6395/1 for Tegra
ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
ARM: tegra: enable data prefetch on L2
ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt
ARM: tegra: common: using OF api for L2 cache init
ARM: tegra: dt: add L2 cache controller
ARM: tegra30: clocks: add AHB and APB clocks
ARM: tegra: set up wlan clocks for tegra dt
ARM: tegra: move irammap.h to mach-tegra
ARM: tegra: move iomap.h to mach-tegra
ARM: tegra: remove <mach/dma.h>
ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/
ARM: tegra: remove unnecessary includes of <mach/*.h>
...
avoids needs for CONFIG_REGULATOR in sdhci.c
Signed-off-by: Philip Rakity <prakity@nvidia.com>
Reviewed-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Remove empty unused mach/hardware.h.
mach/irqs.h is unused because SPARSE_IRQ are ON by default.
mach/timex.h is unused because of CONFIG_ARCH_MULTIPLATFORM.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
The majority of changes are necessary to remove dependencies on header
files within arch/arm/mach-zynq/include/mach:
uncompress.h
- Deleted. It is unused for ARCH_MULTIPLATFORM builds.
uart.h:
- Move uart definitions out of uart.h into debug/zynq.S, which is
now the only user
zynq_soc.h:
- Move SCU address definitions into common.c.
- Other #defines, such as PERIPHERAL_CLOCK_RATE, TTC0_BASE, etc, are
unused and can be dropped
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Convert low-level debugging routines to make use of debug_ll_io_init().
This is part of the preparation for ARCH_MULTIPLATFORM support for Zynq.
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Now that the TTC driver has proper support for DT bindings, it is not
necessary for the registers to be mapped early. They will be mapped
during clock initialization using of_iomap(). Remove the early mapping.
In addition, remove the extraneous zynq_soc.h include from the timer
driver.
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
This patch implements map_voltage and list_voltage callbacks to properly handle
the case voltage range that doesn't start with 0 offset.
Now we adjust the selector in map_voltage() before calling set_voltage_sel().
And return 0 in list_voltage() for invalid selectors.
With above change, we can remove da9055_regulator_set_voltage_bits function.
One tricky part is that we need adding voffset to n_voltages.
Although for the cases "selector < voffset" are invalid, we need add voffset to
n_voltage so regulator_list_voltage() won't fail while checking the boundary for
selector before calling list_voltage callback.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Ashish Jangam <ashish.jangam@kpitcummins.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
'rt' was dereferenced before the NULL check.
Moved the code after the check.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Return the value obtained from snd_pcm_hw_constraint_minmax() instead
of -EINVAL. Silences the following smatch warning:
sound/core/pcm_native.c:2003 snd_pcm_hw_constraints_complete() info:
why not propagate 'err' from snd_pcm_hw_constraint_minmax() instead of -22?
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
From Lee Jones. It's an update of the previous ux500/dt branch with a few more
patches:
* 'ste-dt-for-next' of git://git.linaro.org/people/ljones/linux-3.0-ux500:
ARM: ux500: Describe UART platform registering issues more accurately
ARM: ux500: Enable all MMC devices on the u9540 when booting with DT
ARM: ux500: Enable SDI4 port on the u9540 when booting with Device Tree
ARM: ux500: Add UART support to the u9540 Device Tree
ARM: ux500: Add skeleton DTS file for the u9540
ARM: ux500: Add SDI (MMC) support to the HREF Device Tree
ARM: ux500: Move regulator-name properties out to board DTS files
Signed-off-by: Olof Johansson <olof@lixom.net>
If this array is not cleared, the jack related code later might
fail to create "Internal Speaker Phantom Jack" on Dell Inspiron 3420 and
Dell Vostro 2420.
BugLink: https://bugs.launchpad.net/bugs/1076840
Cc: stable@vger.kernel.org (3.6+)
Signed-off-by: David Henningsson <david.henningsson@canonical.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This is introduced by commit 9ab6e988
"gpiolib: return any error code from range creation".
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
To be crystal clear on what the arguments mean in this
funtion dealing with both GPIO and PIN ranges with confusing
naming, we now have gpio_offset and pin_offset and we are
on the clear that these are offsets into the specific GPIO
and pin controller respectively. The GPIO chip itself will
of course keep track of the base offset into the global
GPIO number space.
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This time, only one patch: Adding the motor PWM to lpc32xx.dtsi
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Merge tag 'lpc32xx-dts-for-3.7' of git://git.antcom.de/linux-2.6 into next/dt
From Roland Stigge:
DTS updates for the LPC32xx Soc for 3.7
This time, only one patch: Adding the motor PWM to lpc32xx.dtsi
* tag 'lpc32xx-dts-for-3.7' of git://git.antcom.de/linux-2.6:
ARM: LPC32xx: Add the motor PWM to base dts file
Signed-off-by: Olof Johansson <olof@lixom.net>
Just a few minor/trivial cleanups.
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Merge tag 'bcm2835-for-3.8-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/cleanup
From Stephen Warren:
ARM: bcm2835: cleanup
Just a few minor/trivial cleanups.
* tag 'bcm2835-for-3.8-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: remove useless variables from Makefile.boot
ARM: bcm2835: Fix typo in the error message
ARM: bcm2835: Add missing static modifiers
Various cleanups and enhancements are made to core Tegra code towards the
aim of including Tegra in a multi-platform ARM kernel:
RTC, timer, and TWD are configured via device tree.
SPARSE_IRQ is enabled.
Tegra's debug_ll options are simplified, and the macros brought into
line with other multi-platform implementations, and moved to the new
common location.
Two headers still need to be eliminated in order to include Tegra in a
multi-platform kernel/ <mach/{clk,powergate}.h>. A new common API needs
to be invented to replace parts of clk.h. powergate.h might be replaced
by regulators; this needs more investigation.
This pull request is based on tegra-for-3.8-dt, followed by a merge of
arm-soc's devel/debug_ll_init branch.
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Merge tag 'tegra-for-3.8-single-zimage' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/multiplatform
From Stephen Warren:
ARM: tegra: single-zImage preparation work
Various cleanups and enhancements are made to core Tegra code towards the
aim of including Tegra in a multi-platform ARM kernel:
RTC, timer, and TWD are configured via device tree.
SPARSE_IRQ is enabled.
Tegra's debug_ll options are simplified, and the macros brought into
line with other multi-platform implementations, and moved to the new
common location.
Two headers still need to be eliminated in order to include Tegra in a
multi-platform kernel/ <mach/{clk,powergate}.h>. A new common API needs
to be invented to replace parts of clk.h. powergate.h might be replaced
by regulators; this needs more investigation.
This pull request is based on tegra-for-3.8-dt, followed by a merge of
arm-soc's devel/debug_ll_init branch.
* tag 'tegra-for-3.8-single-zimage' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (58 commits)
ARM: tegra: move debug-macro.S to include/debug
ARM: tegra: don't include iomap.h from debug-macro.S
ARM: tegra: decouple uncompress.h and debug-macro.S
ARM: tegra: simplify DEBUG_LL UART selection options
ARM: tegra: select SPARSE_IRQ
ARM: tegra: enhance timer.c to get IO address from device tree
ARM: tegra: enhance timer.c to get IRQ info from device tree
ARM: timer: fix checkpatch warnings
ARM: tegra: add TWD to device tree
ARM: tegra: define DT bindings for and instantiate RTC
ARM: tegra: define DT bindings for and instantiate timer
ARM: tegra: whistler: enable HDMI port
ARM: tegra: tec: Enable HDMI output
ARM: tegra: plutux: Enable HDMI output
ARM: tegra: tamonten: Add host1x support
ARM: tegra: trimslice: enable HDMI port
ARM: tegra: harmony: enable HDMI port
ARM: tegra: Add Tegra30 host1x support
ARM: tegra: Add Tegra20 host1x support
ARM: tegra: trimslice: enable SPI flash
...
A wide variety of device tree additions are made across many Tegra
boards:
* WiFi is supported on Seaboard, Ventana, and Cardhu.
* An I2C mux is added for Ventana, and Tamonten.
* SPI flash is added to Cardhu, and TrimSlice.
* Temperature sensors are added to Harmony, Tamonten, and Ventana.
* host1x (graphics/display controller) is added to the SoC include files.
* HDMI displays are enabled on Harmony, TrimSlice, Tamonten, Plutux, Tec,
and Whistler.
This pull request is based on tegra-for-3.8-soc.
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Merge tag 'tegra-for-3.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt
From Stephen Warren:
ARM: tegra: device tree changes
A wide variety of device tree additions are made across many Tegra
boards:
* WiFi is supported on Seaboard, Ventana, and Cardhu.
* An I2C mux is added for Ventana, and Tamonten.
* SPI flash is added to Cardhu, and TrimSlice.
* Temperature sensors are added to Harmony, Tamonten, and Ventana.
* host1x (graphics/display controller) is added to the SoC include files.
* HDMI displays are enabled on Harmony, TrimSlice, Tamonten, Plutux, Tec,
and Whistler.
This pull request is based on tegra-for-3.8-soc.
* tag 'tegra-for-3.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (47 commits)
ARM: tegra: whistler: enable HDMI port
ARM: tegra: tec: Enable HDMI output
ARM: tegra: plutux: Enable HDMI output
ARM: tegra: tamonten: Add host1x support
ARM: tegra: trimslice: enable HDMI port
ARM: tegra: harmony: enable HDMI port
ARM: tegra: Add Tegra30 host1x support
ARM: tegra: Add Tegra20 host1x support
ARM: tegra: trimslice: enable SPI flash
ARM: tegra: dts: add sflash controller dt entry
ARM: tegra: ventana: Add NCT1008 temperature sensor
ARM: tegra: tamonten: Add NCT1008 temperature sensor
ARM: tegra: harmony: Add ADT7641 temperature sensor
ARM: tegra: tec: Remove redundant DT properties
ARM: tegra: tamonten: Add DDC/PTA pinmux
ARM: tegra: dts: cardhu: enable SLINK4
ARM: tegra: dts: add slink controller dt entry
ARM: dt: tegra: ventana: define pinmux for ddc
ARM: dt: t30 cardhu: set pinmux and power for wlan
ARM: dt: t20 ventana: set pinmux and power for wlan
...
Various trivial cleanup changes of the Tegra code for 3.8.
Many of the changes simply remove useless #include statements, which
enable those headers to be removed or moved later, as work towards
multi-platform zImage support.
<mach/{iram,io}map.h> are moved up to arch/arm/mach-tegra to prevent
any new code outside mach-tegra from using them.
Finally, the regulator definitions in all board device tree files are
updated to use the new simpler syntax that was agreed upon.
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Merge tag 'tegra-for-3.8-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup
From Stephen Warren:
ARM: tegra: cleanup for 3.8
Various trivial cleanup changes of the Tegra code for 3.8.
Many of the changes simply remove useless #include statements, which
enable those headers to be removed or moved later, as work towards
multi-platform zImage support.
<mach/{iram,io}map.h> are moved up to arch/arm/mach-tegra to prevent
any new code outside mach-tegra from using them.
Finally, the regulator definitions in all board device tree files are
updated to use the new simpler syntax that was agreed upon.
* tag 'tegra-for-3.8-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
ARM: tegra: move irammap.h to mach-tegra
ARM: tegra: move iomap.h to mach-tegra
ARM: tegra: remove <mach/dma.h>
ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/
ARM: tegra: remove unnecessary includes of <mach/*.h>
iommu: tegra: remove include of <mach/iomap.h>
staging: nvec: remove include of <mach/iomap.h>
crypto: tegra: remove include of <mach/clk.h>
ARM: tegra: update *.dts for regulator-compatible deprecation
usb: phy: tegra remove include of <mach/iomap.h>
usb: host: tegra remove include of <mach/iomap.h>
We found a new codec ID 292, and that just a simple quirk would enable
sound output/input on this ALC292 chip.
BugLink: https://bugs.launchpad.net/bugs/1081466
Cc: stable@vger.kernel.org
Tested-by: Acelan Kao <acelan.kao@canonical.com>
Signed-off-by: David Henningsson <david.henningsson@canonical.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Marvell's PXA/MMP silicon also match the behavior of pinctrl-single.
Each pin binds to one register. A lot of pins could be configured
as gpio.
GPIO range is defined as a child node of pinmux in .dtsi file. If those
pins are with the same gpio function configuration in the pinmux
register, they could be defined in the same GPIO range. For this new
child node, two properties are used.
reg = <the start of pinmux register in range, size of range>
pinctrl-single,gpio: <gpio base in range, the gpio function of the range
in the pinmux register>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
In Marvell PXA/MMP silicons, input schmitt disable value is 0x40, not 0.
So append new config parameter -- input schmitt disable.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Let's stop spawning the pinctrl driver from the GPIO driver,
we have these two mechanisms broken apart now, and they can
each probe in isolation. If the GPIO driver cannot find its
pin controller (pinctrl-u300), the pin controller core will
tell it to defer probing.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Instead of having the pinctrl driver register the GPIO range
for the gpio_chip, making it necessary to instantiate the
pin controller from the GPIO driver and pass the GPIO chip as
platform data, now let the GPIO chip driver register it's own
ranges and have the pinctrl driver look up the GPIO chip from
the pinctrl core as necessary.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a function to the pinctrl core to retrieve the GPIO
range associated with a certain pin for a certain controller.
This is needed when a pinctrl driver want to look up the
corresponding struct gpio_chip for a certain pin. As the
GPIO drivers can now create these ranges themselves, the
pinctrl driver no longer knows about all its associated GPIO
chips.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
If we try to create a range for a certain GPIO chip and the
target pin controller is not yet available it may return
a probe deferral error code, so handle this all the way
our by checking the error code.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This makes the pinctrl_find_and_add_gpio_range() return
-EPROBE_DEFER if the range hosting pin controller cannot be
located. We may assume that the common case for why adding a
range fails is that the targe pin controller device has not
probed yet.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Rename the function find_pinctrl_and_add_gpio_range()
to pinctrl_find_and_add_gpio_range() so as to be consistent
with the rest of the functions.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Like with commit 3c739ad0df
it is not always enough to specify all the pins of a gpio_chip
from offset zero to be added to a pin map range, since the
mapping from GPIO to pin controller may not be linear at all,
but need to be broken into a few consecutive sub-ranges or
1-pin entries for complicated cases. The ranges may also be
sparse.
This alters the signature of the function to accept offsets
into both the GPIO-chip local pinspace and the pin controller
local pinspace.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
- conversion of watchdog to DT
- usart definition for evk-pro3 board
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Merge tag 'at91-for-next-dt' of git://github.com/at91linux/linux-at91 into next/dt
From Nicolas Ferre:
More DT material for AT91:
- conversion of watchdog to DT
- usart definition for evk-pro3 board
* tag 'at91-for-next-dt' of git://github.com/at91linux/linux-at91:
ARM: at91/dts: evk-pro3: enable watchdog
ARM: at91/dts: add at91sam9_wdt driver to at91sam926x, at91sam9g45
watchdog: at91sam9_wdt: add device tree support
ARM: at91: dt: evk-pro3: enable uart0 and uart2
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Merge tag 'at91-header' of git://github.com/at91linux/linux-at91 into next/headers
From Nicolas Ferre:
One fix related to UART for the "headers move" branch
* tag 'at91-header' of git://github.com/at91linux/linux-at91:
atmel: move ATMEL_MAX_UART to platform_data/atmel.h
Also the driver was modifued to take advantage of recent improvements in
matrix_keypad_build_keymap() implementation, which automatically allocates
memory for keymap.
The driver was tested on AM335x EVM.
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
