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349,476 commits

Author SHA1 Message Date
Kelvin Cheung
94fd4bdf4d MIPS: Loongson1B: Update stmmac_mdio_bus_data
Update stmmac_mdio_bus_data accordingly due to the upstream change.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4433
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:20 +01:00
Kelvin Cheung
4460764599 MIPS: Loongson1B: improve ls1x_serial_setup()
Improve ls1x_serial_setup().

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4432
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:20 +01:00
Kelvin Cheung
17ded0a89b MIPS: Loongson1B: use common clock infrastructure instead of private APIs
Use common clock infrastructure instead of private APIs.
1. Enable COMMON_CLK in the Kconfig.
2. Remove private clock APIs, which are replaced by the code in
   drivers/clk/clk-ls1x.c.
3. Modify header file for drivers/clk/clk-ls1x.c.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4431
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:20 +01:00
Ganesan Ramalingam
ed21cfe207 MIPS: Netlogic: Support for XLR/XLS Fast Message Network
On XLR/XLS, the cpu cores communicate with fast on-chip devices
(e.g. network accelerator, security engine etc.) using the Fast
Messaging Network(FMN). The FMN queues and credits needs to be
configured and intialized before it can be used.

The co-processor 2 on XLR/XLS CPU cores has registers for FMN access,
and the XLR/XLS has custom instructions for sending and loading
messages.  The FMN can deliver also per-cpu interrupts when messages
are available at the CPU.

This patch adds FMN initialization, adds interrupt setup and handling,
and also provides support for sending and receiving FMN messages.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4468
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:20 +01:00
Jayachandran C
38541742da MIPS: Netlogic: PIC IRQ handling update for multi-chip
Create struct nlm_pic_irq for interrupts handled by the PIC.
This simplifies IRQ handling for multi-SoC as well as
the single SoC cases. Also split the setup of percpu and PIC
interrupts so that we can configure the PIC interrupts for
every node.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4467
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:20 +01:00
Jayachandran C
bb1e4bc5cd MIPS: Netlogic: Make number of nodes configurable
There can be 1, 2 or 4 SoCs(nodes) in a multi-chip XLP board. Add an
option for multi-chip boards in case of XLP, and make the number of
nodes configurable.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4470
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:20 +01:00
Jayachandran C
77ae798f5b MIPS: Netlogic: Support for multi-chip configuration
Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a
coherent multi-node system.  Each SoC has its own set of on-chip
devices including PIC.  To support this, add a per SoC stucture and
use it for the PIC and SYS block addresses instead of using global
variables.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4469
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
2a37b1ae44 MIPS: Netlogic: Move from u32 cpumask to cpumask_t
Initial code to support more than 32 cpus. The platform CPU mask
is updated from 32-bit mask to cpumask_t. Convert places that use
cpu_/cpus_ functions to use cpumask_* functions.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4464
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
7143246e9a MIPS: Netlogic: Update PIC access functions
Remove unused and trivial PIC accesss functions, update nlm_pic_send_ipi()
and nlm_set_irt_to_cpu() to use similar logic, and use correct type for
reg in nlm_pic_disable_irt().

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4463
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
feddaf7d89 MIPS: Netlogic: Pass cpuid to early_init_secondary
The cpuid was not passed into early_init_secondary even though the
comment indicated that it will be. Fix this.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4458
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
862e509b7e MIPS: Netlogic: Fix interrupt table entry init
Used the hardware thread id passed in while writing to IRT in
nlm_pic_init_irt()

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4465
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
b97215fd93 MIPS: Netlogic: Fix DMA zone selection for 64-bit
Fix Kconfig for both XLR and XLP to select ZONE_DMA32 (instead of ZONE_DMA)
in case of 64-bit compilation. This can be used for devices that can only
do DMA to 32-bit address. ZONE_DMA is not useful on XLR or XLP.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4466
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
e83fc6be61 MIPS: Netlogic: Move fdt init to plat_mem_setup
At this point early printk is available, so debugging device tree
issues is easier.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4460
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:19 +01:00
Jayachandran C
5b47a4db1e MIPS: Netlogic: Enable SUE bit in cores
Enable Speculative Unmap Enable bit, which will enable speculative L2
cache requests for unmapped memory. This should give better performance
for kernel code/data which is in KSEG0

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4461
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Jayachandran C
d650484649 MIPS: Netlogic: select MIPSR2 for XLP
This allows us to use the r2 optimized code from kernel headers
while compilation.

Disable PGD_C0_CONTEXT option for XLP, which does not work.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4456
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Zi Shen Lim
4be3d2f396 MIPS: perf: Add XLP support for hardware perf.
Add support for XLP performance counters register in perf. Update
mips/Kconfig so that perf events can be selected for XLP.

Signed-off-by: Zi Shen Lim <zlim@netlogicmicro.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4457
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Madhusudan Bhat
c783390a0e MIPS: oprofile: Support for XLR/XLS processors
Add support for XLR and XLS processors in MIPS Oprofile code. These
processors are multi-threaded and have two counters per core. Each
counter can track either all the events in the core (global mode),
or events in just one thread.

We use the counters in the global mode, and use only the first thread
in each core to handle the configuration etc.

Signed-off-by: Madhusudan Bhat <mbhat@netlogicmicro.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4471
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Jonas Gorski
e7e333cb22 MIPS: BCM63XX: move nvram functions into their own file
Refactor nvram related functions into its own unit for easier expansion
and exposure of the values to other drivers.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4516
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Jonas Gorski
ba00e2e5c2 MIPS: BCM63XX: use the new reset helper
Use the new reset helper where appropriate.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4453
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Jonas Gorski
799faa626c MIPS: BCM63XX: add core reset helper
Add a reset helper for resetting the different cores.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4455
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:18 +01:00
Jonas Gorski
e7e9937ff5 MIPS: BCM63XX: add softreset register description for BCM6358
The softreset register description for BCM6358 was missing, so add it.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4454
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Jonas Gorski
f2d1035e95 MIPS: BCM63XX: add and use a clock for PCIe
Add a PCIe clock and use that instead of directly touching the clock
control register. While at it, fail if there is no such clock.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4452
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Hauke Mehrtens
b8ebbaff03 MIPS: BCM47xx: sprom: read values without prefix as fallback
There are bcma based devices like the Linksys E2000 out there, which do
have one ieee80211 core, but no PCIe core and they are using no
prefixes for the sprom. In addition some values like boardtype are
stored without a prefix for the main SoC chip also when they have an
additional PCIe wifi chip with an own boardtype var on some devices.

The Ethernet addresses are now also read out correctly without a prefix
so calling bcm47xx_fill_sprom_ethernet is not needed any more.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4364
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Hauke Mehrtens
2c3763111b MIPS: BCM47XX: read sprom without prefix if no ieee80211 core
If there is no ieee80211 core on the devices like on the BCM4706 read
out the sprom and the other data without using a prefix.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4361
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Hauke Mehrtens
5d24ceab4e MIPS: BCM47xx: read out full board data
Read out the full board data independently of the sprom version. Now we
also get the full boardflags and so on if sromrev is not set and our
code would assume a rev 1 device. When a nvram option is not set
because it is not there this is no problem.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4363
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Hauke Mehrtens
c47cc20ca5 MIPS: BCM47XX: improve memory size detection
The memory size is detected by finding a place where it repeats in
memory. Currently we are just checking when the function prom_init is
seen again, but it is better to check for a bigger part of the memory
to decrease the chance of wrong results.

This should fix a problem we saw in OpenWrt, where the detected
available memory decreed on some devices when doing a soft reboot.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4362
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Hauke Mehrtens
d3dce3d676 MIPS: BCM47XX: ignore last memory page
Ignoring the last page when ddr size is 128M. Cached accesses to last
page is causing the processor to prefetch using address above 128M
stepping out of the ddr address space.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4365
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:17 +01:00
Shane McDonald
b5b64f2ba4 MIPS: Move processing of coherency kernel parameters earlier
Commit 97ce2c88f9 (jump-label: initialize
jump-label subsystem much earlier) caused MIPS to break, so this was
resolved with commit 6650df3c38 (MIPS:
Move cache setup to setup_arch().).  Unfortunately, after this commit,
the coherency kernel parameters, cca and coherentio, are no longer
processed before their values are used.

This patch fixes this problem by marking them as early_param, which
results in them being processed before they are needed.

Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/3961
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:16 +01:00
Charles Hardin
0f731711af mips/octeon: 16-Bit NOR flash was not being detected during boot
The cavium code assumed that all NOR on the boot bus was
an 8-bit NOR part and hardcoded the bankwidth. The simple
solution was to add the code that queries the configuration
register for the width of the bus that has been hardware strapped
to the Cavium. This allows both 8-bit and 16-bit parts to be
discovered during boot.

Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: Charles Hardin <ckhardin@exablox.com>
Patchwork: http://patchwork.linux-mips.org/patch/4323
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:16 +01:00
Kevin Cernekee
f151f3b92b MIPS: tlbex: Fix section mismatches
The new functions introduced in commit 02a5417751 (MIPS: tlbex: Deal with
re-definition of label) should be marked __cpuinit, to eliminate a
warning that can pop up when CONFIG_EXPORT_UASM is disabled:

      LD      arch/mips/mm/built-in.o
    WARNING: arch/mips/mm/built-in.o(.text+0x2a4c): Section mismatch in reference from the function uasm_bgezl_hazard() to the function .cpuinit.text:uasm_il_bgezl()
    The function uasm_bgezl_hazard() references
    the function __cpuinit uasm_il_bgezl().
    This is often because uasm_bgezl_hazard lacks a __cpuinit
    annotation or the annotation of uasm_il_bgezl is wrong.

    WARNING: arch/mips/mm/built-in.o(.text+0x2a68): Section mismatch in reference from the function uasm_bgezl_label() to the function .cpuinit.text:uasm_build_label()
    The function uasm_bgezl_label() references
    the function __cpuinit uasm_build_label().
    This is often because uasm_bgezl_label lacks a __cpuinit
    annotation or the annotation of uasm_build_label is wrong.

(This warning might not occur if the function was inlined.)

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/4517
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-09 11:37:16 +01:00
Jim Quinlan
e97c5b6098 MIPS: Make irqflags.h functions preempt-safe for non-mipsr2 cpus
For non MIPSr2 processors, such as the BMIPS 5000, calls to
arch_local_irq_disable() and others may be preempted, and in doing
so a stale value may be restored to c0_status.  This fix disables
preemption for such processors prior to the call and enables it
after the call.

Those functions that needed this fix have been "outlined" to
mips-atomic.c, as they are no longer good candidates for inlining.

This bug was observed in a BMIPS 5000, occuring once every few hours
in a continuous reboot test.  It was traced to the write_lock_irq()
function which was being invoked in release_task() in exit.c.
By placing a number of "nops" inbetween the mfc0/mtc0 pair in
arch_local_irq_disable(), which is called by write_lock_irq(), we
were able to greatly increase the occurance of this bug.  Similarly,
the application of this commit silenced the bug.

Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: Kevin Cernekee cernekee@gmail.com
Cc: Jim Quinlan <jim2101024@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/4321/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-11-09 10:59:21 +01:00
Jim Quinlan
92d11594f6 MIPS: Remove irqflags.h dependency from bitops.h
The "else clause" of most functions in bitops.h invoked
raw_local_irq_{save,restore}() and in doing so had a dependency on
irqflags.h.  This fix moves said code to bitops.c, removing the
dependency.

Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: Kevin Cernekee cernekee@gmail.com
Cc: Jim Quinlan <jim2101024@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/4320/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-11-09 10:59:10 +01:00
Jim Quinlan
9de79c5006 MIPS: bitops.h: Change use of 'unsigned short' to 'int'
[ralf@linux-mips.org: No functional change but it's consistent with how
use types elsewhere in the code.]

Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: Kevin Cernekee cernekee@gmail.com
Cc: Jim Quinlan <jim2101024@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/4319/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-11-09 10:58:50 +01:00
Ralf Baechle
34d875d7b5 MIPS: compat: Delete now unused TIF_32BIT.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-11-09 10:58:36 +01:00
Ralf Baechle
6ad560b454 MIPS: compat: Implement is_compat_task() by testing for 32-bit address space.
So far is_compat_task() was testing for 32-bit registers if O32 support
was enabled and if O32 support was disabled but N32 enabled it was testing
for 32-bit address space.  So if both O32 and N32 were enabled a N32
task was not considered a compat task, whops.

This still leaves potential cases where O32 and N32 need different treatment
unsolved.  But that's another commit.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-11-09 10:58:29 +01:00
Ralf Baechle
4870639a75 MIPS: compat: Fix use of TIF_32BIT_ADDR vs _TIF_32BIT_ADDR
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-11-09 10:58:18 +01:00
Sachin Kamat
a465348ff5 crypto: s5p-sss - Fix compilation error
struct s3c2410_dma_client gets defined multiple times as it is defined
in more than one header file. Changing it at the header file level causes
many more build breakages as they are interdependent in a complex way.
Hence fixing this problem by using the mach version of the header file.

Without this patch, following build error is observed:
arch/arm/plat-samsung/include/plat/dma-pl330.h:106:27: error:
redefinition of struct s3c2410_dma_client

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-11-09 17:32:33 +08:00
Axel Lin
14198dd64b crypto: picoxcell - Add terminating entry for platform_device_id table
The platform_device_id table is supposed to be zero-terminated.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-11-09 17:32:33 +08:00
Sebastian Andrzej Siewior
d87d77128f crypto: omap-aes - select BLKCIPHER2
without it:
|drivers/built-in.o:(.data+0x14588): undefined reference to `crypto_ablkcipher_type'
|drivers/built-in.o:(.data+0x14668): undefined reference to `crypto_ablkcipher_type'

Not sure when this broke.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-11-09 17:32:32 +08:00
Jussi Kivilinna
d9b1d2e7e1 crypto: camellia - add AES-NI/AVX/x86_64 assembler implementation of camellia cipher
This patch adds AES-NI/AVX/x86_64 assembler implementation of Camellia block
cipher. Implementation process data in sixteen block chunks, which are
byte-sliced and AES SubBytes is reused for Camellia s-box with help of pre-
and post-filtering.

Patch has been tested with tcrypt and automated filesystem tests.

tcrypt test results:

Intel Core i5-2450M:

camellia-aesni-avx vs camellia-asm-x86_64-2way:
128bit key:                                             (lrw:256bit)    (xts:256bit)
size    ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec
16B     0.98x   0.96x   0.99x   0.96x   0.96x   0.95x   0.95x   0.94x   0.97x   0.98x
64B     0.99x   0.98x   1.00x   0.98x   0.98x   0.99x   0.98x   0.93x   0.99x   0.98x
256B    2.28x   2.28x   1.01x   2.29x   2.25x   2.24x   1.96x   1.97x   1.91x   1.90x
1024B   2.57x   2.56x   1.00x   2.57x   2.51x   2.53x   2.19x   2.17x   2.19x   2.22x
8192B   2.49x   2.49x   1.00x   2.53x   2.48x   2.49x   2.17x   2.17x   2.22x   2.22x

256bit key:                                             (lrw:384bit)    (xts:512bit)
size    ecb-enc ecb-dec cbc-enc cbc-dec ctr-enc ctr-dec lrw-enc lrw-dec xts-enc xts-dec
16B     0.97x   0.98x   0.99x   0.97x   0.97x   0.96x   0.97x   0.98x   0.98x   0.99x
64B     1.00x   1.00x   1.01x   0.99x   0.98x   0.99x   0.99x   0.99x   0.99x   0.99x
256B    2.37x   2.37x   1.01x   2.39x   2.35x   2.33x   2.10x   2.11x   1.99x   2.02x
1024B   2.58x   2.60x   1.00x   2.58x   2.56x   2.56x   2.28x   2.29x   2.28x   2.29x
8192B   2.50x   2.52x   1.00x   2.56x   2.51x   2.51x   2.24x   2.25x   2.26x   2.29x

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-11-09 17:32:32 +08:00
Jussi Kivilinna
cf582cceda crypto: camellia-x86_64 - share common functions and move structures and function definitions to header file
Prepare camellia-x86_64 functions to be reused from AVX/AESNI implementation
module.

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-11-09 17:32:31 +08:00
Jussi Kivilinna
bf9c518186 crypto: tcrypt - add async speed test for camellia cipher
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-11-09 17:32:28 +08:00
Wei Yongjun
d48e366e6e crypto: tegra-aes - fix error-valued pointer dereference
clk_put(dd->aes_clk) will dereference an error-valued pointer since the
dd->aes_clk is a ERR_PTR() value. The correct check is call clk_put()
if !IS_ERR(dd->aes_clk).

dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2012-11-09 17:32:27 +08:00
Al Viro
60541d778e unicore32: switch to generic sys_execve()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Acked-and-Tested-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-11-09 17:30:10 +08:00
Kees Cook
c284464658 arch/unicore32: remove CONFIG_EXPERIMENTAL
This config item has not carried much meaning for a while now and is
almost always enabled by default. As agreed during the Linux kernel
summit, remove it.

CC: Guan Xuetao <gxt@mprc.pku.edu.cn>
Signed-off-by: Kees Cook <keescook@chromium.org>
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-11-09 17:30:10 +08:00
Al Viro
38e993535e unicore32: switch to generic kernel_thread()/kernel_execve()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Acked-and-Tested-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-11-09 17:30:09 +08:00
Guan Xuetao
ddd2d384b0 unicore32: Use Kbuild infrastructure for kvm_para.h
All the headers but kvm_para.h use the Kbuild infrastructure to
get to the asm-generic headers.

Cc: linux-kbuild@vger.kernel.org
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-11-09 17:30:09 +08:00
David Howells
e8ce15a6d7 UAPI: (Scripted) Disintegrate arch/unicore32/include/asm
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Michael Kerrisk <mtk.manpages@gmail.com>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Dave Jones <davej@redhat.com>
2012-11-09 17:30:09 +08:00
Guan Xuetao
10e1e99e55 UniCore32-bugfix: Remove definitions in asm/bug.h to solve difference between native and cross compiler
For kernel/bound.c being compiled by native compiler, it will generate following errors in gcc 4.4.3:
  CC      kernel/bounds.s
In file included from include/linux/bug.h:4,
                 from include/linux/page-flags.h:9,
                 from kernel/bounds.c:9:
arch/unicore32/include/asm/bug.h:22: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'void'
arch/unicore32/include/asm/bug.h:23: error: expected '=', ',', ';', 'asm' or '__attribute__' before 'void'

So, we moved definitions in asm/bug.h to arch/unicore32/kernel/setup.h to solve the problem.

Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-11-09 17:30:09 +08:00
Guan Xuetao
195d4577d1 UniCore32-bugfix: fix mismatch return value of __xchg_bad_pointer
When disintegrate system.h, I left an error in asm/cmpxchg.h, which
will result in following error:

arch/unicore32/include/asm/cmpxchg.h: In function '__xchg':
arch/unicore32/include/asm/cmpxchg.h:38: error: void value not ignored as it ought to be

Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-11-09 17:30:09 +08:00