Commit graph

126,670 commits

Author SHA1 Message Date
Srinivasan Shanmugam
fb5a52dbe9 drm/amdgpu: Implement TTM handling for MMIO_REMAP placement
Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves as a
CPU-visible IO page:

* amdgpu_evict_flags(): mark as unmovable
* amdgpu_res_cpu_visible(): consider CPU-visible
* amdgpu_bo_move(): use null move when src/dst is MMIO_REMAP
* amdgpu_ttm_io_mem_reserve(): program base/is_iomem/caching using
  the device's mmio_remap_* metadata
* amdgpu_ttm_io_mem_pfn(): return PFN for the remapped HDP page
* amdgpu_ttm_tt_pde_flags(): set AMDGPU_PTE_SYSTEM for this mem type

v2:
- Drop HDP-specific comment; keep generic remap (Alex).

v3:
- Fix indentation in amdgpu_res_cpu_visible (Christian).
- Use adev->rmmio_remap.bus_addr for MMIO_REMAP bus/PFN calculations
  (Alex).

v4:
- Drop unnecessary (resource_size_t) casts in MMIO_REMAP io-mem paths
  (Alex)

Cc: Christian König <christian.koenig@amd.com>
Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:59 -04:00
Thorsten Blum
99eeb8358e drm/amdgpu: Replace kzalloc + copy_from_user with memdup_user
Replace kzalloc() followed by copy_from_user() with memdup_user() to
improve and simplify ta_if_load_debugfs_write() and
ta_if_invoke_debugfs_write().

No functional changes intended.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:53 -04:00
Thorsten Blum
6156c101e5 drm/amdkfd: Replace kzalloc + copy_from_user with memdup_user
Replace kzalloc() followed by copy_from_user() with memdup_user() to
improve and simplify kfd_ioctl_set_cu_mask().

Return early if an error occurs and remove the obsolete 'out' label.

No functional changes intended.

Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:48 -04:00
Tvrtko Ursulin
d4b6274cbf drm/amdgpu: Use (v)memdup_array_user in amdgpu_cs_pass1
Replace k(v)malloc_array() + copy_from_user() with (v)memdup_array_user().

This shrinks the source code and improves separation between the kernel
and userspace slabs.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:45 -04:00
Tvrtko Ursulin
dea75df7af drm/amdgpu: Use memdup_array_user in amdgpu_cs_wait_fences_ioctl
Replace kmalloc_array() + copy_from_user() with memdup_array_user().

This shrinks the source code and improves separation between the kernel
and userspace slabs.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:40 -04:00
Tvrtko Ursulin
c4ac100e9a drm/amdgpu: Use vmemdup_array_user in amdgpu_bo_create_list_entry_array
Replace kvmalloc_array() + copy_from_user() with vmemdup_array_user() on
the fast path.

This shrinks the source code and improves separation between the kernel
and userspace slabs.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:34 -04:00
Rodrigo Siqueira
6530748485 drm/amdgpu: Remove volatile references from VCN
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:25 -04:00
Rodrigo Siqueira
8970253007 drm/amdgpu: Remove volatile from amdgpu and amdgpu_ih headers
Remove the unnecessary use of volatile in some of the amdgpu.h and
amdgpu_ih.h headers.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:18 -04:00
Rodrigo Siqueira
f307cfb917 drm/amdgpu: Remove volatile from ring manipulation
None of the pointer operations handled by the ring file requires
volatile, for this reason, this commit removes all occurrences of
volatile associated with rings.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:15 -04:00
Rodrigo Siqueira
b8fc541089 drm/amdgpu: Remove volatile from RLC files
The RLC uses volatile with some pointers that are not directly related
to any of the situations where volatile is advised to be used [1]. For
this reason, this commit removes all the volatile occurrences associated
with RLC.

1. https://docs.kernel.org/process/volatile-considered-harmful.html

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:09 -04:00
Rodrigo Siqueira
d8586afe38 drm/amdgpu: Remove volatile from CSB functions
The CSB buffer manipulation occurs in memory where the BO is mapped
during initialization, and some references to this buffer are handled
with volatile, which is incorrect in this scenario. There are a few
cases where the use of volatile is accepted, but none of them align with
CSB operations. Therefore, this commit removes all the volatile
variables associated with the CSB code.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15 16:51:04 -04:00
Loic Poulain
a10f910c77 drm: bridge: anx7625: Fix NULL pointer dereference with early IRQ
If the interrupt occurs before resource initialization is complete, the
interrupt handler/worker may access uninitialized data such as the I2C
tcpc_client device, potentially leading to NULL pointer dereference.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Fixes: 8bdfc5dae4 ("drm/bridge: anx7625: Add anx7625 MIPI DSI/DPI to DP")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250709085438.56188-1-loic.poulain@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-09-15 21:44:42 +03:00
Dmitry Baryshkov
cf207ea2c3 drm/vc4: hdmi: switch to generic CEC helpers
Switch VC4 driver to using CEC helpers code, simplifying hotplug and
registration / cleanup. The existing vc4_hdmi_cec_release() is kept for
now.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://lore.kernel.org/r/20250705-drm-hdmi-connector-cec-v7-1-d14fa0c31b74@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-09-15 21:42:55 +03:00
Aaron Kling
6ca1701cec drm/nouveau: Support devfreq for Tegra
Using pmu counters for usage stats. This enables dynamic frequency
scaling on all of the currently supported Tegra gpus.

The register offsets are valid for gk20a, gm20b, gp10b, and gv11b. If
support is added for ga10b, this will need rearchitected.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
[fixed tab alignment in gk20a_devfreq_target()]
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://lore.kernel.org/r/20250906-gk20a-devfreq-v2-1-0217f53ee355@gmail.com
2025-09-15 14:18:08 -04:00
Aaron Kling
d5603737e7 drm/nouveau: Support reclocking on gp10b
Starting with Tegra186, gpu clock handling is done by the bpmp and there
is little to be done by the kernel. The only thing necessary for
reclocking is to set the gpcclk to the desired rate and the bpmp handles
the rest. The pstate list is based on the downstream driver generates.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
[added newline before gp10b_clk macro declaration for checkpatch error]
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://lore.kernel.org/r/20250823-gp10b-reclock-v2-1-90a1974a54e3@gmail.com
2025-09-15 14:15:55 -04:00
Nitin Gote
7926ba2143
drm/xe: defer free of NVM auxiliary container to device release callback
Do not kfree the intel_dg_nvm_dev in xe_nvm_fini() right after
auxiliary_device_delete/uninit. The auxiliary_device embeds the
device/kobject (and its name); freeing it too early can race
with asynchronous device_del/udev processing and cause a use-after-free.

Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
Fixes: c28bfb107d ("drm/xe/nvm: add on-die non-volatile memory device")
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250911052823.226696-1-nitin.r.gote@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
(cherry picked from commit d4c3ed963e)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-15 13:12:19 -04:00
Mallesh Koujalagi
dcfd151d32
drm/xe/hwmon: Remove type casting
Refactor: eliminate type casts by using proper u32
declarations.

v2:
- Address review comments. (Karthik)

v3:
- Use the proper u32 type and drop cast. (Lucas De Marchi)
- Modify variable when actually using u64 value.
- Change r value to reg_value with u32 type.

v4:
- Remove newline between trailer and Signed-off-by. (Lucas De Marchi)
- Change reg_val to val for more user-friendly logging.
- Use mul_u32_u32 function since both values are u32.

v5:
- mul_u32_u32 function with shift. (Lucas De Marchi)

Fixes: 7596d839f6 ("drm/xe/hwmon: Add support to manage power limits though mailbox")
Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250912113458.2815172-1-mallesh.koujalagi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
(cherry picked from commit 4e1d3b5e64)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-15 13:11:40 -04:00
John Harrison
456b32c9c1 drm/xe/guc: Add test for G2G communications
Add a test for sending messages from every GuC to every other GuC to
test G2G communications.

Note that, being a debug only feature, the test interface only exists
in pre-production builds of the GuC firmware.

v2: Fix 'default' case to actually use the driver's registration code
as well as allocation. Add comments explaining the different test
types. Fix (C) date and an assert. Review feedback from Daniele.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://lore.kernel.org/r/20250910210237.603576-5-John.C.Harrison@Intel.com
2025-09-15 09:53:26 -07:00
John Harrison
537773db91 drm/xe: Allow freeing of a managed bo
If a bo is created via xe_managed_bo_create_pin_map() then it cannot be
freed by the driver using xe_bo_unpin_map_no_vm(), or indeed any other
existing function. The DRM layer will still have a pointer stashed
away for later freeing, causing a invalid memory access on driver
unload. So add a helper for releasing the DRM action as well.

v2: Drop 'xe' parameter (review feedbak from Michal W)

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://lore.kernel.org/r/20250910210237.603576-4-John.C.Harrison@Intel.com
2025-09-15 09:53:25 -07:00
John Harrison
acf01c79f0 drm/xe/guc: Add firmware build type to available info
Some test features are not available in production builds of the GuC
firmware. So add the build type field to the available information
that tests can inspect to decide if they should skip or run.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://lore.kernel.org/r/20250910210237.603576-3-John.C.Harrison@Intel.com
2025-09-15 09:53:23 -07:00
John Harrison
7d0ca56e91 drm/xe/guc: Update CSS header structures
Rework the CSS header structure according to recent updates to the GuC
API spec. Also include more field definitions.

v2: Also pass the new GuC specific structure to a GuC specific
function instead of the higher level, generic structure (review
feedback from Daniele).
Also correct naming of CSS_TIME_* fields.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://lore.kernel.org/r/20250910210237.603576-2-John.C.Harrison@Intel.com
2025-09-15 09:53:21 -07:00
Fushuai Wang
84afb84bcc drm/xe: Use ERR_CAST instead of ERR_PTR(PTR_ERR(...))
Use ERR_CAST inline function instead of ERR_PTR(PTR_ERR(...)).

Signed-off-by: Fushuai Wang <wangfushuai@baidu.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20250914101630.17719-1-wangfushuai@baidu.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-09-15 08:32:51 -07:00
Lucas De Marchi
19baa830fb drm/xe: Use ARRAY_SIZE in guc_waklv_init()
Prefer using ARRAY_SIZE where needed and just passing 1 instead of
calculating the size of one element.

Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202508130158.eogeBZQT-lkp@intel.com/
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://lore.kernel.org/r/20250912-guc-ads-array-size-v1-1-a6555392a1f8@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2025-09-15 07:50:53 -07:00
Zhongtian Wu
e3e4110610 drm/panel-edp: Add several panel configurations for mt8189 Chromebook
Add several panel configurations for mt8189 Chromebook. For B140HAK03.3,
the enable timing required 50ms. For NV156FHM-N4S, the enable timing
required 200ms. For N140HCA-EAC, the enable timing required 80ms. For
N156HCA-EAB, the enable timing required 80ms. For MNE001BS1-4, the enable
timing required 80ms. For MNF601BS1-3, the enable timing required 80ms,
the disable timing required 50ms.

B140HAK03.3
edid-decode (hex):

00 ff ff ff ff ff ff 00 06 af a9 b7 00 00 00 00
28 20 01 04 95 1f 11 78 03 f5 65 8f 55 5a 93 2a
1f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 60 3b 80 04 71 38 52 40 10 10
3e 00 35 ae 10 00 00 18 95 27 80 04 71 38 52 40
10 10 3e 00 35 ae 10 00 00 18 00 00 00 fe 00 41
55 4f 0a 20 20 20 20 20 20 20 20 20 00 00 00 fe
00 42 31 34 30 48 41 4b 30 33 2e 33 20 0a 00 f1

NV156FHM-N4S
edid-decode (hex):

00 ff ff ff ff ff ff 00 09 e5 f2 0c 00 00 00 00
10 22 01 04 a5 22 13 78 03 00 f5 97 5e 5b 93 29
1f 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 99 3b 80 10 71 38 50 40 30 20
36 00 58 c2 10 00 00 1a 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 42
4f 45 20 43 51 0a 20 20 20 20 20 20 00 00 00 fe
00 4e 56 31 35 36 46 48 4d 2d 4e 34 53 0a 00 dc

N140HCA-EAC
edid-decode (hex):

00 ff ff ff ff ff ff 00 0d ae 8f 14 00 00 00 00
0f 22 01 04 a5 1f 11 78 03 28 65 97 59 54 8e 27
1e 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 b4 3b 80 4a 71 38 34 40 50 3c
68 00 35 ad 10 00 00 18 c2 2f 80 4a 71 38 34 40
50 3c 68 00 35 ad 10 00 00 18 00 00 00 fd 00 28
3c 44 44 10 01 0a 20 20 20 20 20 20 00 00 00 fc
00 4e 31 34 30 48 43 41 2d 45 41 43 0a 20 01 90

02 03 22 00 e3 05 80 00 e6 06 01 01 53 53 4b 72
1a 00 00 03 01 28 3c 00 00 00 00 00 00 3c 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 62

N156HCA-EAB
edid-decode (hex):

00 ff ff ff ff ff ff 00 0d ae 65 15 00 00 00 00
0b 22 01 04 a5 22 13 78 03 28 65 97 59 54 8e 27
1e 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 b4 3b 80 4a 71 38 34 40 50 36
68 00 58 c1 10 00 00 18 c2 2f 80 4a 71 38 34 40
50 36 68 00 58 c1 10 00 00 18 00 00 00 fd 00 28
3c 44 44 10 01 0a 20 20 20 20 20 20 00 00 00 fc
00 4e 31 35 36 48 43 41 2d 45 41 42 0a 20 01 50

02 03 22 00 e3 05 80 00 e6 06 01 01 53 53 42 72
1a 00 00 03 01 28 3c 00 00 00 00 00 00 3c 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6b

MNE001BS1-4
edid-decode (hex):

00 ff ff ff ff ff ff 00 0e 77 4b 14 00 00 00 00
25 22 01 04 a5 1f 11 78 03 2c c5 94 5c 59 95 29
1e 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 9a 36 80 a0 70 38 28 40 30 20
36 00 35 ae 10 00 00 1a 00 00 00 fd 00 28 3c 43
43 0e 01 0a 20 20 20 20 20 20 ae 2b 80 a0 70 38
28 40 30 20 36 00 35 ae 10 00 00 1a 00 00 00 fc
00 4d 4e 45 30 30 31 42 53 31 2d 34 0a 20 01 0e

70 20 79 02 00 81 00 1e 72 1a 00 00 03 01 28 3c
00 00 53 ff 53 ff 3c 00 00 00 00 e3 05 04 00 e6
06 01 01 53 53 ff 2b 00 06 27 00 28 3b 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 b8 90

MNF601BS1-3
edid-decode (hex):

00 ff ff ff ff ff ff 00 0e 77 19 15 00 00 00 00
19 22 01 04 a5 22 13 78 03 2c c5 94 5c 59 95 29
1e 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 9a 36 80 a0 70 38 28 40 30 20
36 00 58 c1 10 00 00 1a ae 2b 80 a0 70 38 28 40
30 20 36 00 58 c1 10 00 00 1a 00 00 00 fd 00 28
3c 43 43 0e 01 0a 20 20 20 20 20 20 00 00 00 fc
00 4d 4e 46 36 30 31 42 53 31 2d 33 0a 20 01 d4

70 20 79 02 00 81 00 1e 72 1a 00 00 03 01 28 3c
00 00 53 ff 53 ff 3c 00 00 00 00 e3 05 04 00 e6
06 01 01 53 53 ff 2b 00 06 27 00 28 3b 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 b8 90

Signed-off-by: Zhongtian Wu <wuzhongtian@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20250915113437.665345-1-wuzhongtian@huaqin.corp-partner.google.com
2025-09-15 07:49:41 -07:00
Zhijian Yan
65afe8b647 drm/panel: Add support for KD116N3730A07
Add panel driver support for the KD116N3730A07 11.6" eDP panel.
This includes initialization sequence and compatible string, the
enable timimg required 50ms.

KD116N3730A07:
edid-decode (hex):

00 ff ff ff ff ff ff 00 2c 83 10 01 00 00 00 00
02 23 01 04 95 1a 0e 78 03 3a 75 9b 5d 5b 96 28
19 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
01 01 01 01 01 01 09 1e 56 dc 50 00 28 30 30 20
36 00 00 90 10 00 00 1a 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fe
00 4b 44 31 31 36 4e 33 37 33 30 41 30 37 00 2e

Signed-off-by: Zhijian Yan <yanzhijian@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20250915064715.662312-1-yanzhijian@huaqin.corp-partner.google.com
2025-09-15 07:49:33 -07:00
Brian Masney
a076fe9f12 drm/sun4i/sun4i_tcon_dclk: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Brian Masney <bmasney@redhat.com>
Link: https://lore.kernel.org/r/20250811-drm-clk-round-rate-v2-9-4a91ccf239cf@redhat.com
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-09-15 15:08:44 +02:00
Brian Masney
5c04f48127 drm/sun4i/sun4i_hdmi_ddc_clk: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Brian Masney <bmasney@redhat.com>
Link: https://lore.kernel.org/r/20250811-drm-clk-round-rate-v2-8-4a91ccf239cf@redhat.com
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-09-15 15:08:44 +02:00
Brian Masney
1dc50bc8a3 drm/stm/lvds: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Acked-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Brian Masney <bmasney@redhat.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Link: https://lore.kernel.org/r/20250811-drm-clk-round-rate-v2-7-4a91ccf239cf@redhat.com
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-09-15 15:08:44 +02:00
Brian Masney
5ccf442ecd drm/stm/dw_mipi_dsi-stm: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Acked-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Brian Masney <bmasney@redhat.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Link: https://lore.kernel.org/r/20250811-drm-clk-round-rate-v2-6-4a91ccf239cf@redhat.com
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-09-15 15:08:43 +02:00
Brian Masney
b1a122f404 drm/pl111: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Brian Masney <bmasney@redhat.com>
Link: https://lore.kernel.org/r/20250811-drm-clk-round-rate-v2-5-4a91ccf239cf@redhat.com
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-09-15 15:08:43 +02:00
Brian Masney
a3e12b9c84 drm/mcde/mcde_clk_div: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Brian Masney <bmasney@redhat.com>
Link: https://lore.kernel.org/r/20250811-drm-clk-round-rate-v2-2-4a91ccf239cf@redhat.com
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-09-15 15:08:15 +02:00
Brian Masney
6a1977472f drm/imx/ipuv3/imx-tve: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20250811-drm-clk-round-rate-v2-1-4a91ccf239cf@redhat.com
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-09-15 15:08:14 +02:00
Dan Carpenter
75cc23ffe5
drm/xe: Fix a NULL vs IS_ERR() in xe_vm_add_compute_exec_queue()
The xe_preempt_fence_create() function returns error pointers.  It
never returns NULL.  Update the error checking to match.

Fixes: dd08ebf6c3 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/aJTMBdX97cof_009@stanley.mountain
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-15 08:33:19 -04:00
Michal Wajdeczko
fef8b64e48
drm/xe/pf: Drop rounddown_pow_of_two fair LMEM limitation
This effectively reverts commit 4c3fe5eae4 ("drm/xe/pf: Limit
fair VF LMEM provisioning") since we don't need it any more after
non-contig VRAM allocations were fixed. This allows larger LMEM
auto-provisioning for VFs, so instead:

 [ ] GT0: PF: LMEM available(14096M) fair(1 x 8192M)
 [ ] GT0: PF: VF1 provisioned with 8589934592 (8.00 GiB) LMEM
or
 [ ] GT0: PF: LMEM available(14096M) fair(2 x 4096M)
 [ ] GT0: PF: VF1..VF2 provisioned with 4294967296 (4.00 GiB) LMEM

we may get:

 [ ] GT0: PF: LMEM available(14096M) fair(1 x 14096M)
 [ ] GT0: PF: VF1 provisioned with 14780727296 (13.8 GiB) LMEM
and
 [ ] GT0: PF: LMEM available(14096M) fair(2 x 7048M)
 [ ] GT0: PF: VF1..VF2 provisioned with 7390363648 (6.88 GiB) LMEM

Fixes: 1e32ffbc9d ("drm/xe/sriov: support non-contig VRAM provisioning")
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Link: https://lore.kernel.org/r/20250910222439.32869-1-michal.wajdeczko@intel.com
(cherry picked from commit 95c1cfa306)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-15 08:26:26 -04:00
Shuicheng Lin
013e484dbd
drm/xe/tile: Release kobject for the failure path
Call kobject_put() for the failure path to release the kobject

v2: remove extra newline. (Matt)

Fixes: e3d0839aa5 ("drm/xe/tile: Abort driver load for sysfs creation failure")
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com>
Link: https://lore.kernel.org/r/20250819153950.2973344-2-shuicheng.lin@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
(cherry picked from commit b98775bca9)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-15 08:26:19 -04:00
Krzysztof Karas
f4d4097a03 drm/i915/gem: Avoid accessing uninitialized context in emit_rpcs_query()
Following the error path in that function may lead to usage of
uninitialized struct i915_gem_ww_ctx object, so move call to
i915_gem_ww_ctx_init() a bit earlier.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Krzysztof Karas <krzysztof.karas@intel.com>
Reviewed-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://lore.kernel.org/r/casutxyfjv7o4ivadvbich2sq2dt22btc5wcke55r56ptgxx2h@lv7hnxrqw5rq
2025-09-15 13:41:32 +02:00
Kaustabh Chakraborty
472df181d7
drm/exynos: dsi: add support for exynos7870
Add glue layer support for Exynos7870's DSIM IP bridge driver.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 20:19:23 +09:00
Kaustabh Chakraborty
e1361a4f1b
drm/exynos: exynos7_drm_decon: remove ctx->suspended
Condition guards are found to be redundant, as the call flow is properly
managed now, as also observed in the Exynos5433 DECON driver. Since
state checking is no longer necessary, remove it.

This also fixes an issue which prevented decon_commit() from
decon_atomic_enable() due to an incorrect state change setting.

Fixes: 96976c3d9a ("drm/exynos: Add DECON driver")
Cc: stable@vger.kernel.org
Suggested-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 20:19:21 +09:00
Kaustabh Chakraborty
77169a11d4
drm/bridge: samsung-dsim: add driver support for exynos7870 DSIM bridge
Add support for Exynos7870's DSIM IP block in the bridge driver.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 19:55:15 +09:00
Kaustabh Chakraborty
f08051a415
drm/bridge: samsung-dsim: add ability to define clock names for every variant
Presently, all devices refer to clock names from a single array. The
only controlling parameter is the number of clocks (num_clks field of
samsung_dsim_driver_data) which uses the first n clocks of that array.
As new devices are added, this approach turns out to be cumbersome.

Separate the clock names in individual arrays required by each variant,
in a struct clk_bulk_data. Add a pointer field to the driver data struct
which points to their respective clock names, and rework the clock usage
code to use the clk_bulk_* API instead.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 19:55:10 +09:00
Kaustabh Chakraborty
7ef93667ab
drm/bridge: samsung-dsim: increase timeout value for PLL_STABLE
Exynos7870's DSIM requires more time to stabilize its PLL. The current
timeout value, 1000, doesn't suffice. Increase the value to 3000, which
is just about enough as observed experimentally.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 19:55:07 +09:00
Kaustabh Chakraborty
f7754d843a
drm/bridge: samsung-dsim: allow configuring the PLL_STABLE bit
The PLL_STABLE bit of DSIM_DPHY_STATUS is hardcoded to BIT(31), but
Exynos7870's DSIM has it in BIT(24) as per downstream kernel sources.

In order to support both, move this bit value to the driver data struct
and define it for every driver compatible. Reference the value from
there instead, in functions wherever required.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 19:55:04 +09:00
Kaustabh Chakraborty
9aa49c21aa
drm/bridge: samsung-dsim: allow configuring PLL_M and PLL_S offsets
Currently, PLL_P offset of DSIM_PLLCTRL is configurable in the driver
data, while PLL_M and PLL_S offsets are hardcoded as 4-bit and 1-bit
offsets respectively, but Exynos7870's DSIM have them at 3-bit and 0-bit
offsets as per downstream kernel sources.

In order to support both, move both offset values to the driver data
struct and define it for every driver compatible. Reference the values
from there instead, in functions wherever required.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 19:55:01 +09:00
Kaustabh Chakraborty
d6dbefb2fe
drm/bridge: samsung-dsim: allow configuring the VIDEO_MODE bit
The VIDEO_MODE bit of DSIM_CONFIG is hardcoded to BIT(25), but
Exynos7870's DSIM has it in BIT(18) as per downstream kernel sources.

In order to support both, move this bit value to the driver data struct
and define it for every driver compatible. Reference the value from
there instead, in functions wherever required.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 19:54:59 +09:00
Kaustabh Chakraborty
4d244122dd
drm/bridge: samsung-dsim: allow configuring the MAIN_VSA offset
The MAIN_VSA offset of DSIM_MSYNC is hardcoded to a 22-bit offset, but
Exynos7870's DSIM has it in a 16-bit offset as per the downstream kernel
sources.

In order to support both, move this offset value to the driver data
struct and define it for every driver compatible. Reference the value
from there instead, in functions wherever required.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 19:54:52 +09:00
Kaustabh Chakraborty
f6ba4c1577
drm/bridge: samsung-dsim: allow configuring bits and offsets of CLKCTRL register
DSIM_CLKCTRL bit and offset values hardcoded in the driver:

name                      | bit/offset value
--------------------------+-----------------
DSIM_LANE_ESC_CLK_EN_CLK  | 19
DSIM_LANE_ESC_CLK_EN_DATA | 20
DSIM_BYTE_CLKEN           | 24
DSIM_ESC_CLKEN            | 28
DSIM_TX_REQUEST_HSCLK     | 31

DSIM_CLKCTRL bit and offset values in Exynos7870 DSIM as per downstream
kernel sources:

name                      | bit/offset value
--------------------------+-----------------
DSIM_LANE_ESC_CLK_EN_CLK  | 8
DSIM_LANE_ESC_CLK_EN_DATA | 9
DSIM_BYTE_CLKEN           | 17
DSIM_ESC_CLKEN            | 16
DSIM_TX_REQUEST_HSCLK     | 20

In order to support both, move all values to the driver data struct and
define it for every driver compatible. Reference the values from there
instead, in functions wherever required.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 19:54:49 +09:00
Kaustabh Chakraborty
92beab1a39
drm/bridge: samsung-dsim: add flag to control header FIFO wait
Exynos7870's DSIM device doesn't require waiting for the header FIFO
during a MIPI DSI transfer. Add a flag in the driver data in order to
control said behavior.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com
2025-09-15 19:54:47 +09:00
Kaustabh Chakraborty
7c9b998947
drm/bridge: samsung-dsim: add SFRCTRL register
On Exynos7870 devices, enabling the display requires disabling
standby by writing to the SFRCTRL register. Add the register and related
bit values. Since this behavior isn't available on other SoCs, implement
a flag in the driver data struct indicating the availability of this
feature.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 19:54:45 +09:00
Kaustabh Chakraborty
4e445729dc
drm/bridge: samsung-dsim: support separate LINK and DPHY status registers
Exynos7870's DSIM has separate registers for LINK and DPHY status. This
is in contrast to older variants in the driver which use a single
register for both.

Add a driver data flag which indicates that the device variant supports
the legacy status register. Change the register read calls
appropriately.

Suggested-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2025-09-15 19:54:37 +09:00
Athul Raj Kollareth
e5e0350d5d drm: Replace the deprecated DRM_* logging macros in gem helper files
Replace the DRM_* logging macros used in gem helper files with the
appropriate ones specified in /include/drm/drm_print.h.

Signed-off-by: Athul Raj Kollareth <krathul3152@gmail.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://lore.kernel.org/r/aLczDHV_yGnnRKbr@Terra
2025-09-15 12:36:44 +02:00