Make the keys garbage collector invoke synchronize_rcu() prior to destroying
keys with a zero usage count. This means that a key can be examined under the
RCU read lock in the safe knowledge that it won't get deallocated until after
the lock is released - even if its usage count becomes zero whilst we're
looking at it.
This is useful in keyring search vs key link. Consider a keyring containing a
link to a key. That link can be replaced in-place in the keyring without
requiring an RCU copy-and-replace on the keyring contents without breaking a
search underway on that keyring when the displaced key is released, provided
the key is actually destroyed only after the RCU read lock held by the search
algorithm is released.
This permits __key_link() to replace a key without having to reallocate the key
payload. A key gets replaced if a new key being linked into a keyring has the
same type and description.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Jeff Layton <jlayton@redhat.com>
Announce the (un)registration of a key type in the core key code rather than
in the callers.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Mimi Zohar <zohar@us.ibm.com>
Reorganise the keys directory Makefile to put all the core bits together and
the type-specific bits after.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Mimi Zohar <zohar@us.ibm.com>
Move the key config into security/keys/Kconfig as there are going to be a lot
of key-related options.
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Mimi Zohar <zohar@us.ibm.com>
Use the 32-bit compat keyctl() syscall wrapper on Sparc64 for Sparc32 binary
compatibility.
Without this, keyctl(KEYCTL_INSTANTIATE_IOV) is liable to malfunction as it
uses an iovec array read from userspace - though the kernel should survive this
as it checks pointers and sizes anyway.
I think all the other keyctl() function should just work, provided (a) the top
32-bits of each 64-bit argument register are cleared prior to invoking the
syscall routine, and the 32-bit address space is right at the 0-end of the
64-bit address space. Most of the arguments are 32-bit anyway, and so for
those clearing is not required.
Signed-off-by: David Howells <dhowells@redhat.com
cc: "David S. Miller" <davem@davemloft.net>
cc: sparclinux@vger.kernel.org
cc: stable@vger.kernel.org
DT passes the exact GART register ranges without any overlapping with
MC register ranges. GART register offset needs to be adjusted by one
passed by DT correctly.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
This is a second attempt at a patch that adds rgrp information to the
block allocation trace point for GFS2. As suggested, the patch was
modified to list the rgrp information _after_ the fields that exist today.
Again, the reason for this patch is to allow us to trace and debug
problems with the block reservations patch, which is still in the works.
We can debug problems with reservations if we can see what block allocations
result from the block reservations. It may also be handy in figuring out
if there are problems in rgrp free space accounting. In other words,
we can use it to track the rgrp and its free space along side the allocations
that are taking place.
Signed-off-by: Bob Peterson <rpeterso@redhat.com>
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
Before i.MX51 Pinctrl support is available, we have to reply on
the iomux initialization in non-DT board file to set iomux up for
DT boot.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It turns out that the "new" parameter to function gfs2_meta_indirect_buffer
was always being passed in as zero. Therefore, this patch eliminates it
and simplifies the function.
Signed-off-by: Bob Peterson <rpeterso@redhat.com>
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
Hierarchical interrupt is supported since ab8500 V2.
However, it is not implemented in the ab8500-core driver.
With the current implementation, when an ab9540 interrupt
occurs, 17 Latch registers are read through i2c. With
hierarchical interrupt implementation, there are only 4 i2c
accesses.
Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com>
Reviewed-by: Michel Jaouen <michel.jaouen@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
The MSP platform data callbacks use the old custom callbacks to
set the state of the pins, switch over to using pinctrl.
Cc: Ola Lilja <ola.o.lilja@stericsson.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Alter the db8500_add_msp_i2s() calls to return a struct
platform_device * pointer, not an integer. We nee the pointer
to obtain a pinctrl handle.
Cc: Ola Lilja <ola.o.lilja@stericsson.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
UART0 had a hack that enabled its pins on init and put it to
sleep on the exit callback. Replace this with the pinctrl calls
to do the same thing and update the runtime table with the two
apropriate states for runtime/active and idle.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
At the beginning of the first patch series I included the custom
ux500 pin control system to make sure I could eventually replace
it with the standard subsystem driver. So now that we've done so,
let's remove it.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the Ux500 family to use the pinctrl driver for
configuring pins.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
There is an IDLE definition in the pinctrl framework, but for
ux500 SLEEP is more apropriate.
I've added some comments on the semantics of the common states
so as to avoid misunderstandings.
ChangeLog v1->v2:
- Fixed terminology "on"->"into".
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This implements the pin configuration interface for the
Nomadik pin controller.
As part of the exercise we add a bit in the pin_cfg_t for
the Nomadik pinctrl driver that indicates if the pin should
be forced into GPIO mode. This is not done to go behind the
back of the GPIO subsystem, but to ensure that default modes
can be set by hogs on boot and system suspend/resume states.
It was used implicitly by the old code defining all config
settings and modes in a single config word but we now have
a split between pinmux and pinconf leading to the need to
have this.
We also add a bit for explicitly setting sleepmode of the
pin. This was previously handled by custom calls with the
_sleep() suffix, but we now have one single interface into
the configuration so we replace this with a bit indicating
that the pin shall be configured into sleep mode.
Some of the configuration can be refactored later to use
less custom fields on the pin_cfg_t but we are currently
leaving the old function calls in place so we stay
compatible.
ChangeLog v1->v2:
- Drop a hunk changing pinmuxing for GPIO and move it
over to the preceding pinmux patch.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Implements basic pinmux for the Nomadik pin controller.
The plan is to split the existing singular pin config interface
nmk_config_pin(), nmk_config_pins(), that will configure muxing
and other settings at the same time, into two interfaces
by splitting the code in pinmux and pinctrl and eventually
deleting the old interface and its helper functions when all
users are gone.
nmk_gpio_set_mode() and nmk_gpio_get_mode() are two older
interfaces for just configuring muxing/altfunctions that
will also be replaced in the end.
We take some extra care to handle the glitch-avoidance here,
but it is simpler now since there is only one altsetting per
pingroup so we know immediately if we need to avoid altfunc
C glitches for a certain group.
As part of the makeover implement the .request() and .free()
calls on the GPIO chips and have them call back into the
pinctrl layer to reserve GPIOs.
ChangeLog v1->v2:
- Rebased on pinctrl-mergebase-20120418 so we get the latest
driver infrastructure where function count is done by a fixed
value and we can drop a few range checks since this is now
handled by the core.
- Include a GPIO muxing hunk erroneously part of the pin config
patch.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Since all pins we can control are GPIOs, match a GPIO range to
each pin in the debug function and call into the GPIO debug
print function to have the per-pin information.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Break out the code displaying the status of a single pin so we
can use the same code in the pinctrl debug function.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a scratch pin control interface to the Nomadik pinctrl
driver, and defines the pins and groups in the DB8500 ASIC. We
define GPIO ranges to cover the pins exposed. The DB8500 has
more pins than this but we restrict the driver to the pins that
can be controlled from the combined GPIO and pin control hardware
to begin with.
ChangeLog v1->v2:
- Base on the latest pinctrl development from
pinctrl-mergebase-20120418 so we can get rid of legacy
group count mechanism. Also drop the range checks for group
index, this is handled by the core now.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
a60b57e "drivers/gpio: gpio-nomadik: Add support for irqdomains" broke
building with CONFIG_OF_GPIO disabled.
Without this patch, building nhk8815_defconfig results in:
/home/arnd/linux-arm/drivers/gpio/gpio-nomadik.c: In function 'nmk_gpio_probe':
/home/arnd/linux-arm/drivers/gpio/gpio-nomadik.c:1238:6: error: 'struct gpio_chip' has no member named 'of_node'
make[3]: *** [drivers/gpio/gpio-nomadik.o] Error 1
make[2]: *** [drivers/gpio] Error 2
make[2]: *** Waiting for unfinished jobs....
make[1]: *** [drivers] Error 2
make[1]: *** Waiting for unfinished jobs....
make: *** [sub-make] Error 2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
I'm moving this driver over to the pinctrl subsystem to convert
the custom pin mux/config scheme over to use pinctrl.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
device_prep_dma_cyclic may be call in audio trigger function which is
atomic context, so we make it atomic too.
- change channel0 lock to spinlock.
- Use polling to wait for channel0 finish running.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Signed-off-by: Marek Lindner <lindner_marek@yahoo.de>
Acked-by: Simon Wunderlich <siwu@hrz.tu-chemnitz.de>
Signed-off-by: Antonio Quartulli <ordex@autistici.org>
Signed-off-by: Marek Lindner <lindner_marek@yahoo.de>
Acked-by: Simon Wunderlich <siwu@hrz.tu-chemnitz.de>
Signed-off-by: Antonio Quartulli <ordex@autistici.org>
The B.A.T.M.A.N. IV OGM receive function still was hard-coded although
it is a routing protocol specific function. This patch takes advantage
of the dynamic packet handler registration to remove the hard-coded
function calls.
Signed-off-by: Marek Lindner <lindner_marek@yahoo.de>
Acked-by: Simon Wunderlich <siwu@hrz.tu-chemnitz.de>
Signed-off-by: Antonio Quartulli <ordex@autistici.org>
The packet handler array replaces the growing switch statement, thus
dealing with incoming packets in a more efficient way. It also adds
to possibility to register packet handlers on the fly.
Signed-off-by: Marek Lindner <lindner_marek@yahoo.de>
Acked-by: Simon Wunderlich <siwu@hrz.tu-chemnitz.de>
Signed-off-by: Antonio Quartulli <ordex@autistici.org>
Signed-off-by: Marek Lindner <lindner_marek@yahoo.de>
Acked-by: Simon Wunderlich <siwu@hrz.tu-chemnitz.de>
Signed-off-by: Antonio Quartulli <ordex@autistici.org>
In is_type_dhcprequest(), while parsing a DHCP message, if the entry we found in
the option list is neither a padding nor the dhcp-type, we have to ignore it and
jump as many bytes as its length + 1. The "+ 1" byte is given by the subtype
field itself that has to be jumped too.
Reported-by: Marek Lindner <lindner_marek@yahoo.de>
Signed-off-by: Antonio Quartulli <ordex@autistici.org>
By Shawn Guo
via Shawn Guo
* 'clean/late_initcall_v2' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: ux500: use machine specific hook for late init
ARM: tegra: use machine specific hook for late init
ARM: shmobile: use machine specific hook for late init
ARM: sa1100: use machine specific hook for late init
ARM: s3c64xx: use machine specific hook for late init
ARM: prima2: use machine specific hook for late init
ARM: pnx4008: use machine specific hook for late init
ARM: omap2: use machine specific hook for late init
ARM: omap1: use machine specific hook for late init
ARM: msm: use machine specific hook for late init
ARM: imx: use machine specific hook for late init
ARM: exynos: use machine specific hook for late init
ARM: ep93xx: use machine specific hook for late init
ARM: davinci: use machine specific hook for late init
ARM: provide a late_initcall hook for platform initialization
Add Dialog DA9053 regulators support for imx53-qsb (Loco board)
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Amit Kucheria <amit.kucheria@canonical.com>
Cc: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
To be able to enable early debugging on boards using the UART2 for the
console, add the option for early debugging on UART2.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It fixes the following compile error with network disabled in
imx_v6_v7_defconfig.
arch/arm/mach-imx/built-in.o: In function `ksz9021rn_phy_fixup':
imx53-dt.c:(.text+0x5f70): undefined reference to `mdiobus_write'
imx53-dt.c:(.text+0x5f84): undefined reference to `mdiobus_write'
imx53-dt.c:(.text+0x5f98): undefined reference to `mdiobus_write'
imx53-dt.c:(.text+0x5fac): undefined reference to `mdiobus_write'
imx53-dt.c:(.text+0x5fc0): undefined reference to `mdiobus_write'
arch/arm/mach-imx/built-in.o: In function `imx6q_init_machine':
imx53-dt.c:(.init.text+0x387c): undefined reference to `phy_register_fixup_for_uid'
make: *** [.tmp_vmlinux1] Error 1
Reported-by: Artem Bityutskiy <dedekind1@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It'll be easier to add other board specific code.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
mx6qsabrelite has a sst25vf016b SPI NOR flash connected to eCSPI1.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
