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198,852 commits

Author SHA1 Message Date
Arnd Bergmann
28188546df AT91 DT for v5.20 #4
It contains one new LAN966 based board, namely pcb8309, a cleanup
 on Makefile to sort alphabetically LAN966 entries and 2 cleanups
 on bindings.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCYuDqzgAKCRCejrg/N2X7
 /WPFAP4z2YlG5d+5leV6FWkrTMAOzQdSIJCn1dD8zVzvu0bPNQEA5KdCUBmu7fVR
 jhxhVeu0LKfPnN6g/7BmguSGpwTyqws=
 =Ldrk
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLhQeIACgkQmmx57+YA
 GNkyeRAAwfPJwRH7mcxySV14u6JJdbt5FjlFbUuDy8NUckBBXEtuXJYEWXN5cBs3
 rajAF43GKBYTTqIqJzsY2DsWdJ2IKxTDosDZ/byIi071toAQHDXS59gBjFuMVNZk
 QhdNyQ4Qayf9N0Q+dPBN9wIA2Fe5Cn/8Y1Xi+cJ9OpWT6FaT+nyOJ8lin1iMsuW5
 anrE71tKwQHbIzwJ0QKoKvBxEimMA3TPK8PuBtOiIlkrYKr3BONtUk7WxG+zWKXd
 wTIz/ZGXEb0HuD6aVIWvCK0umLZIx+jHhmkRkXpAyIJKx2I/vHa4tsF/rUU1Bn2z
 CjuNZ71faZ+dijLzcLSPw1b3dMUK228FTcIVKl+K6Uf2Ds6BcH8Qv2FBrA+UYodT
 8qieWcy27MIqacFzbYDMd4rhflEOibEY7pvNiFCvLjzcgSiae2WhUA0bmF7G1/qw
 2MNDI/qYjSL5M7h8YhMflZySFh8pDRcEP/sl0+HcyKNGvKHpt7Y4PU9r+enEqe6n
 00VT5tpImh9afGawKcVmTwCSNKtnEcywx+r3jWTVlvlVdOjHJS1NyqJ8Y/bNUlvV
 At+57wJt/OlfTrqFMQ9IbGWKV4m7bJZiWFTuWYgrexpw8ovMh8LzPrkOWbm+iFhr
 cLfT4Txr3C7o5imkQSZ7Ie8mnBzlL3eQkSlBOMWX56hYanZMzZw=
 =NBpd
 -----END PGP SIGNATURE-----

Merge tag 'at91-dt-5.20-4' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt

AT91 DT for v5.20 #4

It contains one new LAN966 based board, namely pcb8309, a cleanup
on Makefile to sort alphabetically LAN966 entries and 2 cleanups
on bindings.

* tag 'at91-dt-5.20-4' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  dt-bindings: soc: microchip: use absolute path to other schema
  dt-bindings: soc: microchip: drop quotes when not needed
  ARM: dts: lan966x: keep lan966 entries alphabetically sorted
  ARM: dts: lan966x: add support for pcb8309
  dt-bindings: arm: at91: add lan966 pcb8309 board

Link: https://lore.kernel.org/r/20220727075749.2445000-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-27 15:47:14 +02:00
Claudiu Beznea
ed65704f3a ARM: dts: lan966x: keep lan966 entries alphabetically sorted
Keep LAN966 entries alphabetically sorted.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220726084931.1789855-1-claudiu.beznea@microchip.com
2022-07-27 09:49:02 +03:00
Horatiu Vultur
6239b21bbc ARM: dts: lan966x: add support for pcb8309
Add basic support for pcb8309. It is similar with pcb8291 with one big
difference that is having 2 SFP cages. Therefore it has 4 network ports.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220722131836.2377720-3-horatiu.vultur@microchip.com
2022-07-26 11:37:19 +03:00
Arnd Bergmann
10c4c5279b AT91 DT for v5.20 #3
It contains updates for LAN966X devices as follows:
 - clock gating support
 - gpio restart and network switch for lan966x-pcb8291 board
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCYtq99QAKCRCejrg/N2X7
 /U1cAQDhEhkYC7aOQ1tsyEJpg9rxNOHoGi/mksHi5+7UDSiYawEAv937T7C6lA6r
 08SSRTSJjUdYFuWFatmgV4Tvs5lvBgw=
 =tUgr
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLerrgACgkQmmx57+YA
 GNkKIQ/+I8iOobYXAonepLWk3PsiCTp7zH2a2w8g//EnaJbQjBptaXFlki2u2CUd
 zkpVfZlvA6Kc9Qf2qm5F2XMFkOTjej5LVs/VzsuIr+8FKcfx5u/8Bzy2jedK+Yit
 OhFYCM+MpuyaOUXvHJei8wDTXVlNK2R2phfuLslxLron3HhPFUbl+Z/+CAkWo6/O
 3Um7exDfYX0z0P5xqazMyqhxKUpCUKvWfiKpOZl8KcHC5C2STIVcC6Pan8GtINBm
 m5zMVsmk1BPdjF6bi73pEJ5BZpHQZjudLqTzdgzQ8b06gVuHSxNkap75rfs+bbEK
 F/j6AGVFHs7ZUTa++R/fkIti+L82nwkc94WLI6wLlBmoQvZ/RIDUklmBc/6XdTxc
 Mbbhz0bCkrd1FUUpOBA2mQ9EhTWbm9W8ak0h9n+NeTI1ckFjKTldZqTS80bVwVjW
 fPDsm5/arjJy2cXhzA9Tmbv//Jza8ZbmVabbzYOUlYJFGQpNl7W/RjtkfsNBSHv3
 Q1ZmjPCOuqo3kN6Cb+EX8uiQHSC+NLQdvvnwIxQ2bmDoXt2zc4Yh/yjfe0cwjSUb
 6KkiQclQmwDUkhO10hJs5GzZIT8YTBwN7a17P4e8Y7nLKNJSHkMh60HmjiudWNA2
 7v7VvkCHcR/6tDzMd5esmDWpkuV2x+V53glUfJEZi6kartdGnfY=
 =+9gv
 -----END PGP SIGNATURE-----

Merge tag 'at91-dt-5.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt

AT91 DT for v5.20 #3

It contains updates for LAN966X devices as follows:
- clock gating support
- gpio restart and network switch for lan966x-pcb8291 board

* tag 'at91-dt-5.20-3' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: lan966x: Enable network driver on pcb8291
  ARM: dts: lan966x: Disable can0 on pcb8291
  ARM: dts: lan966x: Add gpio-restart
  ARM: dts: lan966x: add clock gating register

Link: https://lore.kernel.org/r/20220722152041.1752962-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-25 16:54:48 +02:00
Horatiu Vultur
d3e71a2eae ARM: dts: lan966x: Enable network driver on pcb8291
The pcb8291 has 2 ports that are connected to the internal ports
of the switch. Enable them in DT.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
[claudiu.beznea: moved status ="okay" at the end for port0 and port1]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220719201158.1696168-4-horatiu.vultur@microchip.com
2022-07-22 17:54:09 +03:00
Horatiu Vultur
8d56c48354 ARM: dts: lan966x: Disable can0 on pcb8291
On pcb8291, can0 and the network driver share some of the GPIOs so only
1 device can be active. Therefore disable can0 as we want to enable the
network driver.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220719201158.1696168-3-horatiu.vultur@microchip.com
2022-07-22 12:11:02 +03:00
Horatiu Vultur
85e4739f88 ARM: dts: lan966x: Add gpio-restart
The pcb8291 can be rebooted by toggling the GPIO 56. Therefore enable
this in DT.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220719201158.1696168-2-horatiu.vultur@microchip.com
2022-07-22 12:11:02 +03:00
Arnd Bergmann
2c947cd63b More Qualcomm ARM64 DTS updates for v5.20
Related to SDM845, the Xiaomi Mi Mix2s is introduced, the DB845c on
 SDM845 gains support for the second GPI DMA controller and has the GENI
 I2C and SPI instances wired up to their respective GPI DMA controller.
 
 QCS404 USB controller and PHY assignment is corrected and IPQ8074 gains
 APCS definition to handle outgoing IPC interrupts.
 
 Lastly a range of Devicetree validation issues are addressed.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLYjLobHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F5h8QANItInM0qgZTRPXq+x2z
 a2RWDX1YL5hmFR+KnTutC3nr5vjiRkBt6Vx8BCiTp6hKFhP36xKUeMVqUiIZ+M1H
 xBrtQzrLsw/M0xgDYT9b8xiarF+p8ZnKxK9be4hf9/BEvpeK2ec6yqH0UG+Hxv/G
 +346jU7hP5XUUZqLNR/17u5vNl/aWK1plyWC03xxaAX9QD8pS/Or+99HHm4SMC+H
 H9B1V86ul30Hh4Po8u2KPo/xZG6cpd25+FozcapMG8h7YomjphgMT1xqeB7klMVV
 9qQYbjcTD4vXG3/fNyonuj9heoWYgFUPmSfIgnPx8HtHiGmB4BaP65ruWMYu7CfZ
 2sAxk6bcB+CrwktCITeiS0pUNj3ySBrGs3GK8Qde4b5ipVJ5mTbwTVWrJYMRZQrL
 7UakNmkruh08ctVa1wGJfXwnq6j7Q/1SEfi3rHXFlcZJqTQN9KEVKUhD1tXhgZSy
 4DOtdOaoi6eVwc4aslM4EH1NjBEIWTbSNminLeHl8WAVIsxQbHt+/i15hDb47Zd2
 3Ed18iLwqSHuWctobcx0CiTGgRnvIiVckrJO87y1Csdf3YQBOPJ1gkM1CiH4EOUY
 FtsNTYpihJ+xGH5U5vhVqIZ1iBvuaV38ryQs7SaU2E6Z0AHBeD8BP5BO6inBEWnk
 fT1lIyrZcO8mGwrlX7FCJ8UP
 =yD5f
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLZTRkACgkQmmx57+YA
 GNk56g/+MenTEV5wlvuPDGOnrCjejMO1+gOMBNBibJoz5NwvnVZMT9JA+jBlL+4K
 jqwLcGCEcj2Uxi//oCXPazHkp1MNPeDf5l+sDTqYddgl5pURhNljCAv9vGCanFFk
 V+4AtC9o/xiCwtpWGYuTSDOm2IEeeVXdwT2B7Ph3O5ucABczB2zEUAK7F7n9mq+d
 aLefmE8LOTP+a83EBZgKsZ2J/QEtSSRqf3fMURP/kj7zVOjJsCc8AJyXnZjpHHxq
 AGufsPyoWCWQGRJKHbrI7/ofrU/aSH6OsrNJC9SwiyfC0OXRXsD763kPMp+bi499
 1vidjcrPTmmYlJhDolpv3YFnwV695dMNZjRw6oIJ6uyrEI3Ska7ltKJF5W0maiHg
 DT79Cu2Ru/EjAqkfb4DUtopG4hprTeG9IS4uhXTE1edB9N1AZGQrSD0z/jc2J7g9
 inQuM9ljxrU8XvQYSDEv3i6vaA/JM10kcwhI1C33l51XZttzk6rh9xO0DuOpul8p
 08VbXR9SThYnIR6rQLW31BDKldDkugaPUG+v9vaEbodq6E14bSawqLQ63jAsyu+V
 ATfVtaRtadioMgyuIRcQg/Ab73svTjd8/MqLVvCBdZc64NGIibg7DlsObEE0MeFV
 oS6aEzMqKf6rt3bK3zgMBpB7G0iyEkY+X5SN/TcmwasXcY6hXLw=
 =y0DL
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm64-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

More Qualcomm ARM64 DTS updates for v5.20

Related to SDM845, the Xiaomi Mi Mix2s is introduced, the DB845c on
SDM845 gains support for the second GPI DMA controller and has the GENI
I2C and SPI instances wired up to their respective GPI DMA controller.

QCS404 USB controller and PHY assignment is corrected and IPQ8074 gains
APCS definition to handle outgoing IPC interrupts.

Lastly a range of Devicetree validation issues are addressed.

* tag 'qcom-arm64-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (53 commits)
  arm64: dts: qcom: Add support for Xiaomi Mi Mix2s
  dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings
  dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices
  dt-bindings: arm: qcom: add missing SM6350 board compatibles
  dt-bindings: arm: qcom: add missing SM6125 board compatibles
  dt-bindings: arm: qcom: add missing SDM845 board compatibles
  dt-bindings: arm: qcom: add missing SDM636 board compatibles
  dt-bindings: arm: qcom: add missing SDM630 board compatibles
  dt-bindings: arm: qcom: add missing QCS404 board compatibles
  dt-bindings: arm: qcom: add missing MSM8992 board compatibles
  dt-bindings: arm: qcom: add missing MSM8998 board compatibles
  dt-bindings: vendor-prefixes: add Shift GmbH
  dt-bindings: arm: qcom: add missing SM8350 board compatibles
  dt-bindings: arm: qcom: add missing SM8250 board compatibles
  dt-bindings: arm: qcom: add missing SM8150 board compatibles
  dt-bindings: arm: qcom: add missing MSM8994 board compatibles
  dt-bindings: arm: qcom: add missing MSM8916 board compatibles
  dt-bindings: arm: qcom: fix MSM8994 boards compatibles
  dt-bindings: arm: qcom: fix MSM8916 MTP compatibles
  dt-bindings: arm: qcom: fix Longcheer L8150 compatibles
  ...

Link: https://lore.kernel.org/r/20220720231643.2114565-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-21 14:56:57 +02:00
Arnd Bergmann
3d2b5fddd0 More Qualcomm DTS updates for v5.20
This adds an additional GSBI, hwclock, smem and tsens nodes for IPQ8064,
 in addition to fixing up and improving the existing descriptions of the
 platform.
 
 USB interrupts are reordered to please the Devicetree binding.
 
 The Light Pulse Generator is defined for PM8941 and LEDs are defined for
 the FairPhone2, Nexus 5 and Sony Xperia devices.
 -----BEGIN PGP SIGNATURE-----
 
 iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLYi3cbHGJqb3JuLmFu
 ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FIB4P/Avux6+k6nw9atsXoc8s
 tfpkvjXiKct19Meljl6Vuhl6Oe+kdiu3FkS3Hp2AyXxr1FoIoHevrOk+a7QaJBzR
 3rqRrDWqGmXoxvoUrvaFuJN7igwW/SLPBsr8P96ViUJynrsOjdOdIq/+tsCHknFT
 sDixxVIPlmtX0UycSyZbSVLr/OstNtwSO1EDC/DnF6+pWCX9NhjGNDR/OQioJ2PQ
 bPDSlEgTP4jDTJgyT4zU2XD6eKAK+XaXJi1dOs8EkQWx1+EJn3MzyoNeUsN2ihaD
 UhSwlhzIyEcN++crfYq0mVILnjG9qk5gzgpV0sMQOii7MzI3MGRGp7SVTM5Qf4FM
 /dL24wKDWmyrSaqEZ21GCBMAG0zDWnmD3lnrkksKE9idMnynfAuLb2155QlIuzH/
 bvKVdEad1wXhRGwKMLmkIN9yGcYLD4ocFakO14fk0uSCsmSC1z3Rkl/pXHDwKSE5
 CRqu//7CM/ukpNKtk712sBsjsPrm5fzL658L7z+qsueKe7I579SChrPNunDhLC/Q
 IR2fGoA+CgR/NF3BTiBPxFhw3KTpq2DY9MTgTsyMD1wBB41Y8IgVMRAoT9B5SQq/
 4UnWf+wveyoUKupjABLsGv4I4dCBXYrSWNRJF+7GRe8rMqG3QrjnOnExcJB+ecVf
 AKcJr5SN9AkLszSrPw35//Hl
 =+xsC
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLZTL0ACgkQmmx57+YA
 GNnkNhAAkJl2rEGgTOm4lQeQLL1nhlxpraKlbxOIGDAmdmLZRQXE+4o9F4pOT7DI
 Hilwz7jmQFYmbakxRwHmm8c9c93gR7sELeM/0HPmGyNQcKux1mqXsShab3IdncRl
 AXLCt5btgDvJHIwSk1FX5/ryY3ZGOM2dIg1W7uc+ZvsKOAjhabm0t74Ghm49ZdYC
 KSsct1WxeuF7S7IGrKVvKQcSUroli7kNMe/aIAkWDQQWZHKzMqcvNjPH0twzc1eo
 3J7t6NuFr7ksP50CuHloHV0x+c+YXAbQFdpcT1//W9UtwjiiYKzoq3V68UqTxr0K
 RFFiDLpaTC3Kjhp96TkM74d8XBYuoGufqQRC7bzUJFnrpCWve2nYNo7BTrH3W9q4
 nBO7lDcbcz6ag872q3xKmkz91zfnz/OXZ1hVsMbf2lwhWF6KAh0x31NXQMCaWoWL
 6+7cjl3sqneaEUrJvffoywElgHbRkM7x5oNOCgrfqIkYfXlD4s40AAwG/XF/G7I+
 0MJMQ3yVtIm06T2xMeirH0GnpmzLc+B/k24HRi0+G80o8a8ht2ActgpbCH9ngxuD
 YpiH0hmIioNHiIu1OZDuPvWTp46Lx6Xf/q7PNq5K8YcBSpY1uwXwbez6PEQ21Gc9
 lY864zOu87ZLsYd0NB/zW0oFQDE52f5kQS399gRd0z8KiNi8D4s=
 =ClPr
 -----END PGP SIGNATURE-----

Merge tag 'qcom-dts-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

More Qualcomm DTS updates for v5.20

This adds an additional GSBI, hwclock, smem and tsens nodes for IPQ8064,
in addition to fixing up and improving the existing descriptions of the
platform.

USB interrupts are reordered to please the Devicetree binding.

The Light Pulse Generator is defined for PM8941 and LEDs are defined for
the FairPhone2, Nexus 5 and Sony Xperia devices.

* tag 'qcom-dts-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: add rpmcc missing clocks for apq/ipq8064 and msm8660
  ARM: dts: qcom: msm8974: Disable remoteprocs by default
  ARM: dts: qcom: ipq8064: add missing smem compatible
  ARM: dts: qcom: ipq8064: add missing hwlock
  ARM: dts: qcom: ipq8064: add speedbin efuse nvmem node
  ARM: dts: qcom: ipq8064: fix and add some missing gsbi node
  ARM: dts: qcom: ipq8064: reduce pci IO size to 64K
  ARM: dts: qcom: ipq8064: disable usb phy by default
  ARM: dts: qcom: ipq8064: add missing snps,dwmac compatible for gmac
  ARM: dts: qcom: ipq8064: add specific dtsi with smb208 rpm regulators
  ARM: dts: qcom: ipq8064: add gsbi6 missing definition
  ARM: dts: qcom: ipq8064: add multiple missing pin definition
  ARM: dts: qcom: msm8974-hammerhead: Add notification LED
  ARM: dts: qcom: msm8974-FP2: Add notification LED
  ARM: dts: qcom: msm8974-sony: Enable LPG
  ARM: dts: qcom: Add LPG node to pm8941
  ARM: dts: qcom: sdx65: reorder USB interrupts
  ARM: dts: qcom: apq8064: create tsens device node

Link: https://lore.kernel.org/r/20220720231111.2114025-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-21 14:55:25 +02:00
Molly Sophia
be497abe19 arm64: dts: qcom: Add support for Xiaomi Mi Mix2s
Add support for Xiaomi Mi Mix2s (polaris) handsets.

Currently working features:
- UFS
- Touchscreen
- USB 2
- Bluetooth
- Wi-Fi
- GPU
- Venus
- Display (need jdi-fhd-nt35596s panel driver, which I have sent a
  patch but it haven't been into upstream yet)

Signed-off-by: Molly Sophia <mollysophia379@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220712145139.9473-2-mollysophia379@gmail.com
2022-07-20 13:08:42 -05:00
Michael Walle
819c620507 ARM: dts: lan966x: add clock gating register
The clock controller supports an optional clock gating register. This is
necessary to expose the USB device clock, for example. Add it.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220707132500.1708020-1-michael@walle.cc
2022-07-20 09:49:31 +03:00
Bhupesh Sharma
360d952676 arm64: dts: qcom: qrb5165-rb5: Fix 'dtbs_check' error for led nodes
make dtbs_check currently reports the following errors
with qrb5165-rb5 led nodes:

arch/arm64/boot/dts/qcom/qrb5165-rb5.dtb:
 leds: 'bt', 'user4', 'wlan' do not match any of the regexes:
  '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'

Fix the same.

Also while at it, fix a blank line issue in the led
node.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220719205058.1004942-3-bhupesh.sharma@linaro.org
2022-07-19 17:20:11 -05:00
Bhupesh Sharma
1282fa32d7 arm64: dts: qcom: qrb5165-rb5: Fix 'dtbs_check' error for lpg nodes
make dtbs_check currently reports the following warnings
with qrb5165-rb5 lpg nodes:

arch/arm64/boot/dts/qcom/qrb5165-rb5.dts:
 Warning (reg_format): /soc@0/spmi@c440000/pmic@5/lpg/led@1:reg:
  property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts:
 Warning (avoid_default_addr_size): /soc@0/spmi@c440000/pmic@5/lpg/led@1:
  Relying on default #address-cells value

Fix the same.

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220719205058.1004942-2-bhupesh.sharma@linaro.org
2022-07-19 17:20:11 -05:00
Krzysztof Kozlowski
390ffde2b9
ARM: dts: aspeed: centriq2400: drop the board
The board is unmaintained and unused, according to Joel, so simply let's
remove it.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/all/CACPK8XfxXi8kQr+vxta8rD6SBgxLf_oBjAH0UkPBacQta552YQ@mail.gmail.com/
Link: https://lore.kernel.org/r/20220623072428.33697-1-krzysztof.kozlowski@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19 23:22:51 +02:00
Arnd Bergmann
26c350fe7a mvebu dt64 for 5.20 (part 1)
Add support for Marvell 98DX2530 (and variants)
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCYtavZAAKCRALBhiOFHI7
 1cppAKCTWos36VwvV+vKWV0+DfOUcikV2QCdHLcmQ0ygjT6AsW2/yPJfoNuM4b0=
 =7i0h
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLWsuIACgkQmmx57+YA
 GNlY0xAAqm4ruRmNyoCpkGOjg72+SLJlEZbhELMarHLopKMYrM4fIxyruuGmD1Cp
 r1uv21oZiDJhmr1sXqbtjOghNdsce3s1tKrYoWeMFgFTfDQGu4Bw7NWZZgY5xeqI
 aGxCdFgD9pCYaZgIXYlEqC2qLQP1eGypSTCFjgw+7JWnq57hZxsBYuQnAJhlu79g
 +xpRUVoTEc7duPKE2m2Vb2FhoJVaLSMC5T0ZiqekGX3wAO4JEHwSa8YFLPJ04HGg
 DESXMiWVUPYWrZ86vce6rtn0JWCBRRGeI3rZxsRYQ3xWYMhq27CL3E5PkQcrNwIH
 29gr/Uzu2d5JlJgMSyT8bk+79eHbvhQoX/Daossk3DvHCOfRjv3/POdYqfaoWGAd
 nq3W5oxW4X+8eXP/zY7p4o7i/y03j0/VtbgtCUEOk3OkL5idqQxXeJTnr1XSPdm4
 NnAAhB1xTZ8o3v8ohMAIuNvdFbJ3Mq0o+xuYPRVSJwLPgnXfpQfWMdI9Ag4eK7MI
 1wkV9g8SFwqvd/vZyI+6jYYo8FPkc0JYvs88cAMXy1Tjw6ywRKprUlBrM2My9tre
 Ta3b2W1JUHYrniQoet+Z0GKg5xOtjkS9K9n4P3/ilq8zNYCURSaJCGmdOLwQw4Zs
 ZB7/PFQcLRVMBEJ913RefxcJG5ShnOiwrLtYIsB1wI0SRn3VAMw=
 =FqlL
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt64-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt

mvebu dt64 for 5.20 (part 1)

Add support for Marvell 98DX2530 (and variants)

* tag 'mvebu-dt64-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  arm64: marvell: enable the 98DX2530 pinctrl driver
  arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board
  dt-bindings: marvell: Document the AC5/AC5X compatibles

Link: https://lore.kernel.org/r/87cze1qlg3.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19 15:34:26 +02:00
Chris Packham
8225663e0c arm64: marvell: enable the 98DX2530 pinctrl driver
This commit makes sure the drivers for the 98DX2530 pin controller is
enabled.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-07-19 15:15:00 +02:00
Chris Packham
b795fadfc4 arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board
The 98DX2530 SoC is the Control and Management CPU integrated into
the Marvell 98DX25xx and 98DX35xx series of switch chip (internally
referred to as AlleyCat5 and AlleyCat5X).

These files have been taken from the Marvell SDK and lightly cleaned
up with the License and copyright retained.

gregory.clement: use specific cpu type: cortex-a55 instead of armv8 in
cpu nodes, armv8 being reserved for the arm virtual models that are
not meant to implement a particular CPU type.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-07-19 15:12:43 +02:00
Arnd Bergmann
7dbb1b0b46 mvebu dt for 5.20 (part 1)
Enable LED to link/activity on turris-omnia (Armada 385 based)
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCYtamCAAKCRALBhiOFHI7
 1WAcAKColFpM8Qnzo1LxGoBVFWTCjW0uXACgmA1l8XJHwUQWKyM4Yy2/vVxz+NI=
 =3H9L
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLWrS0ACgkQmmx57+YA
 GNlR6g/+JhZTO6aQOvURme3W2Q5RoiifB2E3jHYl9gPzcJiKYJz1rE54idOa19sB
 lOJBedi3TbDFxUhdOMuWz4iNm845ZWMeii5dpW2KjEcHrFa8P98TTlcX7eCdoZgU
 3c3LuhG5D8bT5HMjgfmwIio+d0AFNqpwsHg2m5lF/c4LX1GlmVqpRxUtGreyCyYg
 Ahc/4o7myVg3jzk0Il2RS13lF6lzT7FACoRbaxEF9u9YAr48XPh+k22z0bY6at/h
 Clu3Rq+4SxcbiLtfU+MoaCHbcpp4HFNkTNNgeF20D29tZ++gzaGEFqeRnaqXKMHU
 q1aq6jknA4Km/Wzh0cyouVi2/hrqF7D9d/ERg7Te1/d+Y8G0QsHQ96KD4T0vhjXZ
 Z/hJSfSK1TZ2BAvV+Ex7WIlG28OpiKgwkcDxKTNuCqNJrKZf/NgUDkeLftq8+1Bj
 POcJEqeIvThgpvXOYxKxF3q34cnCf83jg/wK8j97I6JwBiPIrTbl2aeHRaN0REGy
 d4hRDnRHne5qsDBxwQgtBvUn1tm9salmrN8+GaLkZ6Leuv4K7qtL3UMXfXbRWbXm
 k+RQY8yZrHWTRTqVUDUnHs6Y2lyZjBmxuH4atCqUkUViRd8AuuN6y/BL16AAZIBU
 vHe4Fa5k5dRmBuHNGoncj+RF8KRc21VNPrhhWtEsnzHimTQfZLk=
 =oiaq
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt

mvebu dt for 5.20 (part 1)

Enable LED to link/activity on turris-omnia (Armada 385 based)

* tag 'mvebu-dt-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  ARM: dts: turris-omnia: enable LED controller node
  ARM: dts: turris-omnia: configure LED[0] pin function to link/activity

Link: https://lore.kernel.org/r/87lespqn28.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19 15:10:05 +02:00
Bjorn Andersson
746ff2bfce arm64: dts: qcom: sdm845-db845c: Specify a i2c bus clocks
The kernel log contains complaints about i2c11 and i2c14 lacking
clock-frequency, specify a reasonable value to suppress this warning.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220717034403.2135027-4-bjorn.andersson@linaro.org
2022-07-18 23:33:28 -05:00
Bjorn Andersson
79cfb1124a arm64: dts: qcom: sdm845-db845c: Enable gpi_dma1
Enable gpi_dma1 so that i2c14 is able to find its DMA controller.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220717034403.2135027-3-bjorn.andersson@linaro.org
2022-07-18 23:33:28 -05:00
Bjorn Andersson
0f064ae7cf arm64: dts: qcom: sdm845: Fill in GENI DMA references
The I2C and SPI might be configured in GPI DMA mode, fill in the
properties needed for this.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220717034403.2135027-2-bjorn.andersson@linaro.org
2022-07-18 23:33:28 -05:00
Christian Marangi
aa7fd3bb60 ARM: dts: qcom: add rpmcc missing clocks for apq/ipq8064 and msm8660
Add missing rpmcc pxo and cxo clock for apq8064, ipq8064 and
msm8660 dtsi.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706225321.26215-3-ansuelsmth@gmail.com
2022-07-18 19:13:44 -05:00
Kuogee Hsieh
8ed85d1e51 arm64: dts: qcom: sc7280: delete vdda-1p2 and vdda-0p9 from both dp and edp
Both vdda-1p2-supply and vdda-0p9-supply regulators are controlled
by dp combo phy. Therefore remove them from dp controller.

Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1657556603-15024-1-git-send-email-quic_khsieh@quicinc.com
2022-07-18 18:56:57 -05:00
Steev Klimaszewski
757991c077 arm64: dts: sdm850: Remove unnecessary turbo-mode
qcom-cpufreq-hw finds turbo-mode in the LUT hardware tables
and slaps the flag on the last element, so there's no reason
to add it in the dts, so remove it.

Signed-off-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220718230109.8193-1-steev@kali.org
2022-07-18 18:10:52 -05:00
Steev Klimaszewski
5969d3290f arm64: dts: qcom: sc8280xp: add missing 300MHz
When booting a Thinkpad x13s, we see the message

[    0.997647] cpu cpu0: failed to update OPP for freq=300000

So, lets add in 300MHz to make it happy

Signed-off-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220718225714.8074-1-steev@kali.org
2022-07-18 18:02:24 -05:00
Marek Behún
40624346b7 ARM: dts: turris-omnia: enable LED controller node
The LED controller node is disabled because the leds-turris-omnia driver
does not support setting the LED blinking to be controlled by the MCU.

The patches for that have now been sent [1], so let's enable the node.

[1] https://lore.kernel.org/linux-leds/20220704105955.15474-1-kabel@kernel.org/T/

Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-07-18 12:42:18 +02:00
Marek Behún
94a29bffdd ARM: dts: turris-omnia: configure LED[0] pin function to link/activity
The marvell PHY driver changes the LED[0] pin function to "On - 1000
Mbps Link, Off - Else".

Turris Omnia expects that the function is "On - Link, Blink - Activity,
Off - No link".

Use the `marvell,reg-init` DT property to change the function.

In the future, once netdev trigger will support HW offloading, we will
be able to have this configured via the combination of PHY driver and
leds-turris-omnia driver.

Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-07-18 12:42:18 +02:00
Stephan Gerhold
8d8be8dd7c ARM: dts: qcom: msm8974: Disable remoteprocs by default
The remoteproc configuration in qcom-msm8974.dtsi is incomplete because
it lacks the regulator supplies that should be added in the board DT
files. Some of the msm8974 boards are currently missing the regulator
supplies and should have the remoteprocs disabled to avoid making use
of the incomplete configuration.

This also fixes dtbs_check warnings after moving "qcom,msm8974-mss-pil"
to DT schema, which rightfully complains that the -supply properties
are missing for some boards:

qcom-apq8074-dragonboard.dtb:
remoteproc@fc880000: 'pll-supply' is a required property
        From schema: remoteproc/qcom,msm8916-mss-pil.yaml
remoteproc@fc880000: 'mss-supply' is a required property
        From schema: remoteproc/qcom,msm8916-mss-pil.yaml
remoteproc@fc880000: 'oneOf' conditional failed, one must be fixed:
        'power-domains' is a required property
        'power-domain-names' is a required property, or
        'cx-supply' is a required property
        'mx-supply' is a required property

Cc: Luca Weiss <luca@z3ntu.xyz>
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Fixes: f300826d27 ("ARM: dts: qcom-msm8974: Sort and clean up nodes")
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220712124421.3129206-4-stephan.gerhold@kernkonzept.com
2022-07-16 22:06:45 -05:00
Christian Marangi
4fefb5434c ARM: dts: qcom: ipq8064: add missing smem compatible
Add missing smem compatible and hwlocks phandle for ipq8064 dtsi
smem node.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707102040.1859-3-ansuelsmth@gmail.com
2022-07-16 21:53:01 -05:00
Christian Marangi
fbe4be367b ARM: dts: qcom: ipq8064: add missing hwlock
Add missing hwlock for ipq8064 dtsi provided by qcom,sfpb-mutex.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[bjorn: Moved the node inside /soc]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707102040.1859-2-ansuelsmth@gmail.com
2022-07-16 21:52:33 -05:00
Christian Marangi
7f5aecdd4f ARM: dts: qcom: ipq8064: add speedbin efuse nvmem node
Add speedbin efuse nvmem cell needed for the opp table for the CPU
freqs.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-10-ansuelsmth@gmail.com
2022-07-16 21:44:38 -05:00
Christian Marangi
6c421a9c08 ARM: dts: qcom: ipq8064: fix and add some missing gsbi node
Add some tag for gsbi to make them usable for ipq8064 SoC. Add missing
gsbi7 i2c node and gsbi1 node.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-8-ansuelsmth@gmail.com
2022-07-16 21:44:30 -05:00
Christian Marangi
8fafb7e5c0 ARM: dts: qcom: ipq8064: reduce pci IO size to 64K
The current value for pci IO is problematic for ath10k wifi card
commonly connected to ipq8064 SoC.
The current value is probably a typo and is actually uncommon to find
1MB IO space even on a x86 arch. Also with recent changes to the pci
driver, pci1 and pci2 now fails to function as any connected device
fails any reg read/write. Reduce this to 64K as it should be more than
enough and 3 * 64K of total IO space doesn't exceed the IO_SPACE_LIMIT
hardcoded for the ARM arch.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-7-ansuelsmth@gmail.com
2022-07-16 21:44:23 -05:00
Christian Marangi
d63d3124c0 ARM: dts: qcom: ipq8064: disable usb phy by default
Disable usb phy by default. When the usb phy were pushed, half of them
were flagged as disabled by mistake.
Correctly disable all usb phy and enable them only if a device actually
use them.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-6-ansuelsmth@gmail.com
2022-07-16 21:44:15 -05:00
Christian Marangi
0ce34e0c13 ARM: dts: qcom: ipq8064: add missing snps,dwmac compatible for gmac
Add missing snps,dwmac compatible for gmac ipq8064 dtsi.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-5-ansuelsmth@gmail.com
2022-07-16 21:44:06 -05:00
Christian Marangi
5c47a46d5e ARM: dts: qcom: ipq8064: add specific dtsi with smb208 rpm regulators
Add specific ipq8064 dtsi with smb208 rpm regulators.

Qcom advise to use this configuration but it's not mandatory and OEM
can decide to implement their own regulators.
smb208 regulators are used to scale CPU voltage, L2 cache voltage and
Ubi32 cores.

There regulators are controlled by rpm and to correctly works gsbi4-i2c
require to be NEVER disabled or rpm will reject any regulator change
request.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-4-ansuelsmth@gmail.com
2022-07-16 21:43:51 -05:00
Christian Marangi
d883a12a54 ARM: dts: qcom: ipq8064: add gsbi6 missing definition
Add gsbi6 missing definition for ipq8064.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-3-ansuelsmth@gmail.com
2022-07-16 21:43:45 -05:00
Christian Marangi
4af1defb30 ARM: dts: qcom: ipq8064: add multiple missing pin definition
Add missing definition for mdio0 pins used for gpio-bitbang driver,i2c4
pins and rgmii2 pins for ipq8064.

Drop i2c4_pins node from ipq8064-ap148 dts as it's now moved to ipq8064
dtsi.

Drop mdio0_pins node from ipq8064-rb3011 dts as it's now moved to
ipq8064 dtsi.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-2-ansuelsmth@gmail.com
2022-07-16 21:43:37 -05:00
André Almeida
1ea9098a81 ARM: dts: qcom: msm8974-hammerhead: Add notification LED
Nexus 5 has a RGB LED connected to the TRILED and hence channels 7, 6 and
5 of the LPG. Add a node describing this.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: André Almeida <andrealmeid@collabora.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505164336.13210-1-luca@z3ntu.xyz
2022-07-16 21:40:06 -05:00
Luca Weiss
a037fcabdb ARM: dts: qcom: msm8974-FP2: Add notification LED
FP2 has a RGB LED connected to the TRILED and hence channels 7, 6 and
5 of the LPG. Add a node describing this.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505163029.6541-1-luca@z3ntu.xyz
2022-07-16 21:39:20 -05:00
Bjorn Andersson
27f5947894 ARM: dts: qcom: msm8974-sony: Enable LPG
Both Castor and Honami has RGB LEDs driven by the PM8941 LPG, define
these.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20220713212309.130230-3-bjorn.andersson@linaro.org
2022-07-16 21:38:51 -05:00
Bjorn Andersson
5edd7d3e15 ARM: dts: qcom: Add LPG node to pm8941
The PM8941 contains 8 LPG channels, as well as TRILED and LUT blocks.
Add a node for these.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20220713212309.130230-2-bjorn.andersson@linaro.org
2022-07-16 21:38:51 -05:00
Johan Hovold
079926b5a2 ARM: dts: qcom: sdx65: reorder USB interrupts
Three SoCs did not follow the interrupt order specified by the USB
controller binding.

While keeping the non-SuperSpeed interrupts together seems natural,
reorder the interrupts to match the binding.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
[bjorn: Split out from arm64 patch]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715070248.19078-5-johan+linaro@kernel.org
2022-07-16 21:31:56 -05:00
Johan Hovold
5b7e3499e3 arm64: dts: qcom: reorder USB interrupts
Three SoCs did not follow the interrupt order specified by the USB
controller binding.

While keeping the non-SuperSpeed interrupts together seems natural,
reorder the interrupts to match the binding.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
[bjorn: Omitted sdx65 part from this patch]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715070248.19078-5-johan+linaro@kernel.org
2022-07-16 21:30:43 -05:00
Johan Hovold
2a8d28b8af arm64: dts: qcom: sc7280: reorder USB interrupts
Only one of the USB controllers supports SuperSpeed and have an SS PHY
wakeup interrupt.

Reorder the interrupts so that they match the updated binding which
specifically has the optional interrupt last.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715070248.19078-4-johan+linaro@kernel.org
2022-07-16 21:30:12 -05:00
Johan Hovold
0bd6b33c51 arm64: dts: qcom: sc8280xp: fix USB interrupts
The two single-port SC8280XP USB controllers do not have an hs_phy_irq
interrupt. Instead they have a pwr_event interrupt which is distinct
from the former and not yet supported by the driver.

Fix the USB node interrupt names so that they match the devicetree
binding.

Also fix the pwr_event interrupt of the second controller which should
be 811 as noticed by Andrew Halaney.

Fixes: 152d1faf1e ("arm64: dts: qcom: add SC8280XP platform")
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715070248.19078-3-johan+linaro@kernel.org
2022-07-16 21:30:12 -05:00
Johan Hovold
68af5d7c6d arm64: dts: qcom: sc8280xp: fix USB clock order and naming
Fix the USB controller clock order and naming so that they match the
devicetree binding.

Note that the driver currently simply enables all clocks in the order
that they are specified in the devicetree. Reordering the clocks as per
the binding means that the only explicit ordering constraint found in
the vendor driver, that cfg_noc should be enabled before the core_clk,
is now honoured.

Fixes: 152d1faf1e ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715070248.19078-2-johan+linaro@kernel.org
2022-07-16 21:30:12 -05:00
Arnd Bergmann
2c071ce53d This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.20, second part, please pull the following:
 
 - Rafal adds basic support for the BCM4912-based router Asus GT-AX6000,
   he also has ARCH_BCM4908 select ARCH_BCMBCA such that in the next cycle
   we can remove ARCH_BCM4908 and continue to have make oldconfig work.
   Finally he spells out what BCA means to make it clearer
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmLR5GMACgkQh9CWnEQH
 BwTQCxAAxaALuW5N/uso6vj64Zc/sLkrWupmjcz0ta57lnRus2K7CjpEGbiYEvU9
 BXj4o9jNWpugCp5MwMzRSnQCC6AcrrS7vV3aLblxVwP4Dqlvb3h1i1N8qGzVJKVC
 vurbroIcCjqSx9J0i/bhD+X5Jyc0WYgwJajxSTU3so9YpD0asUHN/sOrz8t/LgW+
 NmUwr3toe7WpvylV5eRPyqKGUWDZYhg0qePaKZJ6jgM9cQqlwIWzguWdCn6YEHZe
 9EqQZjqstyq57EwNXfPOf8Ytb2/lp2j9/1NCBaJ6TFEUEruGWgHFh2m8mV0juEKG
 3y0lnsh5GXhshvT6+kUKzXY1MwzHagAPv1ax0To1Zc5rsgKMIuo11We3XDVlu326
 NHUXqQSoubBf5PE4jmmrpN3ay0ouXMSo0PjNZzSvS3TAWz76+q6WU4bgqvEf+vNE
 5XOhAATbWY+Zpt/m9Xv0l1pP2UzdENF+lpi5T9XAnygA3N0cMB3uhxAUmGHVekIJ
 4OPS2w2M0N2C43icb188o0GiswnzVZTw46SSY0gTEU6FQD3YplMtztbrK3Lr6F8q
 13C/aoXY/+xgeMnsFD4Te1JfdHEknzhNT7mkOsYYKDZJGhlrShHnrRXze3QDkn18
 OAkg7v+z4lkt2h7Xckoo9vVqJKrYE1582H5QmPOKQKzk0pIecFM=
 =fDSG
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLTFe0ACgkQmmx57+YA
 GNk0pBAAge+TlunaSMIGcYrh3q0If3krLoWyecACCA1TDP5K8PkEKrPok+u1rusl
 OeL6s/nL0uIdGEIU+6scGav/ZSFYr20vtstnyP2WmwQQUt3oEeqMfE1Ch/kCNL/K
 WhgwvNQA9GcvQphHSrwfZY2kHLkPUGgFA9cleaEghjuqs0kP46OABaRNIUZVRHMZ
 dp7SzzY/55TmxQQiYD6raAI8U0kxAaPxzqo+4sBcvNyccKfrAZP9WGyTsTmyn6uV
 IN+sAwsMS1WGAgXL0zQWAxEVxNdvbnt8q9+/tBzIIeZZYdeA0B/m5ZJ3DUaa8/kY
 zfH5UM8kNKUQx2cwdTNYiUT7YGdbZ+9iUCbiSUt9ELK0LMl1Rhu7i4wPA+K7/8Kn
 10o+6kjj75kYjA3fm3wntFgtmTZLPRqpz5AQf4+XwdQ8QkiXNNCglYCUnEf9cvaQ
 ThFyIFfadOB2uCEJ+59kg7v8cQNLZffrNGqks0mD9/MDbRD3kMEZYrwMaGrxeeSz
 3HVANUWXLoM0wyI7lC+vLwYgbGwtcglOEprtfPA9MvSUTfJPyZ7bYOnX0zBCwdLX
 tN1g/gIbYkQ80t/ce+HQc4sfxPgkk8W5D8eTy+t50BReEguJ39AVKByxVZLLnW/h
 ZwmwRrqSKD9d2Ps69K7z4nMJAEO/5mqbDw8++U18eqhDUJK+8Kw=
 =7JrY
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-5.20/devicetree-arm64-part2' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.20, second part, please pull the following:

- Rafal adds basic support for the BCM4912-based router Asus GT-AX6000,
  he also has ARCH_BCM4908 select ARCH_BCMBCA such that in the next cycle
  we can remove ARCH_BCM4908 and continue to have make oldconfig work.
  Finally he spells out what BCA means to make it clearer

* tag 'arm-soc/for-5.20/devicetree-arm64-part2' of https://github.com/Broadcom/stblinux:
  arm64: bcmbca: Include full family name in Kconfig
  arm64: make ARCH_BCM4908 select ARCH_BCMBCA
  arm64: dts: Add base DTS file for bcmbca device Asus GT-AX6000

Link: https://lore.kernel.org/r/20220715221642.297536-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-16 21:47:57 +02:00
Johan Hovold
1583984623 arm64: dts: qcom: sc8280xp: fix usb_1 ssphy irq
Fix the usb_1 SS PHY interrupt, which was mistakingly replaced with one
of the usb_2 PHY interrupts.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715165344.28822-1-johan+linaro@kernel.org
2022-07-16 10:18:15 -05:00
Manivannan Sadhasivam
39aa5646ad arm64: dts: qcom: sc8280xp: Fix PMU interrupt
PPI interrupt should be 7 for the PMU.

Cc: Johan Hovold <johan+linaro@kernel.org>
Fixes: 152d1faf1e ("arm64: dts: qcom: add SC8280XP platform")
Reported-by: Steve Capper <Steve.Capper@arm.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220713143429.22624-1-manivannan.sadhasivam@linaro.org
2022-07-16 10:18:15 -05:00