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1,308,922 commits

Author SHA1 Message Date
Hans de Goede
38a38f5a36 Input: silead - Always support 10 fingers
When support for Silead touchscreens was orginal added some touchscreens
with older firmware versions only supported 5 fingers and this was made
the default requiring the setting of a "silead,max-fingers=10" uint32
device-property for all touchscreen models which do support 10 fingers.

There are very few models with the old 5 finger fw, so in practice the
setting of the "silead,max-fingers=10" is boilerplate which needs to
be copy and pasted to every touchscreen config.

Reporting that 10 fingers are supported on devices which only support
5 fingers doesn't cause any problems for userspace in practice, since
at max 4 finger gestures are supported anyways. Drop the max_fingers
configuration and simply always assume 10 fingers.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Link: https://lore.kernel.org/r/20240525193854.39130-2-hdegoede@redhat.com
2024-06-03 11:10:08 +02:00
Chen Ni
629f2b4e05 drm/panel: sitronix-st7789v: Add check for of_drm_get_panel_orientation
Add check for the return value of of_drm_get_panel_orientation() and
return the error if it fails in order to catch the error.

Fixes: b27c0f6d20 ("drm/panel: sitronix-st7789v: add panel orientation support")
Signed-off-by: Chen Ni <nichen@iscas.ac.cn>
Reviewed-by: Michael Riesch <michael.riesch@wolfvision.net>
Acked-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Link: https://lore.kernel.org/r/20240528030832.2529471-1-nichen@iscas.ac.cn
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240528030832.2529471-1-nichen@iscas.ac.cn
2024-06-03 10:46:36 +02:00
Ryan Walklin
62ea2eeba7 drm: panel: nv3052c: Add WL-355608-A8 panel
The WL-355608-A8 is a 3.5" 640x480@60Hz RGB LCD display from an unknown
OEM used in a number of handheld gaming devices made by Anbernic.
Limited information is available online however the panel timing values
(below) have been obtained from the vendor BSP. The panel appears to
integrate a NV3052C LCD driver (or clone). Available devices address it
in SPI/RGB mode, with the timing signals generated from the device
SoC (Allwinner H700) and passed through.

Add a panel definition and display mode to the existing NV3502C driver.

It was assumed during bringup that the initialisation sequence was the
same as the existing Fascontek FS035VG158 panel, proved working during
experimentation, however subsequent dumping of the init sequence with a
logic analyser confirms one small change to VCOM_ADJ3 from 0x4a to 0x44,
therefore a separate set of registers is also added.

Timings:
           | Active |  FP  | Sync |  BP  | Total
-----------|--------|------|------|------|-------
Horizontal |   640  |  64  |  20  |  46  |  770
  Vertical |   480  |  21  |   4  |  15  |  520

Signed-off-by: Ryan Walklin <ryan@testtoast.com>
Co-developed-by: Hironori KIKUCHI <kikuchan98@gmail.com>
Signed-off-by: Hironori KIKUCHI <kikuchan98@gmail.com>
Reviewed-by: John Watts <contact@jookia.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Link: https://lore.kernel.org/r/20240530211415.44201-4-ryan@testtoast.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240530211415.44201-4-ryan@testtoast.com
2024-06-03 10:41:14 +02:00
Ryan Walklin
45b888a898 dt-bindings: display: panel: Add WL-355608-A8 panel
The WL-355608-A8 is a 3.5" 640x480@60Hz RGB LCD display used in a
number of handheld gaming devices made by Anbernic. By consensus a
vendor prefix is not provided as the panel OEM is unknown.

Add a device tree binding for the panel.

Signed-off-by: Ryan Walklin <ryan@testtoast.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240530211415.44201-3-ryan@testtoast.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240530211415.44201-3-ryan@testtoast.com
2024-06-03 10:41:13 +02:00
Sam Ravnborg
4a534428ef MAINTAINERS: drm: Drop sam as panel reviewer
Drop myself as reviewer of panel patches, to reflect the reality.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240530211402.GA1660596@ravnborg.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240530211402.GA1660596@ravnborg.org
2024-06-03 10:40:47 +02:00
Andrew Jeffery
3a40985960 dt-bindings: gpio: aspeed,sgpio: Specify #interrupt-cells
Squash warnings such as:

    arch/arm/boot/dts/aspeed/aspeed-ast2500-evb.dtb: sgpio@1e780200: '#interrupt-cells' does not match any of the regexes: 'pinctrl-[0-9]+'

Also, mark #interrupt-cells as required. The kernel devicetrees already
specified it where compatible nodes were defined, and u-boot pulls in
the kernel devicetrees, so this should have minimal practical impact.

Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240530-dt-warnings-gpio-sgpio-interrupt-cells-v2-2-912cd16e641f@codeconstruct.com.au
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-06-03 10:34:53 +02:00
Andrew Jeffery
a31517b11b dt-bindings: gpio: aspeed,sgpio: Specify gpio-line-names
Some devicetrees specify gpio-line-names in the sgpio node despite it
not being defined by the binding. It's a reasonable thing to do, so
define the property to squash warnings such as:

    arch/arm/boot/dts/aspeed/aspeed-bmc-vegman-rx20.dtb: sgpio@1e780200: 'gpio-line-names' does not match any of the regexes: 'pinctrl-[0-9]+'

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20240530-dt-warnings-gpio-sgpio-interrupt-cells-v2-1-912cd16e641f@codeconstruct.com.au
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-06-03 10:34:53 +02:00
Frank Li
77e1ea9e99 dt-bindings: gpio: mpc8xxx: Convert to yaml format
Convert binding doc from txt to yaml.

Remove redundated "gpio1: gpio@2300000" example.
Add gpio-controller at example "gpio@1100".

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20240531164357.1419858-1-Frank.Li@nxp.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-06-03 10:25:17 +02:00
Fabio Estevam
8fce7727a7 dt-bindings: gpio: pca95xx: Document the TI TCA9535 variant
The TI TCA9535 variant has the same programming model as the NXP PCA9535.

Document the "ti,tca9535" compatible string.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240531121801.2161154-2-festevam@gmail.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-06-03 10:24:09 +02:00
Fabio Estevam
82466bb622 gpio: pca953x: Add support for TI TCA9535 variant
Add support for the TI TCA9535 variant.

The NXP PCA9535 is already supported by the driver.

TCA9535 supports lower voltage operation (down to 1.65V VCC)
compared to PCA (down to 2.3V VCC).

>From a software perspective, these models are equivalent as they
have the same register map.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20240531121801.2161154-1-festevam@gmail.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-06-03 10:24:09 +02:00
Jouni Högander
b330568f0c drm/i915/psr: Add Early Transport into psr debugfs interface
We want to have sink Early Transport capability and usage in our psr
debugfs status interface.

v4: use su_region_et_enabled instead of psr2_su_region_et_valid
v3: remove extra space from "PSR mode:  disabled"
v2: printout "Selective Update enabled (Early Transport)" instead of
    "Selective Update Early Transport enabled"

Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-7-jouni.hogander@intel.com
2024-06-03 11:23:18 +03:00
Jouni Högander
04d0aed082 drm/i915/psr: Allow setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE via debugfs
Currently setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE (0x20) via psr_debug
debugfs interface is not allowed. This patch allows it.

v3:
  - ensure psr is disabled/enabled if enable_psr2_su_region_et changes
  - remove extra space
v2: ensure that fastset is performed when the bit changes

Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-6-jouni.hogander@intel.com
2024-06-03 11:23:09 +03:00
Jouni Högander
16b65af8b7 drm/i915/display: Selective fetch Y position on Region Early Transport
Selective fetch Y position differs when Region Early Transport is
used. Use formula from Bspec for this.

Bspec: 68927

Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-5-jouni.hogander@intel.com
2024-06-03 11:22:58 +03:00
Jouni Högander
0a8c581ce0 drm/i915/psr: Use enable boolean from intel_crtc_state for Early Transport
When enabling Early Transport use
intel_crtc_state->enable_psr2_su_region_et instead of
psr2_su_region_et_valid.

Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Fixes: 467e4e061c ("drm/i915/psr: Enable psr2 early transport as possible")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-4-jouni.hogander@intel.com
2024-06-03 11:22:49 +03:00
Jouni Högander
13d1359d67 drm/i915/psr: Get Early Transport status in intel_psr_pipe_get_config
We are currently not getting Early Transport status information in
intel_psr_pipe_get_config. Fix this.

Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Fixes: 467e4e061c ("drm/i915/psr: Enable psr2 early transport as possible")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-3-jouni.hogander@intel.com
2024-06-03 11:22:38 +03:00
Peter Robinson
e7ba9d11e9 gpio: brcmstb: Allow building driver for ARCH_BCM2835
The GPIO_BRCMSTB hardware IP is also included in the bcm2712
SoC so enable the driver to also be built for ARCH_BCM2835.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240530181737.1261450-1-pbrobinson@gmail.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-06-03 10:22:33 +02:00
Jouni Högander
0e3771f459 drm/i915/psr: Add Early Transport status boolean into intel_psr
Currently we are purely relying on psr2_su_region_et_valid. Add new boolean
value into intel_psr struct indicating whether Early Transport is enabled
or not and use it instead of psr2_su_region_et_valid for getting Early
Transport status information.

Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240529093849.1016172-2-jouni.hogander@intel.com
2024-06-03 11:22:04 +03:00
Sven Eckelmann
537a350d14 batman-adv: Don't accept TT entries for out-of-spec VIDs
The internal handling of VLAN IDs in batman-adv is only specified for
following encodings:

* VLAN is used
  - bit 15 is 1
  - bit 11 - bit 0 is the VLAN ID (0-4095)
  - remaining bits are 0
* No VLAN is used
  - bit 15 is 0
  - remaining bits are 0

batman-adv was only preparing new translation table entries (based on its
soft interface information) using this encoding format. But the receive
path was never checking if entries in the roam or TT TVLVs were also
following this encoding.

It was therefore possible to create more than the expected maximum of 4096
+ 1 entries in the originator VLAN list. Simply by setting the "remaining
bits" to "random" values in corresponding TVLV.

Cc: stable@vger.kernel.org
Fixes: 7ea7b4a142 ("batman-adv: make the TT CRC logic VLAN specific")
Reported-by: Linus Lüssing <linus.luessing@c0d3.blue>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Simon Wunderlich <sw@simonwunderlich.de>
2024-06-03 10:20:43 +02:00
Lad Prabhakar
f6e32aa969 arm64: dts: renesas: r9a08g045: Update fallback string for SDHI nodes
Use 'renesas,rzg2l-sdhi' as a fallback string for SDHI nodes, where
hs400_disabled and fixed_addr_mode quirks are applied.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240422213006.505576-7-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-06-03 09:50:05 +02:00
Lad Prabhakar
046084b5e1 arm64: dts: renesas: rzg2l: Update fallback string for SDHI nodes
Use 'renesas,rzg2l-sdhi' as a fallback string for SDHI nodes, where
hs400_disabled and fixed_addr_mode quirks are applied.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240422213006.505576-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-06-03 09:49:57 +02:00
Lad Prabhakar
a509981a2e arm64: dts: renesas: r9a09g011: Update fallback string for SDHI nodes
Use 'renesas,rzg2l-sdhi' as a fallback string for SDHI nodes, where
hs400_disabled and fixed_addr_mode quirks are applied.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240422213006.505576-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-06-03 09:48:12 +02:00
Niklas Söderlund
7c8730df59 clk: renesas: r8a779h0: Add CSI-2 clocks
Add the CSI40 and CSI41 module clocks, which are used by the CSI-2
interfaces on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240527131541.1676525-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-06-03 09:46:18 +02:00
Niklas Söderlund
babc0ea4e6 clk: renesas: r8a779h0: Add ISPCS clocks
Add the ISPCS0 and ISPCS1 module clocks, which are used by the ISPCS
modules on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240527131541.1676525-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-06-03 09:45:54 +02:00
Huacai Chen
eb36e520f4 LoongArch: Fix GMAC's phy-mode definitions in dts
The GMAC of Loongson chips cannot insert the correct 1.5-2ns delay. So
we need the PHY to insert internal delays for both transmit and receive
data lines from/to the PHY device. Fix this by changing the "phy-mode"
from "rgmii" to "rgmii-id" in dts.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2024-06-03 15:45:53 +08:00
Jiaxun Yang
1098efd299 LoongArch: Override higher address bits in JUMP_VIRT_ADDR
In JUMP_VIRT_ADDR we are performing an or calculation on address value
directly from pcaddi.

This will only work if we are currently running from direct 1:1 mapping
addresses or firmware's DMW is configured exactly same as kernel. Still,
we should not rely on such assumption.

Fix by overriding higher bits in address comes from pcaddi, so we can
get rid of or operator.

Cc: stable@vger.kernel.org
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2024-06-03 15:45:53 +08:00
Jiaxun Yang
beb2800074 LoongArch: Fix entry point in kernel image header
Currently kernel entry in head.S is in DMW address range, firmware is
instructed to jump to this address after loading the kernel image.

However kernel should not make any assumption on firmware's DMW
setting, thus the entry point should be a physical address falls into
direct translation region.

Fix by converting entry address to physical and amend entry calculation
logic in libstub accordingly.

BTW, use ABSOLUTE() to calculate variables to make Clang/LLVM happy.

Cc: stable@vger.kernel.org
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2024-06-03 15:45:53 +08:00
Jiaxun Yang
3de9c42d02 LoongArch: Add all CPUs enabled by fdt to NUMA node 0
NUMA enabled kernel on FDT based machine fails to boot because CPUs
are all in NUMA_NO_NODE and mm subsystem won't accept that.

Fix by adding them to default NUMA node at FDT parsing phase and move
numa_add_cpu(0) to a later point.

Cc: stable@vger.kernel.org
Fixes: 88d4d957ed ("LoongArch: Add FDT booting support from efi system table")
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2024-06-03 15:45:53 +08:00
Jiaxun Yang
b56f67a6c7 LoongArch: Fix built-in DTB detection
fdt_check_header(__dtb_start) will always success because kernel
provides a dummy dtb, and by coincidence __dtb_start clashed with
entry of this dummy dtb. The consequence is fdt passed from firmware
will never be taken.

Fix by trying to utilise __dtb_start only when CONFIG_BUILTIN_DTB is
enabled.

Cc: stable@vger.kernel.org
Fixes: 7b937cc243 ("of: Create of_root if no dtb provided by firmware")
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2024-06-03 15:45:53 +08:00
Tiezhu Yang
6c3ca6654a LoongArch: Remove CONFIG_ACPI_TABLE_UPGRADE in platform_init()
Both acpi_table_upgrade() and acpi_boot_table_init() are defined as
empty functions under !CONFIG_ACPI_TABLE_UPGRADE and !CONFIG_ACPI in
include/linux/acpi.h, there are no implicit declaration errors with
various configs.

  #ifdef CONFIG_ACPI_TABLE_UPGRADE
  void acpi_table_upgrade(void);
  #else
  static inline void acpi_table_upgrade(void) { }
  #endif

  #ifdef	CONFIG_ACPI
  ...
  void acpi_boot_table_init (void);
  ...
  #else	/* !CONFIG_ACPI */
  ...
  static inline void acpi_boot_table_init(void)
  {
  }
  ...
  #endif	/* !CONFIG_ACPI */

As Huacai suggested, CONFIG_ACPI_TABLE_UPGRADE is ugly and not necessary
here, just remove it. At the same time, just keep CONFIG_ACPI to prevent
potential build errors in future, and give a signal to indicate the code
is ACPI-specific. For the same reason, we also put acpi_table_upgrade()
under CONFIG_ACPI.

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2024-06-03 15:45:53 +08:00
Geert Uytterhoeven
4b45a978b2 arm64: defconfig: Enable Marvell 88Q2XXX PHY support
Enable support for Marvell 88Q2XXX 100/1000BASE-T1 Automotive Ethernet
PHYs, as found on the Spider, S4 Starter Kit, and White-Hawk development
boards.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/c5dcf03facd05e8b9c5ac89b2b81b005b141f086.1716998320.git.geert+renesas@glider.be
2024-06-03 09:35:27 +02:00
Wolfram Sang
c4aff1d1ec Removed the SPD class of i2c devices from the device core.
Additionally, a cleanup in the Synquacer code removes the pclk
 from the global structure, as it is used only in the probe.
 Therefore, it is now declared locally.
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Merge tag 'i2c-host-6.10-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-current

Removed the SPD class of i2c devices from the device core.

Additionally, a cleanup in the Synquacer code removes the pclk
from the global structure, as it is used only in the probe.
Therefore, it is now declared locally.
2024-06-03 08:51:53 +02:00
Tony Luck
d30f57b741
platform/x86: intel_scu_wdt: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20240531203706.233365-10-tony.luck@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-06-03 09:49:13 +03:00
Tony Luck
a42f41466f
platform/x86: intel_speed_select_if: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20240531203706.233365-9-tony.luck@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-06-03 09:49:12 +03:00
Tony Luck
568e639a61
platform/x86: intel-uncore-freq: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20240531203706.233365-8-tony.luck@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-06-03 09:49:09 +03:00
Tony Luck
12929ac3ef
platform/x86: intel_ips: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20240531203706.233365-7-tony.luck@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-06-03 09:49:07 +03:00
Tony Luck
70a4fa3f4f
platform/x86: intel_turbo_max_3: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20240531203706.233365-6-tony.luck@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-06-03 09:49:05 +03:00
Tony Luck
fad21268dc
platform/x86: p2sb: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20240531203706.233365-5-tony.luck@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-06-03 09:49:02 +03:00
Tony Luck
5b3eaf10e2
x86/platform/atom: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20240531203706.233365-4-tony.luck@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-06-03 09:49:00 +03:00
Tony Luck
0ff9c76fda
platform/x86: intel_telemetry: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20240531203706.233365-3-tony.luck@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-06-03 09:48:58 +03:00
Tony Luck
33af65ad67
platform/x86/intel/pmc: Switch to new Intel CPU model defines
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20240531203706.233365-2-tony.luck@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2024-06-03 09:48:55 +03:00
Jeff Johnson
64e018d7a8 cpufreq: dt-platdev: add missing MODULE_DESCRIPTION() macro
make allmodconfig && make W=1 C=1 reports:
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/cpufreq/cpufreq-dt-platdev.o

Add the missing invocation of the MODULE_DESCRIPTION() macro.

Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2024-06-03 10:13:00 +05:30
Erick Archer
2960d4c8e7 Input: tablet - use sizeof(*pointer) instead of sizeof(type)
It is preferred to use sizeof(*pointer) instead of sizeof(type)
due to the type of the variable can change and one needs not
change the former (unlike the latter). This patch has no effect
on runtime behavior.

Signed-off-by: Erick Archer <erick.archer@outlook.com>
Link: https://lore.kernel.org/r/AS8PR02MB7237B05083487507CFAF96B08BFE2@AS8PR02MB7237.eurprd02.prod.outlook.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2024-06-02 21:32:03 -07:00
Erick Archer
dc2f1423f0 Input: mouse - use sizeof(*pointer) instead of sizeof(type)
It is preferred to use sizeof(*pointer) instead of sizeof(type)
due to the type of the variable can change and one needs not
change the former (unlike the latter). This patch has no effect
on runtime behavior.

Signed-off-by: Erick Archer <erick.archer@outlook.com>
Link: https://lore.kernel.org/r/AS8PR02MB7237FB736DBF67A58798FDF38BFE2@AS8PR02MB7237.eurprd02.prod.outlook.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2024-06-02 21:32:02 -07:00
Erick Archer
a0bd7adadb Input: misc - use sizeof(*pointer) instead of sizeof(type)
It is preferred to use sizeof(*pointer) instead of sizeof(type)
due to the type of the variable can change and one needs not
change the former (unlike the latter). This patch has no effect
on runtime behavior.

Signed-off-by: Erick Archer <erick.archer@outlook.com>
Link: https://lore.kernel.org/r/AS8PR02MB7237884EB989EFF55D1BEF8B8BFE2@AS8PR02MB7237.eurprd02.prod.outlook.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2024-06-02 21:32:01 -07:00
Erick Archer
bb8706a419 Input: keyboard - use sizeof(*pointer) instead of sizeof(type)
It is preferred to use sizeof(*pointer) instead of sizeof(type)
due to the type of the variable can change and one needs not
change the former (unlike the latter). This patch has no effect
on runtime behavior.

Signed-off-by: Erick Archer <erick.archer@outlook.com>
Link: https://lore.kernel.org/r/AS8PR02MB7237277464F23CA168BFB3B18BF52@AS8PR02MB7237.eurprd02.prod.outlook.com
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2024-06-02 21:32:01 -07:00
Thomas Weißschuh
bc3e452580 hwmon: add ChromeOS EC driver
The ChromeOS Embedded Controller exposes fan speed and temperature
readings.
Expose this data through the hwmon subsystem.

The driver is designed to be probed via the cros_ec mfd device.

Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20240529-cros_ec-hwmon-v4-2-5cdf0c5db50a@weissschuh.net
[tzungbi: Fixed typo in MAINTAINERS: "chros_ec_hwmon" -> "cros_ec_hwmon"]
Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2024-06-03 04:13:43 +00:00
Liu Ying
41f93a496a arm64: dts: imx8mp-evk: Add MX8-DLVDS-LCD1 display module support
MX8-DLVDS-LCD1 display module integrates a KOE TX26D202VM0BWA LCD panel
and a touch IC.  Add an overlay to support the LCD panel on i.MX8MP EVK.
Specify 148.5MHz clock frequency in panel-timing node to accommodate
3.5-fold 519.75MHz media_ldb clock which is derived from 1.0395GHz
video_pll1 clock.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-06-03 11:03:03 +08:00
Joao Paulo Goncalves
08f0fa5d6a arm64: dts: freescale: imx8mm-verdin: Fix GPU speed
The GPU clock was reduced on iMX8MM SOC device tree to prevent boards
that don't support GPU overdrive from being out of specification. However,
this caused a regression in GPU speed for the Verdin iMX8MM, which does
support GPU overdrive. This patch fixes this by enabling overdrive mode
in the SOM dtsi.

Fixes: 1f794d3eed ("arm64: dts: imx8mm: Reduce GPU to nominal speed")
Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-06-03 11:00:58 +08:00
Christian Gmeiner
9f3d2c79d3 arm64: dts: imx8qm: Add GPU nodes
Add the DT node for the GPU core found on the i.MX8QM.

etnaviv-gpu 53100000.gpu: model: GC7000, revision: 6009
[drm] Initialized etnaviv 1.4.0 20151214 for etnaviv on minor 0

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-06-03 10:39:32 +08:00
Gautam Menghani
214f33fcf6 powerpc/pseries: Remove unused cede related functions
Remove extended_cede_processor() and its helpers as
extended_cede_processor() has no callers since
commit 48f6e7f6d948("powerpc/pseries: remove cede offline state for CPUs")

Signed-off-by: Gautam Menghani <gautam@linux.ibm.com>
Acked-by: Naveen N Rao <naveen@kernel.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20240514132457.292865-1-gautam@linux.ibm.com
2024-06-03 12:39:12 +10:00