For best performance changing the synchroniser state whilst the FLL is
running should be avoided. As this has been done fairly regularly in
practice rather than hard preventing this, simply improve the FLL enable
sequence and give a warning if the user changes the synchroniser state.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
A clutch of fixes for v4.8. These are mainly driver specific, the most
notable ones being those for OMAP which fix a series of issues that
broke boot on some platforms there when deferred probe kicked in.
There's also one core fix for an issue when unbinding a card which for
some reason had managed to not manifest until recently.
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Merge tag 'asoc-fix-v4.8-rc4' into asoc-arizona
ASoC: Fixes for v4.8
A clutch of fixes for v4.8. These are mainly driver specific, the most
notable ones being those for OMAP which fix a series of issues that
broke boot on some platforms there when deferred probe kicked in.
There's also one core fix for an issue when unbinding a card which for
some reason had managed to not manifest until recently.
In preparation for future improvements allow a base to be passed to
arizona_is_enabled_fll, this will allow it to be used to check the state
of the synchroniser path as well.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
imx35 and compatible chipsets support loopback mode by setting a
loopback control bit in the test register. Make this setting available
for data transfers, similar to what we do for imx51.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Mark Brown <broonie@kernel.org>
Modify spi_imx_clkdiv_2() to return the resulting bus clock frequency
when the selected clock divider is applied. Set spi_imx->spi_bus_clk to
this frequency.
If spi_bus_clk is unset, spi_imx_calculate_timeout() causes a
division by 0.
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Mark Brown <broonie@kernel.org>
This change implements BSPI driver for Broadcom BRCMSTB, NS2,
NSP SoCs works in combination with the MSPI controller driver
and implements flash read acceleration and implements the
spi_flash_read() method. Both MSPI and BSPI controllers are
needed to access spi-nor flash.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Adding the settop SoC platfrom driver, this driver is compatible
with the settop MSPI+BSPI and MSPI only blocks implemented on the
SoCs. Driver calls the spi-bcm-qspi probe(), remove() and pm_ops.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Master SPI driver for Broadcom settop, iProc SoCs. The driver
is used for devices that use SPI protocol on BRCMSTB, NSP, NS2
SoCs. SoC platform driver call exported porbe(), remove()
and suspend/resume pm_ops implemented in this common driver.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Yendapally Reddy Dhananjaya Reddy
Signed-off-by: Mark Brown <broonie@kernel.org>
Added device tree bindings documentation for BRCMSTB, NSP, NS2 iProc
SoCs supported by spi-bcm-qspi, spi-brcmstb-qspi and spi-iproc-qspi driver.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Similar to pcie8997 chipset, first firmware submitted for usb8997
chipset will be usbusb8997_combo_v4.bin. This patch corrects the
name used in driver.
Signed-off-by: Ganapathi Bhat <gbhat@marvell.com>
Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Firmware image for newer USB chipsets starts with a command 7 block
(special command). It doesn't contain data length field. This patch adds
necessary handling.
Signed-off-by: Ganapathi Bhat <gbhat@marvell.com>
Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
For structure types defined in the same file or local header files, find
top-level static structure declarations that have the following
properties:
1. Never reassigned.
2. Address never taken
3. Not passed to a top-level macro call
4. No pointer or array-typed field passed to a function or stored in a
variable.
Declare structures having all of these properties as const.
Done using Coccinelle.
Based on a suggestion by Joe Perches <joe@perches.com>.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
For structure types defined in the same file or local header files, find
top-level static structure declarations that have the following
properties:
1. Never reassigned.
2. Address never taken
3. Not passed to a top-level macro call
4. No pointer or array-typed field passed to a function or stored in a
variable.
Declare structures having all of these properties as const.
Done using Coccinelle.
Based on a suggestion by Joe Perches <joe@perches.com>.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Stanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
For structure types defined in the same file or local header files, find
top-level static structure declarations that have the following
properties:
1. Never reassigned.
2. Address never taken
3. Not passed to a top-level macro call
4. No pointer or array-typed field passed to a function or stored in a
variable.
Declare structures having all of these properties as const.
Done using Coccinelle.
Based on a suggestion by Joe Perches <joe@perches.com>.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Trivial fix to spelling mistakes in dev_dbg message.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
If the USB dongle is still attached, reset it on module unload to
avoid scans failing when reloading the driver.
Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Currently Rx STBC in assoc request frame is advertised as 3. It should
be 2, as our chipsets support two spatial streams.
Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
When this failure occurs, we will clear card->plt_wake_cfg so that
device would initialize without wake up on external interrupt feature.
This feature specific code in suspend and resume handlers will be
skipped.
Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
According to the datasheets of Realtek ALC5658 (Rev. 0.9)
and ALC5659 (Rev. 0.13), the "IRQ Control 4" register is
located at MX-00BAh while the "IRQ control 5" register is
at MX-00BBh.
There is no "IRQ Control 6" register in the datasheets but
it is supposed to be behind the "IRQ Control 5" register.
So this patch corrects these addresses.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
We also support 32bit playback, so add that in DAI capabilities.
Signed-off-by: Samaga Krishna <samaga.krishna@intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
When the v2 hw is attached with many disks through an expander, there
may be OOB reset resulting in a PHY going down after the speed is
negotiated (very low probability).
This issue is resolved by modifying the link control registers to send
three identify frames before the PHY is ready (according to 6.10.3.3.2
in SAS 3.0 spec) and close ready when the PHY is down.
Signed-off-by: NengLong Zhao <zhaonenglong@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
In setup_itct_v2_hw(), SATA device type SAS_SATA_PENDING is missing, so
add it.
Note: The HiSi SAS controller does not support SATA PM, so do not handle
SAS_SATA_PM_PORT or SAS_SATA_PM.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Function config_id_frame_v1_hw() is called twice for each PHY during
initialisation, which is unneeded.
So remove init_id_frame_v1_hw(), which only calls
config_id_frame_v1_hw().
We will keep the call to config_id_frame_v1_hw() in start_phy_v1_hw()
since it will be used for PHY reset functions.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Function config_id_frame_v2_hw() is called twice for each PHY during
initialisation, which is unneeded.
So remove init_id_frame_v2_hw(), which only calls
config_id_frame_v2_hw().
We will keep the call to config_id_frame_v2_hw() in start_phy_v2_hw()
since it will be used for PHY reset functions.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
The endianness for the SAS address in the TX_ID_DWORD registers is set
incorrectly. We see errors like this in the boot log for v2 hw (which
would have the same issue as v1 hw):
[ 7.583284] sas: target proto 0x0 at 50000d1108e7923f:0x1f not handled
This is due to the host SAS addr not matching the PHY SAS addr in the
expander host-attached phy discovery responses.
To fix, we byte swap the SAS addr from BE to LE (which is the endianness
of the SAS controller).
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
The endianness for the SAS address in the TX_ID_DWORD registers is set
incorrectly. We see errors like this in the boot log:
[ 7.583284] sas: target proto 0x0 at 50000d1108e7923f:0x1f not handled
This is due to the host SAS addr not matching the PHY SAS addr in the
expander host-attached phy discovery responses.
To fix, we byte swap the SAS addr from BE to LE (which is the endianness
of the SAS controller).
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
The device DMA mask was being set after the bulk of the DMA allocations
in the driver init, so potentially DMA allocates fail. To resolve,
relocate before allocating the DMA memory when initialising the driver.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
If hisi_sas_task_prep() fails for a SATA device due to PHY down, we
return a failure to libata and also call task_done(), which will cause
ata_qc_complete() to be called twice: - first call from
hisi_sas_task_prep(), which will clear flag ATA_QCFLAG_ACTIVE -
ata_qc_complete() called from libata The warning call trace is as
follows:
[ 117.070206] [<ffff0000084f59b0>] __ata_qc_complete+0xf4/0x11c
[ 117.070208] [<ffff0000084f5b58>] ata_qc_complete+0x180/0x200
[ 117.070210] [<ffff0000084f5dd0>] ata_qc_issue+0x110/0x354
[ 117.070212] [<ffff0000084f6254>] ata_exec_internal_sg+0x240/0x4d0
[ 117.070214] [<ffff0000084f6544>] ata_exec_internal+0x60/0xa0
[ 117.070217] [<ffff000008501580>] ata_read_log_page+0x188/0x1b4
[ 117.070218] [<ffff0000085017dc>] ata_eh_analyze_ncq_error+0xa8/0x274
[ 117.070220] [<ffff000008501a3c>] ata_eh_link_autopsy+0x94/0x8c8
[ 117.070222] [<ffff0000085022a4>] ata_eh_autopsy+0x34/0xe8
[ 117.070223] [<ffff00000850540c>] ata_do_eh+0x28/0xc0
[ 117.070225] [<ffff0000085054e0>] ata_std_error_handler+0x3c/0x84
[ 117.070227] [<ffff000008505140>] ata_scsi_port_error_handler+0x480/0x674
[ 117.070230] [<ffff0000084e3020>] async_sas_ata_eh+0x44/0x78
[ 117.070231] [<ffff0000080d6b8c>] async_run_entry_fn+0x40/0x104
[ 117.070234] [<ffff0000080ce518>] process_one_work+0x128/0x2f0
[ 117.070235] [<ffff0000080ce738>] worker_thread+0x58/0x434
[ 117.070237] [<ffff0000080d416c>] kthread+0xd4/0xe8
[ 117.070240] [<ffff000008084e10>] ret_from_fork+0x10/0x40
The issue is resolved by simply returning a failure status code to the
upper layer.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
In function phy_up_v2_hw(), we needlessly recalculate the phy linkrate
for all phys, and the calculation is incorrect for phy8, so remove this
code.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
The Delivery queue enable register should only be written to once at
reset for v2 hw.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
The memory calculation for the tags bitmap should use BITS_PER_BYTE
macro instead of coincidental same value of sizeof(unsigned long).
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Currently the slot memory is zeroed when it is freed and also when it is
reused, like in hisi_sas_task_prep(). Optimise by avoiding the redundant
zeroing in the free.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
None of the CHL_INT2 interrupts are serviced in the channel irq ISR, so
leave the interrupt source masked. The interrupt mask is initially set
in init_reg_v2_hw().
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Optimise by saving an avoidable read in the get_free_slot function. The
delivery queue write pointer will only be updated by software, so don't
bother re-reading what was already written in the previous call to
start_delivery function.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Optimise by saving an avoidable read in the cq interrupt. The queue
read pointer will only be updated by software, so don't bother
re-reading what was already written in the previous interrupt.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Commit 888baf069f ("scsi: cxlflash: Add kref to context") introduced a
kref to the context. In particular, the detach routine was updated to
use the kref services for managing the removal and destruction of a
context.
As part of this change, the tracking mechanism internal to the detach
handler was refactored. This introduced a bug that can cause the
tracking state to be lost. This can lead to a situation where exclusive
access to a context is prematurely [and unknowingly] relinquished for
the executing thread.
To remedy, only update the tracking state when the kref operation
indicates the context was removed.
Fixes: 888baf069f ("scsi: cxlflash: Add kref to context")
Signed-off-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com>
Acked-by: Uma Krishnan <ukrishn@linux.vnet.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Commit 964497b3bf ("cxlflash: Remove dual port online dependency")
logically removed the ability for the WWPN setup routine afu_set_wwpn()
to return a non-success value. This routine can safely be made a void to
simplify the code as there is no longer a need to report a failure.
Signed-off-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com>
Acked-by: Uma Krishnan <ukrishn@linux.vnet.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
When an EEH occurs during device initialization, the port timeout logic
can cause excessive delays as MMIO reads will fail. Depending on where
they are experienced, these delays can lead to a prolonged reset,
causing an unnecessary triggering of other timeout logic in the SCSI
stack or user applications.
To expedite recovery, the port timeout logic is updated to decay the
timeout at a much faster rate when in the presence of a likely EEH
frozen event.
Signed-off-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com>
Acked-by: Uma Krishnan <ukrishn@linux.vnet.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
The EEH reset handler is ignorant to the current state of the driver
when processing a frozen event and initiating a device reset. This can
be an issue if an EEH event occurs while a user or stack initiated reset
is executing. More specifically, if an EEH occurs while the SCSI host
reset handler is active, the reset initiated by the EEH thread will
likely collide with the host reset thread. This can leave the device in
an inconsistent state, or worse, cause a system crash.
As a remedy, the EEH handler is updated to evaluate the device state and
take appropriate action (proceed, wait, or disconnect host). The host
reset handler is also updated to handle situations where an EEH occurred
during a host reset. In such situations, the host reset handler will
delay reporting back a success to give the EEH reset an opportunity to
complete.
Signed-off-by: Matthew R. Ochs <mrochs@linux.vnet.ibm.com>
Acked-by: Uma Krishnan <ukrishn@linux.vnet.ibm.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Pull uaccess fixes from Al Viro:
"Fixes for broken uaccess primitives - mostly lack of proper zeroing
in copy_from_user()/get_user()/__get_user(), but for several
architectures there's more (broken clear_user() on frv and
strncpy_from_user() on hexagon)"
* 'uaccess-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (28 commits)
avr32: fix copy_from_user()
microblaze: fix __get_user()
microblaze: fix copy_from_user()
m32r: fix __get_user()
blackfin: fix copy_from_user()
sparc32: fix copy_from_user()
sh: fix copy_from_user()
sh64: failing __get_user() should zero
score: fix copy_from_user() and friends
score: fix __get_user/get_user
s390: get_user() should zero on failure
ppc32: fix copy_from_user()
parisc: fix copy_from_user()
openrisc: fix copy_from_user()
nios2: fix __get_user()
nios2: copy_from_user() should zero the tail of destination
mn10300: copy_from_user() should zero on access_ok() failure...
mn10300: failing __get_user() and get_user() should zero
mips: copy_from_user() must zero the destination on access_ok() failure
ARC: uaccess: get_user to zero out dest in cause of fault
...
ath.git patches for 4.9. Major changes:
ath10k
* add nl80211 testmode support for 10.4 firmware
* hide kernel addresses from logs using %pK format specifier
* implement NAPI support
* enable peer stats by default
ath9k
* use ieee80211_tx_status_noskb where possible
wil6210
* extract firmware capabilities from the firmware file
ath6kl
* enable firmware crash dumps on the AR6004
ath-current is also merged to fix a conflict in ath10k.
- Add and fix a bunch of clocks in the DTS corresponding
to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
device tree using the new CLCD support merged into the
fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.
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Merge tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/late
Pull "This is a bunch of Integrator changes for v4.9" Linus Walleij:
- Add and fix a bunch of clocks in the DTS corresponding
to the new clock support merged into the clk tree.
- Move the CLCD display configuration from boardfile to
device tree using the new CLCD support merged into the
fbdev tree.
- Cut some auxdata.
- Cut some static remappings.
- Move the sched_clock() counter to use syscon+regmap.
* tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: read counter using syscon/regmap
ARM: integrator: cut down on static maps
ARM: integrator: delete some auxdata
ARM: integrator: move CP CLCD display to DTS
ARM: dts: add the core module clocks to Integrator/CP
ARM: dts: Add the core module clocks to Integrator/AP
ARM: dts: add the Integrator/AP baseboard clocks
ARM: dts: set the 24MHz xtal as parent of the UART clock
If be_hw_param_fixup is defined for BE then it will
force the BE to a specific configuration supported
by HW. In this case don't apply symmetry.
Signed-off-by: Jeeja KP <jeeja.kp@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The workqueue "dac33_wq" queues a single work item &dac33->work and
hence doesn't require ordering. Also, it is not being used on a memory
reclaim path. Hence, it has been converted to use system_wq.
System workqueues have been able to handle high level of concurrency
for a long time now and hence it's not required to have a singlethreaded
workqueue just to gain concurrency. Unlike a dedicated per-cpu workqueue
created with create_singlethread_workqueue(), system_wq allows multiple
work items to overlap executions even on the same CPU; however, a
per-cpu workqueue doesn't have any CPU locality or global ordering
guarantee unless the target CPU is explicitly specified and thus the
increase of local concurrency shouldn't make any difference.
The work item has been flushed in dac33_soc_remove to ensure that
there are no pending tasks while disconnecting the driver.
Signed-off-by: Bhaktipriya Shridhar <bhaktipriya96@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Currently the driver code assumes that MCLK will be present during
the procedure, or if it has control of MCLK then it can make sure
it's enabled. Some platforms however do not provide MCLK to the
driver in this way, and will not leave MCLK enabled when Codec is
in STANDBY state.
This patch adds support for the HP detect procedure when running
from the device's internal oscillator, to ensure all platforms
can make use of this feature correctly.
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
