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691,473 commits

Author SHA1 Message Date
Arnaldo Carvalho de Melo
09dd39d2d2 perf tools: Do not provide dup sched_getcpu() prototype on Android
The Bionic libc has this definition, so don't duplicate it.

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Chris Phlipot <cphlipot0@gmail.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Wang Nan <wangnan0@huawei.com>
Link: http://lkml.kernel.org/n/tip-rmd19832zkt07e4crdzyen9z@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-14 12:02:04 -03:00
Hannes Reinecke
5b51ba6178 libata-eh: decode all taskfile protocols
Some taskfile protocol values where missing in ata_eh_link_report().

Signed-off-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-07-14 10:47:23 -04:00
Hannes Reinecke
bd18bc04ca ata: fixup ATA_PROT_NODATA
The taskfile protocol is a numeric value, and can not be ORed.  Currently
this is harmless as the protocol is always zeroed before, but if it ever
has a non-zero value the ORing would create incorrect results.

Signed-off-by: Hannes Reinecke <hare@suse.de>
[hch: updated patch description]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-07-14 10:47:20 -04:00
Hannes Reinecke
b38d4d85b8 libsas: use ata_is_ncq() and ata_has_dma() accessors
Use accessors instead of the raw protocol value.

Signed-off-by: Hannes Reinecke <hare@suse.com>
[hch: trivial cleanup of the ata_task assignments]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-07-14 10:45:02 -04:00
Hannes Reinecke
179b310ae7 libata: use ata_is_ncq() accessors
Use accessor functions instead of the raw value.

Signed-off-by: Hannes Reinecke <hare@suse.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-07-14 10:44:57 -04:00
Christoph Hellwig
b1c04e80c6 libata: return boolean values from ata_is_*
This way we don't have to worry about the exact bit postition of the
test to leak out and any crazy propagation effects in the callers.

Suggested-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Tejun Heo <tj@kernel.org>
2016-07-14 10:44:51 -04:00
Arnaldo Carvalho de Melo
ca575ad209 tools lib traceevent: Add correct header for ipv6 definitions
We need to include netinet/in.h to get the in6_addr struct definition, needed to
build it on the Android NDK:

  In file included from event-parse.c:36:0:
  /home/acme/android/android-ndk-r12/platforms/android-24/arch-arm/usr/include/netinet/ip6.h:82:18: error: field 'ip6_src' has incomplete type
    struct in6_addr ip6_src; /* source address */

And it is the canonical way of getting IPv6 definitions, as described,
for instance, in Linux's 'man ipv6'

Doing that uncovers another problem: this source file uses PRIu64 but
doesn't include it, depending on it being included by chance via the now
replaced header (netinet/ip6.h), fix it.

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Chris Phlipot <cphlipot0@gmail.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Wang Nan <wangnan0@huawei.com>
Link: http://lkml.kernel.org/n/tip-tilr31n3yaba1whsd47qlwa3@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-14 11:33:32 -03:00
Doug Anderson
9f6f93543d ARM: 8560/1: errata: Workaround errata A12 825619 / A17 852421
The workaround for both errata is to set bit 24 in the diagnostic
register.  There are no known end-user bugs solved by fixing this
errata, but the fix is trivial and it seems sane to apply it.

The arguments for why this needs to be in the kernel are similar to the
arugments made in the patch "Workaround errata A12 818325/852422 A17
852423".

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2016-07-14 15:32:31 +01:00
Doug Anderson
416bcf2159 ARM: 8559/1: errata: Workaround erratum A12 821420
This erratum has a very simple workaround (set a bit in a register), so
let's apply it.  Apparently the workaround's downside is a very slight
power impact.

Note that applying this errata fixes deadlocks that are easy to
reproduce with real world applications.

The arguments for why this needs to be in the kernel are similar to the
arugments made in the patch "Workaround errata A12 818325/852422 A17
852423".

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2016-07-14 15:32:30 +01:00
Doug Anderson
62c0f4a534 ARM: 8558/1: errata: Workaround errata A12 818325/852422 A17 852423
There are several similar errata on Cortex A12 and A17 that all have the same workaround: setting bit[12] of the Feature Register.
Technically the list of errata are:

- A12 818325: Execution of an UNPREDICTABLE STR or STM instruction
  might deadlock.  Fixed in r0p1.
- A12 852422: Execution of a sequence of instructions might lead to
  either a data corruption or a CPU deadlock.  Not fixed in any A12s
  yet.
- A17 852423: Execution of a sequence of instructions might lead to
  either a data corruption or a CPU deadlock.  Not fixed in any A17s
  yet.

Since A12 got renamed to A17 it seems likely that there won't be any
future Cortex-A12 cores, so we'll enable for all Cortex-A12.

For Cortex-A17 I believe that all known revisions are affected and that all knows revisions means <= r1p2.  Presumably if a new A17 was
released it would have this problem fixed.

Note that in <https://patchwork.kernel.org/patch/4735341/> folks
previously expressed opposition to this change because:
A) It was thought to only apply to r0p0 and there were no known r0p0
   boards supported in mainline.
B) It was argued that such a workaround beloned in firmware.

Now that this same fix solves other errata on real boards (like
rk3288) point A) is addressed.

Point B) is impossible to address on boards like rk3288.  On rk3288
the firmware doesn't stay resident in RAM and isn't involved at all in
the suspend/resume process nor in the SMP bringup process.  That means
that the most the firmware could do would be to set the bit on "core
0" and this bit would be lost at suspend/resume time.  It is true that
we could write a "generic" solution that saved the boot-time "core 0"
value of this register and applied it at SMP bringup / resume time.
However, since this register (described as the "Feature Register" in
errata) appears to be undocumented (as far as I can tell) and is only
modified for these errata, that "generic" solution seems questionably
cleaner.  The generic solution also won't fix existing users that
haven't happened to do a FW update.

Note that in ARM64 presumably PSCI will be universal and fixes like
this will end up in ATF.  Hopefully we are nearing the end of this
style of errata workaround.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Huang Tao <huangtao@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2016-07-14 15:32:30 +01:00
Chris Wilson
fb7404e815 drm/i915: Hide gen6_update_ring_freq()
This function is no longer used outside of intel_pm.c so we can stop
exposing it and rename the __gen6_update_ring_freq() to take its place.

Suggested-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-8-git-send-email-chris@chris-wilson.co.uk
2016-07-14 15:24:34 +01:00
Chris Wilson
b7137e0cf1 drm/i915: Defer enabling rc6 til after we submit the first batch/context
Some hardware requires a valid render context before it can initiate
rc6 power gating of the GPU; the default state of the GPU is not
sufficient and may lead to undefined behaviour. The first execution of
any batch will load the "golden render state", at which point it is safe
to enable rc6. As we do not forcibly load the kernel context at resume,
we have to hook into the batch submission to be sure that the render
state is setup before enabling rc6.

However, since we don't enable powersaving until that first batch, we
queued a delayed task in order to guarantee that the batch is indeed
submitted.

v2: Rearrange intel_disable_gt_powersave() to match.
v3: Apply user specified cur_freq (or idle_freq if not set).
v4: Give in, and supply a delayed work to autoenable rc6
v5: Mika suggested a couple of better names for delayed_resume_work
v6: Rebalance rpm_put around the autoenable task

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-7-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
2016-07-14 15:24:21 +01:00
Chris Wilson
62e1baa128 drm/i915: Remove superfluous powersave work flushing
Instead of flushing the outstanding enabling, remember the requested
frequency to apply when the powersave work runs.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-6-git-send-email-chris@chris-wilson.co.uk
2016-07-14 15:23:16 +01:00
Chris Wilson
29ecd78d3b drm/i915: Define a separate variable and control for RPS waitboost frequency
To allow the user finer control over waitboosting, allow them to set the
frequency we request for the boost. This also them allows to effectively
disable the boosting by setting the boost request to a low frequency.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-5-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
2016-07-14 15:22:58 +01:00
Chris Wilson
99ac961279 drm/i915: Move overclocking detection to alongside RPS frequency detection
Move the overclocking max frequency detection alongside the regular
frequency detection, before we expose the undefined value to userspace.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-4-git-send-email-chris@chris-wilson.co.uk
2016-07-14 15:22:24 +01:00
Chris Wilson
773ea9a801 drm/i915: Perform static RPS frequency setup before userspace
As these RPS frequency values are part of our userspace interface, they
must be established before that userspace interface is registered.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-3-git-send-email-chris@chris-wilson.co.uk
2016-07-14 15:22:11 +01:00
Chris Wilson
3a45b05c45 drm/i915: Preserve current RPS frequency across init
Select idle frequency during initialisation, then reset the last known
frequency when re-enabling. This allows us to preserve the user selected
frequency across resets.

v2: Stop CHV from overriding the user's choice in cherryview_enable_rps()

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-2-git-send-email-chris@chris-wilson.co.uk
2016-07-14 15:21:40 +01:00
Chris Wilson
b913b33c43 drm/i915: Flush GT idle status upon reset
Upon resetting the GPU, we force the engines to be idle by clearing
their request lists. However, I neglected to clear the GT active status
and so the next request following the reset was not marking the device
as busy again. (We had to wait until any outstanding retire worker
finally ran and cleared the active status.)

Fixes: 67d97da349 ("drm/i915: Only start retire worker when idle")
Testcase: igt/pm_rps/reset
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-1-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2016-07-14 15:21:17 +01:00
Thierry Reding
3499359418 arm64: tegra: Enable HDMI on Jetson TX1
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:27 +02:00
Thierry Reding
237d5cc779 arm64: tegra: Add sor1_src clock
The sor1 IP block needs the sor1_src clock to configure the clock tree
depending on whether it's running in HDMI or DP mode.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:26 +02:00
Jon Hunter
241f02ba98 arm64: tegra: Add XUSB powergates on Tegra210
The Tegra210 XUSB subsystem has 3 power partitions which are XUSBA
(super-speed logic), XUSBB (USB device logic) and XUSBC (USB host
logic). Populate the device-tree nodes for these XUSB partitions.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:26 +02:00
Jon Hunter
66b2d6e9c9 arm64: tegra: Add DPAUX pinctrl bindings
Add the DPAUX pinctrl states for the DPAUX nodes defining all three
possible states of "aux", "i2c" and "off". Also add the 'i2c-bus'
node for the DPAUX nodes so that the I2C driver core does not attempt
to parse the pinctrl state nodes.

Populate the nodes for the pinctrl clients of the DPAUX pin controller.
There are two clients for each DPAUX instance, namely the SOR and one of
the I2C adapters. The SOR clients may used the DPAUX pins in either AUX
or I2C modes and so for these devices we don't define any of the generic
pinctrl states (default, idle, etc) because the SOR driver will directly
set the state needed. For I2C clients only the I2C mode is used and so
we can simplify matters by using the generic pinctrl states for default
and idle.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:25 +02:00
Jon Hunter
0f13309022 arm64: tegra: Add ACONNECT bus node for Tegra210
Add the ACONNECT bus node for Tegra210 which is used to interface to
the various devices in the Audio Processing Engine (APE).

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:25 +02:00
Jon Hunter
c2b8244553 arm64: tegra: Add audio powergate node for Tegra210
Add the audio powergate for Tegra210.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:24 +02:00
Rhyland Klein
1b4c842022 arm64: tegra: Add regulators for Tegra210 Smaug
Add regulators to the Tegra210 Smaug DTS file including support for the
MAX77620 PMIC.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:24 +02:00
Jon Hunter
9168e1db75 arm64: tegra: Correct Tegra210 XUSB mailbox interrupt
The XUSB mailbox interrupt for Tegra210 is 40 and not 49 which is for
the XUSB pad controller. For some Tegra210 boards, this is causing USB
connect and disconnect events to go undetected. Fix this by changing the
interrupt number for the XUSB mailbox to 40.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:23 +02:00
Thierry Reding
d23e054c66 arm64: tegra: Enable XUSB controller on Jetson TX1
Enable the XUSB controller on Jetson TX1. One of the USB 3.0 lanes goes
to an internal ethernet interface, while a second USB 3.0 lane supports
the USB-A receptacle on the I/O board.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:22 +02:00
Thierry Reding
5593eb76b6 arm64: tegra: Enable debug serial on Jetson TX1
Add a chosen node to the device tree that contains a stdout-path
property which defines the debug serial port.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:22 +02:00
Thierry Reding
e7a99ac299 arm64: tegra: Add Tegra210 XUSB controller
Add a device tree node for the Tegra XUSB controller. It contains a
phandle to the XUSB pad controller for control of the PHYs assigned
to the USB ports.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:21 +02:00
Thierry Reding
4e07ac9076 arm64: tegra: Add Tegra210 XUSB pad controller
Add a device tree node for the XUSB pad controller found on Tegra210.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:21 +02:00
Thierry Reding
7596723ecd arm64: tegra: Add DSI panel on Jetson TX1
Some variants of the Jetson TX1 ship with a 8.0" WUXGA TFT LCD panel
connected via four DSI lanes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:20 +02:00
Thierry Reding
6d5aef5b95 arm64: tegra: p2597: Add SDMMC power supplies
Add power supplies for the SD/MMC card slot. Note that vmmc-supply is
currently restricted to 3.3 V because we don't support switching the
mode yet.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:20 +02:00
Thierry Reding
7793426943 arm64: tegra: Add PMIC support on Jetson TX1
Add a device tree node for the MAX77620 PMIC found on the p2180
processor module (Jetson TX1). Also add supporting power supplies,
such as the main 5 V system supply.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:19 +02:00
Ville Syrjälä
aeddda06c1 drm/i915: Ignore panel type from OpRegion on SKL
Dell XPS 13 9350 apparently doesn't like it when we use the panel type
from OpRegion. The OpRegion panel type (0) tells us to use use low
vswing for eDP, whereas the VBT panel type (2) tells us to use normal
vswing. The problem is that low vswing results in some display flickers.
Since no one seems to know how this stuff is supposed to be handled,
let's just ignore the OpRegion panel type on SKL for now.

v2: Print the panel type correctly in the debug output

Reported-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Cc: James Bottomley <James.Bottomley@HansenPartnership.com>
Cc: drm-intel-fixes@lists.freedesktop.org
References: https://lists.freedesktop.org/archives/intel-gfx/2016-June/098826.html
Fixes: a05628195a ("drm/i915: Get panel_type from OpRegion panel details")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468324837-29237-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Tested-by: James Bottomley <James.Bottomley@HansenPartnership.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
(cherry picked from commit bb10d4ec3b)
[danvet: Fix up cherry-pick conflict with an s/dev_priv/dev/.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-07-14 16:08:04 +02:00
Arnd Bergmann
ba7f468279 arm64: tegra: Default configuration updates for v4.8-rc1
Enable a bunch of configuration options to enable PMIC, regulators, DSI,
 HDMI, XUSB and the GPU on Jetson TX1 as well as a few new features that
 are now functional on the Google Pixel C.
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Merge tag 'tegra-for-4.8-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/arm64

Merge "arm64: tegra: Default configuration updates for v4.8-rc1" from Thierry Reding:

Enable a bunch of configuration options to enable PMIC, regulators, DSI,
HDMI, XUSB and the GPU on Jetson TX1 as well as a few new features that
are now functional on the Google Pixel C.

* tag 'tegra-for-4.8-arm64-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: Update default configuration
2016-07-14 15:54:14 +02:00
Ville Syrjälä
b224c4dc70 drm/i915: Unbreak interrupts on pre-gen6
Prior to gen6 we didn't have per-ring IMR registers, which means that
since commit 61ff75ac20 ("drm/i915: Simplify enabling
user-interrupts with L3-remapping") we're now masking off all interrupts
when init_render_ring() gets called. That's rather rude. Let's limit
the ring IMR frobbing to machines that actually have the per-ring IMR
registers.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Fixes: 61ff75ac20 ("drm/i915: Simplify enabling user-interrupts with L3-remapping")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468340687-3596-1-git-send-email-ville.syrjala@linux.intel.com
Reviewd-by: Chris Wilson <chris@chris-wilson.co.uk>
(cherry picked from commit 035ea405c9)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-07-14 15:48:49 +02:00
Chris Wilson
5b58592530 drm/i915/breadcrumbs: Queue hangcheck before sleeping
Never go to sleep waiting on the GPU without first ensuring that we will
get woken up.

We have a choice of queuing the hangcheck before every schedule() or the
first time we wakeup. In order to simply accommodate both the signaler
and the ordinary waiter, move the queuing to the common point of
enabling the irq. We lose the paranoid safety of ensuring that the
hangcheck is active before the sleep, but avoid code duplication (and
redundant hangcheck queuing).

Testcase: igt/prime_busy
Fixes: c81d46138d ("drm/i915: Convert trace-irq to the breadcrumb waiter")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468055535-19740-2-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
(cherry picked from commit 232af392fd)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-07-14 15:48:32 +02:00
Chris Wilson
b192400627 drm/i915: Update ifdeffery for mutex->owner
In commit 7608a43d8f ("locking/mutexes: Use MUTEX_SPIN_ON_OWNER when
appropriate") the owner field in the mutex was updated from being
dependent upon CONFIG_SMP to using optimistic spin. Update our peek
function to suite.

Fixes:7608a43d8f2e ("locking/mutexes: Use MUTEX_SPIN_ON_OWNER...")
Reported-by: Hong Liu <hong.liu@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1468244777-4888-1-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
(cherry picked from commit 4f074a5393)
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-07-14 15:47:32 +02:00
Arnd Bergmann
412ff97ab9 Samsung defconfig updates for ARM64 - enable drivers for
Exynos7 and Exynos5433 based boards:
 1. S2MPS clock driver,
 2. SoC: RTC, SPI, watchdog, EHCI, OHCI, DWC3, ADC and PWM,
 3. Enable Samsung SoC sound.
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Merge tag 'samsung-defconfig64-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/arm64

Merge "Samsung defconfig updates for ARM64" from Krzysztof Kozlowski:

- enable drivers for Exynos7 and Exynos5433 based boards:
1. S2MPS clock driver,
2. SoC: RTC, SPI, watchdog, EHCI, OHCI, DWC3, ADC and PWM,
3. Enable Samsung SoC sound.

* tag 'samsung-defconfig64-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: defconfig: Enable more IP blocks for Exynos7 and Exynos5433
  arm64: defconfig: Enable S2MPS11 clock and S3C RTC driver
2016-07-14 15:45:13 +02:00
Arnd Bergmann
ad22ac34c0 Samsung DeviceTree changes for ARM64 for v4.8:
1. Adjust the voltage of CPU buck regulator so scaling could work.
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Merge tag 'samsung-dt64-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64

Merge "Samsung DeviceTree changes for ARM64 for v4.8" from Krzysztof Kozlowski:

1. Adjust the voltage of CPU buck regulator so scaling could work.

* tag 'samsung-dt64-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Modify the voltage range for BUCK2 for exynos7
2016-07-14 15:44:02 +02:00
Arnd Bergmann
a185c8639f ARM: tegra: Device tree changes for v4.8-rc1
Some cleanups to existing device tree sources and add Toradex Apalis TK1
 support.
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Merge tag 'tegra-for-4.8-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

Merge "ARM: tegra: Device tree changes for v4.8-rc1" from Thierry Reding:

Some cleanups to existing device tree sources and add Toradex Apalis TK1
support.

* tag 'tegra-for-4.8-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Initial support for Apalis TK1
  ARM: tegra: Remove commas from unit addresses on Tegra124
  ARM: tegra: Import latest Jetson TK1 spreadsheet
  ARM: tegra: Add spaces around = in properties
  ARM: tegra: Fix a couple of DTC warnings
2016-07-14 15:39:27 +02:00
Arnd Bergmann
70814a9b32 ARM: tegra: Core SoC changes for v4.8-rc1
Some cleanups to eliminate sparse warnings and a section mismatch.
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Merge tag 'tegra-for-4.8-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup

Merge "ARM: tegra: Core SoC changes for v4.8-rc1" into next/cleanup:

Some cleanups to eliminate sparse warnings and a section mismatch.

* tag 'tegra-for-4.8-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Remove board_init_funcs array
  ARM: tegra: pm: Add tegra_cpu_do_idle() prototype
  ARM: tegra: irq: Add missing irq.h include
  ARM: tegra: cpuidle: Add missing cpuidle.h include
  ARM: tegra: hotplug: Include missing common.h
2016-07-14 15:37:41 +02:00
Arnd Bergmann
4756f881ba Samsung mach/soc update for v4.8, part 3:
Just cleanup - fix Sparse warning and constify passed iomem address.
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Merge tag 'samsung-soc-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc

Merge "Samsung mach/soc update for v4.8, part 3: from Krzysztof Kozlowski:

Just cleanup - fix Sparse warning and constify passed iomem address.

* tag 'samsung-soc-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: s3c64xx: smartq: Avoid sparse warnings
  ARM: SAMSUNG: Constify iomem address passed to s5p_init_cpu
2016-07-14 15:36:01 +02:00
Dan Carpenter
40c4f8d272 arm64: KVM: Clean up a condition
My static checker complains that this condition looks like it should be
== instead of =.  This isn't a fast path, so we don't need to be fancy.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-07-14 14:35:50 +01:00
Arnd Bergmann
f8c6d88b2c Samsung drivers/soc update for v4.8, part 3
1. Fix size of allocation for Exynos SROM registers (too much was allocated).
 2. Constify fix.
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Merge tag 'samsung-drivers-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers

Merge "Samsung drivers/soc update for v4.8, part 3" into next/drivers:

1. Fix size of allocation for Exynos SROM registers (too much was allocated).
2. Constify fix.

* tag 'samsung-drivers-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: pmu: Constify arrays with PMU data
  memory: samsung: exynos-srom: Fix wrong count of registers
2016-07-14 15:26:44 +02:00
Jarkko Nikula
55d38d060e i2c: core: Add function for finding the bus speed from ACPI
ACPI 5 specification doesn't have property for the I2C bus speed but
I2cSerialBus resource descriptors which define each controller-slave
connection define the maximum speed supported by that connection.

Thus finding the maximum safe speed for the bus is to walk all
I2cSerialBus resources that are associated to I2C controller and use
the speed of slowest connection.

Add function i2c_acpi_find_bus_speed() to the i2c-core that adapter
drivers can call prior registering itself to core.

This implies two-step walk through the I2cSerialBus resources: call to
i2c_acpi_find_bus_speed() does the first scan and finds the safe bus
speed that adapter drivers can set up. Adapter driver registration does
the second scan when i2c-core creates the I2C slaves by calling the
i2c_acpi_register_devices(). In that way the bus speed is set in case
slave device probe gets called during registration and does
communication.

Implement this by reusing the existing ACPI I2C walk routines in the
i2c-core. Extend them so that slowest connection speed is saved during
the walk and I2C slaves are registered only when calling through the
i2c_acpi_register_devices() with the i2c_adapter pointer.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-07-14 22:25:10 +09:00
Arnd Bergmann
f1844aca29 This is a set of cleanups for the Ux500 that reduce the number
of machine-local files and boardfile-type data for regulators
 and ASoC.
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Merge tag 'ux500-cleanup-bundle' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers

Merge "Ux500 cleanups from Arnd" from Linus Walleij:

This is a set of cleanups for the Ux500 that reduce the number
of machine-local files and boardfile-type data for regulators
and ASoC.

* tag 'ux500-cleanup-bundle' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: consolidate base platform files
  ARM: ux500: move soc_id driver to drivers/soc
  ARM: ux500: call ux500_setup_id later
  ARM: ux500: consolidate soc_device code in id.c
  ARM: ux500: remove cpu_is_u* helpers
  ARM: ux500: use CLK_OF_DECLARE()
  ARM: ux500: move l2x0 init to .init_irq
  mfd: db8500 stop passing around platform data
  ASoC: ab8500-codec: remove platform data based probe
  ARM: ux500: move ab8500_regulator_plat_data into driver
  ARM: ux500: remove unused regulator data
2016-07-14 15:23:19 +02:00
Jarkko Nikula
a7003b6580 i2c: core: Cleanup I2C ACPI namespace
I2C ACPI enumeration was originally implemented in another module under
drivers/acpi/ but was later moved into i2c-core with added support for
I2C ACPI operation region.

Rename these acpi_i2c_ prefixed functions, structures and defines in
i2c-core to i2c_acpi_ in order to have more consistent name space.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2016-07-14 22:22:05 +09:00
Daniel Vetter
0dcac5008f Revert "drm: Resurrect atomic rmfb code"
This reverts commit 11c21e73f8.

For reasons totally unclear this manages to wreak havoc with the audio
rpm refcount:

------------[ cut here ]------------
WARNING: CPU: 0 PID: 215 at drivers/gpu/drm/i915/intel_runtime_pm.c:1729 intel_display_power_put+0xe8/0x100 [i915]
Use count on domain AUDIO is already zero
Modules linked in: i915 ax88179_178a usbnet mii snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec x86_pkg_temp_thermal snd_hwdep intel_powerclamp snd_hda_core co
f_pclmul crc32_pclmul snd_pcm ghash_clmulni_intel mei_me mei e1000e ptp pps_core i2c_hid [last unloaded: i915]
CPU: 0 PID: 215 Comm: kworker/0:2 Not tainted 4.7.0-rc6+ #44
Hardware name: Intel Corporation Skylake Client platform/Skylake Halo DDR4 RVP11, BIOS SKLSE2R1.R00.X106.B00.1601180206 01/18/2016
Workqueue: events output_poll_execute
 0000000000000000 ffff88045573fa38 ffffffff813a2d6b ffff88045573fa88
 0000000000000000 ffff88045573fa78 ffffffff81075db6 000006c15a590000
 ffff88045a59a238 ffff88045a590054 ffff88045a590000 ffff88045a590000
Call Trace:
 [<ffffffff813a2d6b>] dump_stack+0x4d/0x72
 [<ffffffff81075db6>] __warn+0xc6/0xe0
 [<ffffffff81075e1a>] warn_slowpath_fmt+0x4a/0x50
 [<ffffffffa046399d>] ? hsw_audio_codec_disable+0xdd/0x110 [i915]
 [<ffffffffa041e638>] intel_display_power_put+0xe8/0x100 [i915]
 [<ffffffffa049d776>] intel_disable_ddi+0x46/0x80 [i915]
 [<ffffffffa0474eef>] haswell_crtc_disable+0x16f/0x290 [i915]
 [<ffffffffa047cb53>] intel_atomic_commit_tail+0x153/0x10e0 [i915]
 [<ffffffff814aa020>] ? drm_atomic_helper_swap_state+0x140/0x2d0
 [<ffffffffa047dedd>] intel_atomic_commit+0x3fd/0x520 [i915]
 [<ffffffff814d0252>] ? drm_atomic_add_affected_connectors+0x22/0xf0
 [<ffffffff814cf8a2>] drm_atomic_commit+0x32/0x50
 [<ffffffff814aed07>] restore_fbdev_mode+0x147/0x260
 [<ffffffff814b026e>] drm_fb_helper_restore_fbdev_mode_unlocked+0x2e/0x70
 [<ffffffff814b02d8>] drm_fb_helper_set_par+0x28/0x50
 [<ffffffff814b0203>] drm_fb_helper_hotplug_event+0x143/0x180
 [<ffffffffa0498ab5>] intel_fbdev_output_poll_changed+0x15/0x20 [i915]
 [<ffffffff814a1f92>] drm_kms_helper_hotplug_event+0x22/0x30
 [<ffffffff814a2172>] output_poll_execute+0x192/0x1e0
 [<ffffffff8108cf7c>] process_one_work+0x14c/0x480
 [<ffffffff8108d4fa>] worker_thread+0x24a/0x4e0
 [<ffffffff8108d2b0>] ? process_one_work+0x480/0x480
 [<ffffffff8108d2b0>] ? process_one_work+0x480/0x480
 [<ffffffff81092904>] kthread+0xc4/0xe0
 [<ffffffff8173013f>] ret_from_fork+0x1f/0x40
 [<ffffffff81092840>] ? kthread_worker_fn+0x180/0x180
---[ end trace 2d440da5f0c053e4 ]---

Instead of scratching heads too much while CI is down, let's revert
before more trouble is caused.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reported-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Mika Kuoppala <mika.kuoppala@intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1468502194-17029-1-git-send-email-daniel.vetter@ffwll.ch
2016-07-14 15:18:15 +02:00
Arnd Bergmann
772a7f2297 A defconfig update for omap2plus_defconfig to fix changed USB
Kconfig dependencies for v4.8 merge window. Otherwise things
 like USB Ethernet on omap3 beagle, omap4 panda and omap5-uevm
 won't work without manual configuration.
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Merge tag 'omap-for-v4.8/defconfig-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/defconfig

Merge "omap2plus_defconfig fix for v4.8 merge window" from Tony Lindgren:

A defconfig update for omap2plus_defconfig to fix changed USB
Kconfig dependencies for v4.8 merge window. Otherwise things
like USB Ethernet on omap3 beagle, omap4 panda and omap5-uevm
won't work without manual configuration.

* tag 'omap-for-v4.8/defconfig-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: omap2plus_defconfig: Fix USB selection to keep Ethernet working
2016-07-14 15:16:02 +02:00