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691,473 commits

Author SHA1 Message Date
Jimmy Assarsson
71873a9b38 can: kvaser_usb: Add support for more Kvaser Leaf v2 devices
This patch adds support for Kvaser Leaf Light HS v2 OEM, Mini PCI
Express 2xHS and USBcan Light 2xHS.

Signed-off-by: Jimmy Assarsson <jimmyassarsson@gmail.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2016-06-23 11:16:41 +02:00
Andy Shevchenko
7eebe96f22 gpio: lynxpoint: avoid potential warning on error path
When devres API is in use we are not supposed to call plain gpiochip_remove().
Remove redundant call to gpiochip_remove().

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:07:14 +02:00
Andy Shevchenko
5349910928 tools/gpio: add install section
Allow user to call install target.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:07:13 +02:00
Andy Shevchenko
8674cea84d tools/gpio: move to tools buildsystem
There is a nice buildsystem dedicated for userspace tools in Linux kernel tree.
Switch gpio target to be built by it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:07:13 +02:00
Andy Shevchenko
dd3b204af1 gpio: intel-mid: switch to devm_gpiochip_add_data()
The error handling is not correct since the commit 3f7dbfd8ee ("gpio:
intel-mid: switch to using gpiolib irqchip helpers"). Switch to devres API to
fix the potential resource leak.

Fixes: commit 3f7dbfd8ee ("gpio: intel-mid: switch to using gpiolib irqchip helpers")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:07:13 +02:00
Geert Uytterhoeven
771d899add gpio: 74x164: Use spi_write() helper instead of open coding
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:07:12 +02:00
Masahiro Yamada
99468c1af9 gpio: of: factor out common code to a new helper function
The conversion from a DT spec to struct gpio_desc is common between
of_get_named_gpiod_flags() and of_parse_own_gpio().  Factor out the
common code to a new helper, of_xlate_and_get_gpiod_flags().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:07:12 +02:00
Masahiro Yamada
762c2e46c0 gpio: of: remove of_gpiochip_and_xlate() and struct gg_data
The usage of gpiochip_find(&gg_data, of_gpiochip_and_xlate) is odd.

Usually gpiochip_find() is used to find a gpio_chip.  Here, however,
the return value from gpiochip_find() is just discarded.  Instead,
gpiochip_find(&gg_data, of_gpiochip_and_xlate) is called for the
side-effect of the match function.

The match function, of_gpiochip_find_and_xlate(), fills the given
struct gg_data, but a match function should be simply called to
judge the matching.

This commit fixes this distortion and makes the code more readable.
Remove of_gpiochip_find_and_xlate() and struct gg_data.  Instead,
this adds a very simple helper function of_find_gpiochip_by_node().
Now, of_get_named_gpiod_flags() is implemented more straight-forward.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:07:11 +02:00
Masahiro Yamada
1020dfd15b gpio: of: move chip->of_gpio_n_cells checking to of_gpiochip_add()
Do this sanity check only once when the gpio_chip is added
rather than every time gpio-hog is handled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:07:11 +02:00
Masahiro Yamada
be71534301 gpio: of: drop needless gpio_chip look-up in of_parse_own_gpio()
This function is doing more complicated than needed.  The caller of
this function, of_gpiochip_scan_gpios() already knows the pointer to
the gpio_chip.  It can pass it to of_parse_own_gpio() instead of
looking up the gpio_chip by gpiochip_find().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:07:10 +02:00
Masahiro Yamada
3f9547e1c9 gpio: of: optimize "gpios" property parsing of of_parse_own_gpio()
Call of_property_read_u32_array() only once rather than iterating
of_property_read_u32_index().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:07:10 +02:00
Linus Walleij
7e7c059cb5 gpio: convince line to become input in irq helper
The generic IRQ helper library just checks if the IRQ line is
set as input before activating it for interrupts. As we
recently started to check things better with .get_dir() it
turns out that it's good to try to convince the line to become
an input before attempting to lock it as IRQ.

Reviewed-by: Björn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:06:58 +02:00
Cristina Ciocan
b41aa4f847 pinctrl: baytrail: Fix mingled clock pins
Fix plt clock 3, 4 and 5 pins, which were not in the proper order.

Signed-off-by: Cristina Ciocan <cristina.ciocan@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 11:05:04 +02:00
Ramesh Shanmugasundaram
2d77583198 pinctrl: sh-pfc: r8a7795: Add DRIF support
This patch adds DRIF[0-3] pinmux support for r8a7795 SoC.

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-06-23 11:01:21 +02:00
Kuninori Morimoto
d07640f576 pinctrl: sh-pfc: r8a7795: Use PINMUX_SINGLE() for I2C
Now we have PINMUX_SINGLE(). Let's use it instead of PINMUX_IPSR_NOGP()

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-06-23 11:01:11 +02:00
Oliver Hartkopp
25e1ed6e64 can: fix oops caused by wrong rtnl dellink usage
For 'real' hardware CAN devices the netlink interface is used to set CAN
specific communication parameters. Real CAN hardware can not be created nor
removed with the ip tool ...

This patch adds a private dellink function for the CAN device driver interface
that does just nothing.

It's a follow up to commit 993e6f2fd ("can: fix oops caused by wrong rtnl
newlink usage") but for dellink.

Reported-by: ajneu <ajneu1@gmail.com>
Signed-off-by: Oliver Hartkopp <socketcan@hartkopp.net>
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2016-06-23 10:58:17 +02:00
Oliver Hartkopp
bce271f255 can: fix handling of unmodifiable configuration options fix
With upstream commit bb208f144c (can: fix handling of unmodifiable
configuration options) a new can_validate() function was introduced.

When invoking 'ip link set can0 type can' without any configuration data
can_validate() tries to validate the content without taking into account that
there's totally no content. This patch adds a check for missing content.

Reported-by: ajneu <ajneu1@gmail.com>
Signed-off-by: Oliver Hartkopp <socketcan@hartkopp.net>
Cc: <stable@vger.kernel.org>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2016-06-23 10:58:16 +02:00
Andy Shevchenko
7440926ed9 pinctrl: Flag strict is a field in struct pinmux_ops
Documentation incorrectly refers to struct pinctrl_desc, where no such flag is
available. Replace the name of the struct.

Fixes: commit 8c4c201634 ("pinctrl: move strict option to pinmux_ops")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 10:50:10 +02:00
Ben Dooks
a688e3517c pinctrl: rockchip: make rockchip_irq_gc_mask_set_bit static
The rockchip_irq_gc_mask_set_bit() function is not exported our used
outside of ppinctrl-rockchip.c so fix the following sparse error by
making it static:

drivers/pinctrl/pinctrl-rockchip.c:2010:6: warning:
  symbol 'rockchip_irq_gc_mask_set_bit' was not declared.
  Should it be static?

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 10:48:28 +02:00
Jon Hunter
d16dcd3d18 irqdomain: Fix disposal of mappings for interrupt hierarchies
The function irq_create_of_mapping() is used to create an interrupt
mapping. However, depending on whether the irqdomain, to which the
interrupt belongs, is part of a hierarchy, determines whether the
mapping is created via calling irq_domain_alloc_irqs() or
irq_create_mapping().

To dispose of the interrupt mapping, drivers call irq_dispose_mapping().
However, this function does not check to see if the irqdomain is part
of a hierarchy or not and simply assumes that it was mapped via calling
irq_create_mapping() so calls irq_domain_disassociate() to unmap the
interrupt.

Fix this by checking to see if the irqdomain is part of a hierarchy and
if so call irq_domain_free_irqs() to free/unmap the interrupt.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Link: http://lkml.kernel.org/r/1466501002-16368-1-git-send-email-jonathanh@nvidia.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-06-23 10:21:06 +02:00
Andy Shevchenko
fefb62455f MAINTAINERS: belong Documentation/pinctrl.txt properly
I'm pretty sure that Documentation/pinctrl.txt would be better maintained by
pinctrl subsystem.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 10:10:41 +02:00
Baruch Siach
828d631783 Revert "pinctrl: digicolor: add missing platform_set_drvdata() call"
This reverts commit 8b2b3dcb34.

Commit 546c6d7930 (pinctrl: digicolor: make it explicitly non-modular) removed
the platform_get_drvdata() call, so platform_set_drvdata() is no longer needed.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-06-23 09:50:05 +02:00
Masaki Ota
819d64e51d HID: alps: a few cleanups
Remove an unnecessary codes.
Change input_ivent() function to appropriate function.
Add the device ID of "HID_DEVICE_ID_ALPS_U1_DUAL".

[jkosina@suse.cz: removed unnecessary bitshifts of values passed
 input_report_key() as spotted by Dmitry]
Signed-off-by: Masaki Ota <masaki.ota@jp.alps.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2016-06-23 08:56:36 +02:00
Heiner Kallweit
38b09c030b HID: remove ThingM blink(1) driver
Now that support for ThingM blink(1) was merged into the hid-led driver
the dedicated driver for this device can be removed.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Acked-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2016-06-23 08:48:42 +02:00
Heiner Kallweit
007414e8fb HID: hid-led: add support for ThingM blink(1)
Add support for ThingM blink(1) and make the dedicated ThingM driver
obsolete.

Successfully tested with a blink(1) mk2.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2016-06-23 08:47:41 +02:00
Heiner Kallweit
4374573008 HID: hid-led: add support for reading from LED devices
Add support for reading data from LED devices.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2016-06-23 08:47:40 +02:00
Heiner Kallweit
5bc839367b HID: hid-led: add support for devices with multiple independent LEDs
Add generic support for devices with multiple independent LED's.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2016-06-23 08:47:40 +02:00
Krzysztof Kozlowski
1c03274d68 MAINTAINERS: Extend Samsung SoC entry with S3C/S5P drivers
Some of the drivers for S3C and S5P families of Samsung SoCs go in
through Samsung SoC tree.  Extend the entry so proper maintainers would
be displayed in such cases, most notably the cpufreq drivers.  This does
not change the work-flow for other drivers which have sub-maintainers
(like Samsung clocks).

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2016-06-23 08:12:08 +02:00
Tony Lindgren
3696203c47 ARM: OMAP4+: Allow kexec on SMP variants
Kexec needs omap4_cpu_kill, otherwise kexec will produce on SMP:

kexec_load failed: Invalid argument

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-06-22 22:57:02 -07:00
Tony Lindgren
3251885285 ARM: OMAP4+: Reset CPU1 properly for kexec
We need to reset CPU1 properly for kexec when booting different
kernel versions. Otherwise CPU1 will attempt to boot the the
previous kernel's start_secondary(). Note that the restctrl
register is different from the low-power mode wakeup register
CPU1_WAKEUP_NS_PA_ADDR. We need to configure both.

Let's fix the issue by defining SoC specific data to initialize
things in a more generic way. And let's also standardize omap-smp.c
to use soc_is instead of cpu_is while at it.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-06-22 22:55:53 -07:00
Tony Lindgren
0573b957fc ARM: OMAP4+: Prevent CPU1 related hang with kexec
Kexec booted kernels on omap4 will hang early during the boot if the
booted kernel is different version from the previous kernel.

This is because the previous kernel may have configured low-power mode
using CPU1_WAKEUP_NS_PA_ADDR. In that case it points to the previous
kernel's omap4_secondary_startup(), and CPU1 can be in low power mode
from the previous kernel. When the new kernel configures the CPU1
clockdomain, CPU1 can wake from low power state prematurely during
omap44xx_clockdomains_init() running random code.

Let's fix the issue by configuring CPU1_WAKEUP_NS_PA_ADDR before we
call omap44xx_clockdomains_init(). Note that this is very early during
the init, and we will do proper CPU1 reset during SMP init a bit later
on in omap4_smp_prepare_cpus(). And we need to do this when SMP is
not enabled as the previous kernel may have had it enabled.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-06-22 22:55:51 -07:00
Tony Lindgren
f4b9f40ae9 ARM: OMAP4+: Initialize SAR RAM base early for proper CPU1 reset for kexec
Prepare things for making kexec work on SMP omap variants by initializing
SARM RAM base early. This allows us to configure CPU1 for kexec in case
the previous kernel has put CPU1 in low power mode.

Note that this should not prevent moving other SAR RAM code to live
under drivers. However for kexec, we will need this very early.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-06-22 22:55:47 -07:00
Tony Lindgren
99eb45f98c Merge commit 'c0053bd50a' into omap-for-v4.8/soc 2016-06-22 22:55:18 -07:00
Michael Turquette
367b30502d Merge remote-tracking branch 'clk/clk-s905' into clk-next 2016-06-22 18:20:12 -07:00
Jacob Pan
0080d65b77 idle_intel: Add Denverton
Denverton is an Intel Atom based micro server which shares the same
Goldmont architecture as Broxton. The available C-states on
Denverton is a subset of Broxton with only C1, C1e, and C6.

Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-06-23 03:12:32 +02:00
Paul Gortmaker
02c4fae9ea drivers/idle: make intel_idle.c driver more explicitly non-modular
The Kconfig for this driver is currently declared with:

config INTEL_IDLE
        bool "Cpuidle Driver for Intel Processors"

...meaning that it currently is not being built as a module by anyone.

This was done in commit 6ce9cd8669
("intel_idle: disable module support") since "...the module capability
is cauing more trouble than it is worth."

This was done over 5y ago, and Daniel adds that:

    ...the modular support has been removed from almost all the cpuidle
    drivers and the cpuidle framework is no longer assuming driver could
    be unloaded.

    Removing the modular dead code in the driver makes sense as this
    what have been done in the others drivers.

So lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.

Since module_init translates to device_initcall in the non-modular
case, the init ordering remains unchanged with this commit.  At a
later date we might want to consider whether subsys_init or another
init category seems more appropriate than device_init.

We replace module.h with moduleparam.h since the file does declare
some module parameters, and leaving them as such is currently the
easiest way to remain compatible with existing boot arg use cases.

Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.

Also note that we can't remove intel_idle_cpuidle_devices_uninit() as
that is still used for unwind purposes if the init fails.

We also delete the MODULE_LICENSE tag etc. since all that information
is already contained at the top of the file in the comments.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-06-23 03:12:32 +02:00
Michael Turquette
738f66d321 clk: gxbb: add AmLogic GXBB clk controller driver
The gxbb clock controller is the primary clock generation unit for the
AmLogic GXBB SoC. It is clocked by a fixed 24MHz xtal, contains several
PLLs and the usual post-dividers, muxes, dividers and leaf gates that
are fed into various IP blocks in the SoC.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:07:31 -07:00
Michael Turquette
2cc9e7ec21 clk: gxbb: Document bindings for the GXBB clock controller
Add documentations for the clock controller.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:07:31 -07:00
Michael Turquette
4a47295144 clk: meson: fractional pll support
Fractional MPLLs are a superset of the existing AmLogic MPLLs. They add
in a couple of new bitfields for further dividing the clock rate to
achieve rates with fractional hertz.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:05:47 -07:00
Rafael J. Wysocki
4a14e48fa7 Merge branch 'x86/cpu' 2016-06-23 03:05:15 +02:00
Michael Turquette
1c50da4f27 clk: meson: add mpll support
MPLLs are adjustable rate clocks derived from PLLs. On both Meson8b and
GXBB they appear to be only derived from fixed_pll.

Add support for these clock types so that they can be added to their
respective drivers.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:59 -07:00
Michael Turquette
73de5c8bcf clk: meson: add peripheral gate macro
There are a series of peripheral and system gate clocks that fan out
from the clk81 signal. Add a helper macro to statically initialize these
gate clocks.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:56 -07:00
Michael Turquette
cb7c47d706 clk: meson: only build selected platforms
Break the AmLogic clock code up so that only the necessary parts are
compiled and linked. The core code is selected by both arm and arm64
builds with COMMON_CLK_AMLOGIC. The individual drivers have their own
config options as well.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:52 -07:00
Michael Turquette
796b9aa85d clk: meson8b: convert to platform_driver
This patch creates a proper platform_driver for the meson8b clock
controller. Use of CLK_OF_DECLARE is removed, and can be added back in
later if very early registration of some clocks is required.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:48 -07:00
Michael Turquette
c0daa3e6f5 clk: meson8b: clean up composite clocks
Remove the composite clock registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.

To preserve git bisect this patch also flips the switch and starts using
of_clk_add_hw_provider instead of the deprecated meson_clk_register_clks
method. As a byproduct clk.c can be deleted.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:44 -07:00
Michael Turquette
ab95d6e8cc clk: meson8b: remove mali clk
This clock is undocumented and always orphaned. Get rid of it until we
have more complete clock tree documentation.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:40 -07:00
Michael Turquette
55d42c40dd clk: meson8b: clean up cpu clocks
Remove the cpu clock registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.

Ninja rename a5_clk to cpu_clk to better align with cpufreq convention.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:35 -07:00
Michael Turquette
6282a2da09 clk: meson8b: clean up fixed factor clocks
Remove the fixed factor registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:32 -07:00
Michael Turquette
ec623f2a43 clk: meson8b: clean up pll clocks
Remove the pll registration function and helpers. Replace unnecessary
configuration struct with static initialization of the desired clock
type.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:28 -07:00
Michael Turquette
e92f7cca44 clk: meson8b: clean up fixed rate clocks
Remove the fixed_rate registration function and helpers from clkc.[ch].
Replace unnecessary configuration struct with static initialization of
the desired clock type.

While we're here, begin the transition to a proper platform_driver and
call of_clk_add_hw_provider with a shiny new struct clk_hw_onecell_data.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2016-06-22 18:02:24 -07:00