I would like to help reviewing FSL/NXP SoC sound drivers.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJXL7HfAAoJEHm+PkMAQRiGYe8IAJBGaPUq38EJh2YOV+AQf9v6
t/alhwB3DUE1E0zjLy7I7JJ+xDXtKjZh9fS6OFuIS8Q3RIrBteIJ/oH8TPpt7yZ/
SnP6rYPvYD6CImTyrh7+ORL/udEwJX8+YqFYAgUAq167gvpDjYj8r26VzdIaIN4/
oBbL8NrQNWfODieywYyhUoitVhwMz09zmBfLtGVks4vd2jUJk2Fdd9cOtGV5tRfk
DPndPgyQtbr8W0mKovV8sT9WkQeV5TsUr4MLgf7hjnAGYQ8+0KamkzzVVLBeBiiw
uazyrOCFkddZp+N7KbmbOmazV/yULRuLGgDjVKazoCsOaKOvoGCzrCk7daOPy6Q=
=CegX
-----END PGP SIGNATURE-----
Merge tag 'v4.6-rc7' into patchwork
Linux 4.6-rc7
* tag 'v4.6-rc7': (185 commits)
Linux 4.6-rc7
parisc: fix a bug when syscall number of tracee is __NR_Linux_syscalls
x86/tsc: Read all ratio bits from MSR_PLATFORM_INFO
mailmap: add John Paul Adrian Glaubitz
byteswap: try to avoid __builtin_constant_p gcc bug
lib/stackdepot: avoid to return 0 handle
mm: fix kcompactd hang during memory offlining
modpost: fix module autoloading for OF devices with generic compatible property
proc: prevent accessing /proc/<PID>/environ until it's ready
mm/zswap: provide unique zpool name
mm: thp: kvm: fix memory corruption in KVM with THP enabled
MAINTAINERS: fix Rajendra Nayak's address
mm, cma: prevent nr_isolated_* counters from going negative
mm: update min_free_kbytes from khugepaged after core initialization
huge pagecache: mmap_sem is unlocked when truncation splits pmd
rapidio/mport_cdev: fix uapi type definitions
mm: memcontrol: let v2 cgroups follow changes in system swappiness
mm: thp: correct split_huge_pages file permission
maintainers: update rmk's email address(es)
writeback: Fix performance regression in wb_over_bg_thresh()
...
The statistics are not really used for anything and should
be replaced by generic and per-device statistic counters.
Remove the code for now.
Signed-off-by: Joerg Roedel <jroedel@suse.de>
An earlier patch changed lookup side to also net_eq() namespaces after
obtaining a reference on the conntrack, so a single kmemcache can be used.
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
We already include netns address in the hash, so we only need to use
net_eq in find_appropriate_src and can then put all entries into
same table.
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Will be needed soon when we place all in the same hash table.
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
compatible string if no exact match based on the IO address is found.
This leaves out the need to patch auxdata for each driver when adding
new SoCs. And it also reprotedly fixes the issue of passing auxdata
to a child if the parent instantiates the child from DT as discussed
in the "[PATCH] of/platform: Allow secondary compatible match in
of_dev_lookup" mailing list thread.
As a minimal use case, let's also convert omap pinctrl auxdatato
use a generic match.
There is no need to get this in to the v4.6-rc cycle and it can wait
for v4.7 merge window. Note that these changes have now been sitting
in Linux next for about two weeks so far as I wanted to make sure no
new issues are popping up.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXKjVmAAoJEBvUPslcq6VzNaIQAKBW4SoVCpUnz8U7Vb6drVmk
kNuXn317CJQIJSPYuncQkmnPPDqvRBB16offmWI2z31R2p8azuf4kTkroqGrIP2+
ZuXyuxNc3IczxMiWjVN3SKA7/h4fRM+J8IN8AHHf/DAcFOc0Dz1muMhkEX3otT+/
qFn85iBreeAaNnW9eViZ+lvz6wSYlhrHAPrW3jHJM1Q11OTi45vymS82iU4ztcXo
zotDxSLaMcQJNAb6wF553JhzwL8G1bM9Ab1b5+vsOVQ/y/wWY+b/maGePUQCWiVX
cggYoa/0gDmBGAUdLq1GvVTg4HHIEaO0ysrioMlHmOkTf7KXXiKITZTX98FE39rL
xH/2nkechWV8yWPwhZktjASzcImqItcMdS3axFgdHnV7fpho2an/80Ekod401/Bh
wIJ48gZxPAyshjr+e8xhyHRdEauVmUYvdiUS/Gv8dEvJJnBqVFYcLd/FNCp43j5X
G7RQITG0pK7i0xwX+9vNOrD5CzfWCSLYw6iMnMnReMdnw9PUwbYLaiWTuoyC6Pmd
B9zMkqOzdael6fFuQvRi9ZOEoSK5A3EpLWrvXzrS4nXy1dOa2eDpuxoRkAKACVMf
wyANAn3YK1pQwtnoGRsdNk98zjMX2o8H1G0XKB0QewNa0zlNhGIUsAiZYX4H/drg
taAbzAUSLloDcHnyQgis
=T39l
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.7/auxdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Merge "non urgent auxdata fix for v4.7 merge window" from Tony Lindgren:
Device tree auxdata handling fix that allows a match based on the
compatible string if no exact match based on the IO address is found.
This leaves out the need to patch auxdata for each driver when adding
new SoCs. And it also reprotedly fixes the issue of passing auxdata
to a child if the parent instantiates the child from DT as discussed
in the "[PATCH] of/platform: Allow secondary compatible match in
of_dev_lookup" mailing list thread.
As a minimal use case, let's also convert omap pinctrl auxdatato
use a generic match.
There is no need to get this in to the v4.6-rc cycle and it can wait
for v4.7 merge window. Note that these changes have now been sitting
in Linux next for about two weeks so far as I wanted to make sure no
new issues are popping up.
* tag 'omap-for-v4.7/auxdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Simplify auxdata by using the generic match
of/platform: Allow secondary compatible match in of_dev_lookup
The MAXIM PMIC MAX77620 and MAX20024 are power management IC
which supports RTC, GPIO, DCDC/LDO regulators, interrupt,
watchdog etc.
Add DT binding document for the different functionality of
this device.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
MAX77620/MAX20024 are Power Management IC from the MAXIM.
It supports RTC, multiple GPIOs, multiple DCDC and LDOs,
watchdog, clock etc.
Add MFD drier to provides common support for accessing the
device; additional drivers is developed on respected subsystem
in order to use the functionality of the device.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add defines for the possible values the GPSW can be set to using the
wlf,gpsw device tree binding.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Some of the bits in this register can be changed by the codec
so we must mark it volatile.
Signed-off-by: Richard Fitzgerald <rf@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
As a counterpart to the usb power_supply cell, this commit adds an AC
power_supply cell to the axp20x driver.
Still missing are the RTC backup battery and the main battery charger
cells.
Signed-off-by: Michael Haas <haas@computerlinguist.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
v4.7 merge window. These are not considered urgent fixes enough
for the v4.6-rc cycle, but we need them in v4.7 in order to drop
the last remaining board-*.c files for omap3 for v4.8 merge window.
On Nokia N900, we need to pass the MMC slot names for the legacy
user space to work. Let's do that using auxdata as the driver is
setting up things already with the pdata for legacy booting. Then
we can later on discuss if we may want to have some generic binding
describing where the MMC slots are on the device.
N900 also has had the ir-rx51 device driver unusable with multiarch
for a long time. Let's pass the dmtimer data in pdata for the driver
to get it going again. Then once things are working, we can eventually
change the driver to use just hrtimer and PWM framework. The driver
changes will be queued separately.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXKi9zAAoJEBvUPslcq6VzfNcP+wRJTBKja7wxwxo8R2DKbYgw
oJXcldqdqJZIaHnJUR7uFDHZu1Jt6ZUM6WZQAEQTozPtMPnufM3VNgREz/LUqcCa
/vNQUBbvGwiaP3KOk3jNX1HuzSFhoAIQxTkE07FEBziZc0Soq7Cs//mUP1HZOrG2
a2+5MRM1TsVqIf0vSHUSZ9ez6iJpbpq2brdFb0upJwV9DFUcDouBBjd1atOPBJqW
mZ4myDqgbSSY7fL2cPEGnqVR0tqNTwrToWNxZFBP5T9IrI1oOe0MfI2vDgdHFf9h
mrVVITSRvwte751Xheze069ktzI1qJoIUDcyXN1+kTAC7jp3q7Kjo8fzqMVPfcqE
zn+Sj7C1l+1a0WjXjzhJhZgJBQkHwJubyJv3cGhb3HdkHbjIp7WURbcMF6gElEH7
J9eA+aHHyd3PW0mfdjuLY0gI5XEoBvRLiboZIewjQ9hIMgD+bKC0FZ/h313xo6eG
uPgobT9JBDmcv/EQw2eCH9kVvbf/gudNpCNgdoHcBf3V/EiSPl5PKxhgHtLM4WFj
S4rVg5X3MPglQay436SwSwmFYxk3WDo03qLDhn7DWPxxeCVuJDscvgzPhRuVKH4A
ox1a17UI1510M6bxoQLGFKK//Q2rNFEQb0YDImlwfsB7ZO/WV3mxn/KX4q2wDWhB
WlvMCPGZPi4K38utIQuW
=klmr
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.7/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Merge "omap legacy boot vs dt boot fixes for v4.7 merge window"
from Tony Lindgren:
Legacy booting vs device tree booting fixes for omaps for
v4.7 merge window. These are not considered urgent fixes enough
for the v4.6-rc cycle, but we need them in v4.7 in order to drop
the last remaining board-*.c files for omap3 for v4.8 merge window.
On Nokia N900, we need to pass the MMC slot names for the legacy
user space to work. Let's do that using auxdata as the driver is
setting up things already with the pdata for legacy booting. Then
we can later on discuss if we may want to have some generic binding
describing where the MMC slots are on the device.
N900 also has had the ir-rx51 device driver unusable with multiarch
for a long time. Let's pass the dmtimer data in pdata for the driver
to get it going again. Then once things are working, we can eventually
change the driver to use just hrtimer and PWM framework. The driver
changes will be queued separately.
* tag 'omap-for-v4.7/legacy-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: n900 needs MMC slot names for legacy user space
ARM: OMAP2+: Add more functions to pwm pdata for ir-rx51
1. Fix s5p-mfc driver probe on Exynos542x Peach boards (need to provide MFC
memory banks). On these boards this was broken for long time but
apparently no one enabled this driver till now.
2. Fix creation of debugfs entries for one regulator on Exynos4210
Trats board.
3. Fix probing of max8997 MFD driver (and its children) because
of missing interrupt. Actually the current version of the driver probes
(just without interrupts) but after switching to regmap and regmap-irq,
the interrupt will be mandatory.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXLcwaAAoJEME3ZuaGi4PXWfYP/REe1dyznGhMCvXFuv7EDQ2/
c2xhWBD00zFqjSp8yA/q7Z2zP2YUIL/y882BlvCCkmFda5LdME3Wh/afA+8/GAAR
4pJfnuxYC87ilNaWls1v7bAZc4O+F+SSU2EFI4LKbvxLv+KuwMx/TLeIJS6nEihk
IalnICEO/BQRYSvz8CWMYx0GeHiiKjWaKkgZJnlqGzkRhQQZNUoccn8Z7By8mBeO
ZGpBJCmg07+X1jWoc9e4YrY2of75IZMYkS2gbdck0mqj5VJn45wMJL/dJCwEPdjh
f2Zv+d3851Uj6NqJEyn/9wfXPi6dQGLT/3Hu+TB4QVX3KlwCiDUBwouSU2f5YTgI
b45AdrXlxakAybmQQnSSgKWbYClnJ6HaVVqB3RgolZZSZkJUmygtoYM72hUC7Z21
K6hbqzgMVw+crhmymDdOyNHpYfb3OLSf16pomDTq585wYGOenEGcKnnDlgoJmoFe
x4Ae6hRE/Hk4wQuWsh34KIKHzPkFaBJRQgFBBAOQR7Zqv7AN5FflQ2xxo32qYMvS
hr9ObkW4DYmB6wDtvpm6va2cBSrnXXK3uA0vH3O1IkmOqoI6NeVFYjA387OVyRLj
0MzrAgQLAiQPR2r2Xo3yhJGd6qZjlWq9R310jUJQonR0ZpVnQ5s52lNrt2qGtdmg
LJC3Q+ahxhMVGw+RVsgf
=l5HK
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-non-critical-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/fixes-non-critical
Merge "Samsung DTS non-critical fixes for v4.7":
1. Fix s5p-mfc driver probe on Exynos542x Peach boards (need to provide MFC
memory banks). On these boards this was broken for long time but
apparently no one enabled this driver till now.
2. Fix creation of debugfs entries for one regulator on Exynos4210
Trats board.
3. Fix probing of max8997 MFD driver (and its children) because
of missing interrupt. Actually the current version of the driver probes
(just without interrupts) but after switching to regmap and regmap-irq,
the interrupt will be mandatory.
* tag 'samsung-fixes-non-critical-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add interrupt line to MAX8997 PMIC on exynos4210-trats
ARM: dts: exynos: Fix regulator name to avoid forbidden character on exynos4210-trats
ARM: dts: exynos: Add MFC memory banks for Peach boards
ARM: EXYNOS: Properly skip unitialized parent clock in power domain on
arm-ccn driver uses irq_set_affinity, which is not exported and
hence cannot be built as a module, eventhough we have all the
bits ready. This patch makes use of the exported helper
irq_set_affinity_hint() instead. Also, the __free_irq expects
the affinity_hint to be NULL when we free the irq. So set the
affinity_hint to NULL at clean up.
Now that we can build it as a module, update the Kconfig to
reflect the change.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- add support for pmic wrapper mt6323
- add support for SoC mt2701
- enable gpt6 arch timer on mt7623
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJXJzFfAAoJELQ5Ylss8dND/vYP/igakCxTIYX0FsqSSgTY0btk
OsFUxnFiAZ8r35P2QTaA8hlhP0Lv2CUA2vNA9DDmZgM6F5tKRhN9MVoQTBrdJs+2
UYY/bIH+aNUBExbURamdSQVJamMioxOrG++FyNed5gMZ9miIgACOyWJOFw7cEm52
w48qUeNdmxkPdh/mTXW1MB+JbyLBxO3vg8RJThx/a3q09DzBtHRgqKVFnpLDcILB
XzUIH+Uj6pdHmft5ySF4Ke0oQWmW1gP3soej/GDJi5GiVE0eq27/RiO+/6Eyv6Qj
l78LaM3IDvuZhR+zILE/C7gIoexLIB9Keq9QH/4FCN1wOLVKtZwts1WvdauqLpRc
cBCnsCQQCdhJAbBrYsMB6pAc0S981jfcjQh6HnZexcpyN4VageKvndPXrVRXy/HS
Ev6NXrkI19UBfH+LGLSGAkQFbKxCTpwoDMi1yCh/vBnYpp4tc8NcX17LbEsUIpAs
3Z0bDW4iBWIwsCmkb+wb3T/MDZ40YZyfUkRJciFyrOvaiCnC1jpdRCq5e3PHWcqs
kkJnSgitjrtxYb1r18GeLV1BYICqRyy62SM5HWfVFjOw6Ia0vdgmkM3mLFZb4sVw
qVBniwSs4OtkfuLBzqfQtscxFojqhjmh0XLl/IzG7hmG78yTP4pIfuz7yFOpqM2Y
MxhVBXYzX/txt0TP5HLQ
=35R/
-----END PGP SIGNATURE-----
Merge tag 'v4.6-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers
Merge "ARM: mediatek soc updates for v4.7" from Matthias Brugger:
- re-organize pmic wrapper code for easier and cleaner addiont of new SoCs and pmic wrappers
- add support for pmic wrapper mt6323
- add support for SoC mt2701
- enable gpt6 arch timer on mt7623
* tag 'v4.6-next-soc' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: enable gpt6 on boot up to make arch timer work on mt7623
soc: mediatek: PMIC wrap: add MT2701/7623 support
soc: mediatek: PMIC wrap: add mt6323 slave support
soc: mediatek: PMIC wrap: add a slave specific struct
soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()
soc: mediatek: PMIC wrap: move wdt_src into the pmic_wrapper_type struct
soc: mediatek: PMIC wrap: SPI_WRITE needs a different bitmask for MT2701/7623
soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for MT2701/7623
soc: mediatek: PMIC wrap: split SoC specific init into callback
soc: mediatek: PMIC wrap: add wrapper callbacks for init_reg_clock
soc: mediatek: PMIC wrap: don't duplicate the wrapper data
Implements generic PM domain support on top of the existing Tegra power-
gate API. Drivers are thus allowed to move away from the Tegra-specific
API and towards using generic power domains directly.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXI3unAAoJEN0jrNd/PrOhdPIP/jOgS5Qf1u8QelFvPbsXouRf
xpBy9sa43oow8f+0RVjTrsWDikjniCYcGDPZbfgmXEN5sWYK2xBIZeaMysGezPXS
/g9VnxU0HZsQ+5AOWHS/vxYLfB9Q6g3w4P7XDDzKmJ9mFaLeyNR4ulGWwLxpeF/1
au38f/dXgjU9I+NwXJWhTEspQrXAshIwp6lsQkjcpLmAMeFBOjB7c92uTYmVXI9F
XtGcpGmIqDwRaieY1lqE0iGUMgox2XG2bKgNuwZ+Eng+ICz2ACuGfyH7hwCeWJpK
HByxL83aA9a+G8KIsPZgJYTCuQA7UVYjWp5A5UqpuhsP7Da4EagX3Bdvcwqy/sgk
rcLNSTuksbJyHT/yQO5cj9lPrdFckSglChZlSRX1J5FhQN2xHw/1CmfDgPmZ1Htt
D+66iLm3lJ+SZlwaZToofU89GYRc+GoZVPQrMBMCwTIBcYf6ACtG7hYIB6JrxHJg
xyiSbDKRYyHBWHoL534G2S8xtnTjMHG1RLD2SoI49Qsa9OTmJz50NainElPi2DX5
266zz87Fa+5WePEp0NjBIJ0Hgq4uoMJFpvkG2pzODb2fwHxzW7E/KB6pAV9/+1EZ
F+sPDHUnzTSLx76h7vs1v4ye9TXrcuKXXnhU7YBm6eWCgeM3GOf6V8u7z6BQDxxT
rAYhbGOeeAiORGdMUo4h
=oeBF
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.7-genpd' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "soc/tegra: Add generic PM domain support" from Thierry Reding:
Implements generic PM domain support on top of the existing Tegra power-
gate API. Drivers are thus allowed to move away from the Tegra-specific
API and towards using generic power domains directly.
* tag 'tegra-for-4.7-genpd' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Add generic PM domain support
dt-bindings: Add power domain info for NVIDIA PMC
These changes add support for the XUSB controller on Tegra124. It is an
XHCI compatible controller that replaces the existing EHCI controllers.
Support is enabled on Venice2, Jetson TK1 and Nyan-based Chromebooks.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXI4aZAAoJEN0jrNd/PrOhlhEQAJsk8OhsyqMUpi+kUBPwvR+x
V/WAoHsC2P41l0J8kltGyEW8hVt9jjq1xKoUjYQMycEVK3+uwHWSAmPxLvB4I+OM
6sdZ7fzwbQbC6Om6XT0fdXoi9ryyWWW7N3yil53wJUCbgrDVehd3qG+k56yyvyc4
MqEfGelAtIcj365Oq4aOmLe5cGXEQ1rAVdTVAG1jRhXe+4ItnZwbXJB3Tavp6SK6
euxrrVf9KoW9fhH4Y4SL6l/9A5qDSYr3p1SitNgMTZmvPZa58EJ1Bu/y6OoefsD0
Vi4MYbKyltuNjo6vHRYrUfLXwd9bRFVDgZmErxibI3RXUew8RKxmZzGItaqsxesc
YzEcfZ7hZP5qIK3c8uvuw3XRIenHbg/Dk0mGQ4OSJx+jyf5V6BFPjfpESykE/M0b
C71p2wEVRBWSwOpNY7+AOKobKnxK4lWEymd5RsneZKpZpjtYy67Mh/AFuUj64IiU
AlQoPOIRX4qvf1T4RdYq/jqYp0tSxHVwxwqYg7tQu5fWo5KjZB/KBiqCgsM8RC5i
2Pv7upI9feAwffydljLJvAgKiF2GzOpjj+eFdZZc/5OCvLaDULdI9VHcpMPuJrt/
yI0ZVjnzkmTTBzNjoTPzglbwWCdJ2cA0iZeIgdtupLAMHvDALltAE1vGSu1TBGhF
rGAOcNZ1yW3X5UxbXL5X
=NYo3
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.7-xusb-no-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/late
Merge "ARM: tegra: Enable the XUSB controller" from Thierry Reding:
These changes add support for the XUSB controller on Tegra124. It is an
XHCI compatible controller that replaces the existing EHCI controllers.
Support is enabled on Venice2, Jetson TK1 and Nyan-based Chromebooks.
* tag 'tegra-for-4.7-xusb-no-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable XUSB on Nyan
ARM: tegra: Enable XUSB on Jetson TK1
ARM: tegra: Enable XUSB on Venice2
ARM: tegra: Add Tegra124 XUSB controller
ARM: tegra: Move Tegra124 to the new XUSB pad controller binding
This is a prerequisite for enabling the Tegra XUSB, all the
branches should be merged already at the time we get here.
* tegra/pci:
PCI: tegra: Support per-lane PHYs
dt-bindings: pci: tegra: Update for per-lane PHYs
phy: tegra: Add Tegra210 support
phy: Add Tegra XUSB pad controller support
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
phy: core: Allow children node to be overridden
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
* tegra/usb:
usb: xhci: tegra: Add Tegra210 support
usb: xhci: Add NVIDIA Tegra XUSB controller driver
dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support
dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding
phy: tegra: Add Tegra210 support
phy: Add Tegra XUSB pad controller support
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
phy: core: Allow children node to be overridden
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
This set of patches introduces a driver for the XUSB controller found on
NVIDIA Tegra SoCs. When loaded with a firmware (available via the linux-
firmware repository), it provides an XHCI-compatible interface.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXI3mPAAoJEN0jrNd/PrOhYEkP/1S5LvE8sdAUgOPQ3vkLsbMc
a/nVwcThOTYhf2wo2HGxJMTFwY/F1JwfK6bviWKra1JkNAsSe2JFZN8j9niv6j6I
5iO5/60ir/psOjoQGvxBEfK+4HJzWN/hFVhuwFz+oYg7ooIg57wADFEL5XWhlokS
5mMTR7Z+CIle+1g4L5ym0n0dh7hvr+/whA+8kewcpSav9Z2xs/oiHziCnO40/Raf
uzBd0o3hINM3THI+ypK6B4rYt1Z49reXDPwr8XlLky9vlmd58xqCnYOiDOEcb7B5
JL9UraNHJkhCEA2bWuUsb6lhPFkoPFQjhWSr+3JhmUoUbSWDK+b4JW2c60NOjOXL
VJcps5hVZR7aEVR4FVV64Yu4JlpjWIFn6jN/+Z18WJaVulxylAMkyHtuP9z9K7b8
BOgYtZdcoVfkOw05WJxlxefbpkHgun319Yb4ZzVVpCd9Drb4W7OJziQJr9Uq/6yl
HU/QulgtN29UZXGF2PP5rDD5KDlOfqX7m10vwACqFPW18xJaA3ur0GOP5oFyzTKg
odAMugvakHTQqS3AUwJi9NBK1O3NvGL1HOXkqa0y+3TKtaKpKAA+OOisy1dwP+PN
j4mzWT2x/siiKZO7La8c2SeKhfr93KI0UUujm+yUzZ6kyfCP3dG8qIfoS6Skz7s/
+6fOeDPwcQod79+/f50a
=BcOx
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.7-xhci' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "usb: host: xhci-tegra: Changes for v4.7-rc1" from Thierry Reding:
This set of patches introduces a driver for the XUSB controller found on
NVIDIA Tegra SoCs. When loaded with a firmware (available via the linux-
firmware repository), it provides an XHCI-compatible interface.
* tag 'tegra-for-4.7-xhci' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
usb: xhci: tegra: Add Tegra210 support
usb: xhci: Add NVIDIA Tegra XUSB controller driver
dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support
dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding
These patches update the Tegra PCIe host bridge controller device tree
bindings and driver to cope with per-lane PHYs on Tegra124 and later.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXI3jqAAoJEN0jrNd/PrOhQ9AP/1PwtJFCkgK+BXNaNLxMjmcE
PFNs4YFEbM7l/SJKXYKNiFMKN+M2pXe7jDxsefrKZd8Ad8qcNxPelzxZCzT0PYrX
4s4FXaztevBC+Kes0yvmBsu8k0ErGyu0XlE5rOTm6xgZp3BasKXv77ExeIIAmDyl
eD+Ehgigb4pgN0Vp2sps+puWyndUtrCxlfZdg57MRCxYBYpeyacMjU6K/LptIYyF
NJNhtPeJNX12LszblxM2agWBjRodzSr1qS4+ZtEBOxC/GRrpQ1XBdFNUI7LDF3B9
MXV1AiR7+NSSqPJSk6PMip87G9uYugvVofQQwls2YgP4f3VnEaDMSUexq5CTvA9S
am48BsVQz2IHnkTA3YML0UQ/1pafD0W9ry3OyiVmu6RCnB5ROANoiX8+GoCS8yGB
ptxb68rjVq+Y3bB17M1xWFmhFnO95aTYcS8QM7LUlsAdw17cmfhOfBKkTFUY/2j3
9hp0Zr+0I9Vtb1OFG3wwV6wtpVKTGn8QVgt7/XdzmY5Y9HnQaA4qK/T1OARvd+HL
uLX/sh0KCC3pVavjjQZJBUYw4hoCgOWMz5NSP7CMJtIf+0VmAG4OxpvPWiuGqedB
hLRqRuM3P5Rqb6AFXy6kmgJ3+mPLYbHxJ9NEbvVoovZMN5iepEHhhxbYvVc0hDXn
D73a/QG/H7RczJeQbM0X
=38Xd
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.7-pci' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "PCI: tegra: Changes for v4.7-rc1" from Thierry Reding:
These patches update the Tegra PCIe host bridge controller device tree
bindings and driver to cope with per-lane PHYs on Tegra124 and later.
* tag 'tegra-for-4.7-pci' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
PCI: tegra: Support per-lane PHYs
dt-bindings: pci: tegra: Update for per-lane PHYs
This set of patches adds support for the Tegra XUSB pad controller. The
controller provides a set of pads (lanes) that are used for I/O by other
IP blocks within Tegra SoCs (PCIe, SATA and XUSB).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXI3hiAAoJEN0jrNd/PrOhSeIP/0ziDYSAgTbB30L2CJNLnyp3
xnbn6YHLsZVcwD4Pxlu9TW2z4iqCz3BU7Glbv0zc8tGGW9OzaPPH2M/+Vl8neM5O
fRaP/hd2FlW9leiPU/xNU4gdGycRuk94clxObNtS8g3qKxl2KsQeZBWiMfIPsJRE
IvK57SmLtznDgigtV2xJjH90OkwycAWQBi6r7pcttnLWB5qAEkMl0EnVz35q6EOM
8EXOSjMATdrxRwE3FjRDzzSWPUpRHG61DC4krMpo8VgHXyqUdR1o5VwxEPIBcL3W
td/oPZrUNAa7z/IoSdH9SD9IEc1OIwZOmcwFkOsFjFRn118gx+RE7pd8QkvKaCGU
CDfqHS76pgOrnHOLWCtuYMagrPtwI2H8KOqx2VOLdKQghez1ykk0gCpKqp5CLGC1
G4VQp1jK7y4dB97K3C5/8WfntNSczE+kb61B3Q3gHKaP8GfvBtdhGfP+POXwp4bC
rrw8kienv3sws11GTZXMHhQWVGgbWxenPh+Fjj43fnI8YSoweC9xErWmxQyUYcov
xv+ryi+BoGyr36IbX2dng7peRzgxGadMRFwOJ0EVBw27nGZNuULwgtFSgYcCTZRY
6wJKxGX8EWpI034LVyhbrPy34cIFTSkzZCeYvENWzPNCw7y+bC7hjBewPMPDNF7U
63BEtuIczTyzgUjcav+s
=JRT5
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.7-phy' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "phy: tegra: Changes for v4.7-rc1" from Thierry Reding:
This set of patches adds support for the Tegra XUSB pad controller. The
controller provides a set of pads (lanes) that are used for I/O by other
IP blocks within Tegra SoCs (PCIe, SATA and XUSB).
* tag 'tegra-for-4.7-phy' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
phy: tegra: Add Tegra210 support
phy: Add Tegra XUSB pad controller support
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
phy: core: Allow children node to be overridden
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
settings that get lost and reset on power-domain power cycles.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJXIom/AAoJEPOmecmc0R2BB7cH/RYBFTgvgI5PKJ+JuRyJrDh6
KDVTznZ5g+F99v+0PKtkA9qpToct+4Fo08CeLZPrtLR5vp2icQtbnNgHfV6K+JZu
T1NcNHPhI7yufHIBdlvLQlH/o4uLvSYeYuoJA3LwrkI1OYrxElD46PNZEwbGkLiE
oggmef8WtsUnZIeDIM4YVzmJabw8EbSTX+L1TUxMwlOJpR/tcct0RwFDdrBf5uKn
ionob7GblnJaKg045KhjP9bSpoZrltxwjcPqAZSOF9f2waPBqBPZCiFCNUfMLru6
RzzkCm799/6eFFB7wS87S1/6vnal54BnvfZYXIgnq5yStSHYY2VZX0FDkJhEKro=
=hluQ
-----END PGP SIGNATURE-----
Merge tag 'v4.7-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Merge "Rockchip driver updates for v4.7 - part2" from Heiko Stübner:
Ability to save and restore the power-domain quality of service
settings that get lost and reset on power-domain power cycles.
* tag 'v4.7-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: power-domain: support qos save and restore
dt-bindings: modify document of Rockchip power domains
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJXMICzAAoJEGt2WQeBR3CeCD4P/A5a3DwE7hBTx3USQUAA88uC
YPEc5KbjbTqDCWNUfUy89IjrNfk8cbrdo9uJ7XgxEnIwc4Xcc7LKqYOrKCqteZ/j
JUs29VMIugTwWq53VJilK26Tjq1J3QkjIheU+roRNN65D3tBIstXh/jj1R1mSzXb
41BwUmzrVG4g1lhlwapCk8lVsZibWP/Z/jiL0yYnTkgG/Uye2J85qyO+aAt5zQyY
BvdEH4e3lHX/ttOz4lru+ojGFeHusyF3iKlNzc4KOe8DnjR1TaYNzcZVPEDYY08M
b3P252qFZflk8g5qmohjrQrdfxcnqPQjCDyxZRJsSeiLu+VELZBZeUXg146eMPUG
szEQMURMXch/1X5ekiItPSk2K8W0UdVTgZ3R2Y9KwVBqi0AWoJ5+uIgTUYNV6VbQ
4miYb9dc4yyi+JiS66mL9ax3jbTzhQt9txWAAqr+yZ48j8i1gbFxQiJB/qieuDjx
KCZeFs5mlb5y/fbbEVTGqBPC9TYx7tFE7xA/apoC6WEYdJnHQ37u5szG8+HMyQiq
N917Rcz98ya8yyCNebjmWI7g8ol6o/zz/8EdpsB+1oVgFW7rKSuUrnFbjU82nAIB
R8v7dA6C0weEy0IUJs0n+Cwq1XXfWU0gxK7eMpsaCgjnsAz8mVefB/54RRqfSaMT
ybASdWPtBM6Ab1Tv/AQ/
=XUlQ
-----END PGP SIGNATURE-----
Merge tag 'aspeed-for-4.7-arch' of https://github.com/shenki/linux into next/soc
Merge "aspeed arch tag for 4.7" from Joel Stanley <joel@jms.id.au>:
This is the initial pull request for the Aspeed BMC SoCs.
I put 4.7 in the subject for this and the subsequent requests but if it's a bit
late in the cycle then I understand.
Following review I got rid of the board file by pushing the functionality out
to a watchdog and clock driver, so it's just the Kconfig bits. I've also added
myself to maintainers for the Aspeed arch and drivers as I intend on looking
after them.
* tag 'aspeed-for-4.7-arch' of https://github.com/shenki/linux:
arm: Add Aspeed machine
Add myself as co-maintainer, update mailing list entry and add a couple
more directories.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
stale entries.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJXIzkOAAoJEGFBu2jqvgRNu0cQAJEms6hritOPJpZqEeJVKSuK
MHzoq9HhxqicN0iL6dUSiBOur84gz4wDpB9tfdkKRF80KBwxrkjqA5aOY+wRnDxs
58JCwhJVH7gwOAb48OO7xk+TaU+LCjqbiTl+81Rn9AXRnHL74mM50MizfFAuIxJo
Z2eYRC0OmLLIXPeIaxOpfCCx0tVlpHDvfrp+f+2VWzVmpVKvSFoGT0Dei+71tHqM
yC7jOpTev38Me6y+OiwLnV/F233DGuAzzYN92PzN2f/GKuMqExzcAHkCkdEU6fy/
rZcd7otq4b/BecaNOqTb1J8Ze+EvUiXYhvfrYx4Lec5KboN+R5sUUzUOO0FNbsBr
6vAjr2DzlZq0ijgvot/ggmPFu+pJBl45p/JT2IdKXdftRknEZf8dTDd+ce8nqO1M
OR/L1NneUgVKQbI4nBmJofN8L9AniJkxD+ZW4rrAN6WX2EAX1yOUSuqLi+grhAVL
ieP2cB94ERWJB94kZkDgE9BlqGJz6c1LSoqJwQVhwFWNsrH6pNhrsDx19fNe72Gx
YmIMPRVcEtWFKLcF0DE57m4QLufXRr7ha1nt+z1cPG2Rj6nKjT9IpEydbnuzOdiH
DdtC49hDAjxuqtFlpwZN42HU7S810SDvjPW1oBDa0L9F8sCnS8uVhE9ofY0cZDIt
xl/7TR+REmpjdIjsLJB0
=AKZh
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.7/doc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Merge "DaVinci documentation update for v4.7" from Sekhar Nori:
MAINTAINERS file update to fix some stale entries.
* tag 'davinci-for-v4.7/doc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
MAINTAINERS: fix stale TI DaVinci entries
- Allow TWD to be used on UP kernel, as the PREEMPT-RT and cyclictest
shows that TWD has a slightly better performance than i.MX timer.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJXKK+/AAoJEFBXWFqHsHzOJr4IAJzktSWFIAYlSPAfwh3Vpnf7
6kW2fTGN6QzRBXR20iTCBDgdhWEKRztRlIEPFQ7nae4kLmdoQZ5WNxaNNUUq2oFB
eePYpcogNebc38kfBq7Ou905UsLYloUn3TWELmhN95diMSkDctD5KfeRurRdGHsL
yszvANaHo6P4RM55SWItgGxeCK7lDaMQyWou5yWiBUgozQ5oOO8AkNv4va/5jxhw
sg8zSCRKPLEHdSowUAooQhOUrNkydbS4B9paXn5yPIbkkAu6csN8QKHynA1Vm8z/
nHy5F0srnRzprmVWs0z2+YjiMdEZj/t9NMCNk47gNrauRYosVP98wX9qoBGq93Q=
=5SG2
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Merge "The i.MX SoC updates for 4.7" from Shawn Guo":
- Allow TWD to be used on UP kernel, as the PREEMPT-RT and cyclictest
shows that TWD has a slightly better performance than i.MX timer.
* tag 'imx-soc-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: always use TWD on IMX6Q
Previously when everything happened in the set_rate callbacks itself we
needed the old_rate value for the possible rate rollback, so that made
it easy to also use it in the debug output.
Now with the param-handling being done in separate functions, reading and
recalculating the current pll rate only to use it in a debug message that
won't get displayed in regular cases anyway is quite a waste.
Therefore drop that value from the debug output. In the worst case that
previous rate will have been displayed on the rate change before.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
With the previous commit, the clock drivers now know at init time if the
GRF regmap is available. That means if it isn't available then, it also
won't become available later and we can therefore switch PLLs, that need
the GRF for the lock-status, to read-only mode - similar behaviour as the
aborting of rate changes we did before.
This saves some conditionals on every rate change and we can also drop
the rockchip_clk_get_grf function completely.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
In the distant past syscons were initialized pretty late and weren't
available at the time the clock init ran. As the GRF is mainly needed
for PLL lock-status checking, we had this lazy init that tried to grab
the syscon on PLL rate changes and denied these changes if it was not
available.
These days syscons are available very early and recent addition to
rockchip clocks, like the PLL clk_init actually also rely on them
being available at that time, so there is no need to keep that lazy
init around, as it will also result in some more simplifications in
other parts of the clock-code.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
- Clock framework cleanup with the "Remove CLK_IS_ROOT" series
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlcjaYUACgkQCwYYjhRyO9UZBgCfancMYVmODhUbS2FsaeGQqsgX
Q2EAoJuV6WkKlURVzGn3RMacRaNXwVRF
=/d5p
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-4.7-1' of git://git.infradead.org/linux-mvebu into next/soc
Merge "mvebu soc for 4.7" from Gregory CLEMENT:
- Clock framework cleanup with the "Remove CLK_IS_ROOT" series
* tag 'mvebu-soc-4.7-1' of git://git.infradead.org/linux-mvebu:
ARM: dove: Remove CLK_IS_ROOT
ARM: orion5x: Remove CLK_IS_ROOT
ARM: mv78xx0: Remove CLK_IS_ROOT
clocks to DaVinci clock framwork and are
required to support USB PHY clock setting from
USB PHY driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJXIzJyAAoJEGFBu2jqvgRNGywQAJaq3OHDj1ANi2ywu2LRqFCT
jwxDAMm5FOBueQWLyA0ZT9oKF6a0ZAAvaRPFioozx/eIHLBa2AAKUpbfbZ6DB3Hd
bF04LbCV6tkKTtGF3bOyHr/Sb+61xxJMoYpZnvqz8PlpzMqtntIKfBWqNqd/R+lz
XE7WiTHgN8nrgQLkrT3pcr3AXhygnsu6p5CyC6pqwhmfQfZLFVjgIZiwqmmTd614
HYCwiBkYQvOp6+CTlbPXWLoekunu/87KBnQa8mHiOnDz4SzM3tokSvSvDxsxOkHj
1cVYJIqP6GbxIQavqRY3BLHXnCnV+On2pkGT1H7xhnosQM5EldfJ1zRibDV75BeI
ynNYoLzStu9W7K07XoZrPHOK4cp3qvWDpYhlBVuDYFN9o5qBGq75NYDmSU2fBS64
3FaSdVEHtPlCnTSm699xoga91cwlfNqSs9gRhUzEokszrFxDONDSNgAiYs5UcI4k
9YC0gEFC6/j7dBM4YSOLtoHsF8J//Gyx47sH4zD/0YwK20zt3GL6cZ/KOXe1Ielu
6pxR0Zz3CEIlBTq59QxdSJ9lTcPMasfqJISFQyffLMLlU67gW6+b2NvGoXSIYC/u
egGsgzhFp/g0VkineTy5K2PhAQ7c8cur/DgNyJX7ftvVxw14m/TMyrPxNNrGUVem
59zpwKenUpueloJqeion
=3dg+
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v4.7/soc-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Merge "DaVinci SoC updates for v4.7 (part 2)" from Sekhar Nori:
These patches provide ability to add non-PSC
clocks to DaVinci clock framwork and are
required to support USB PHY clock setting from
USB PHY driver.
* tag 'davinci-for-v4.7/soc-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: da850: use clk->set_parent for async3
ARM: davinci: Move clock init after ioremap.
This includes a few nonfunctional clean-ups for NXP LPC32xx:
* removed leftover from restart code migration to a watchdog driver
* removed dead code leftovers from migration to CCF driver
* fix double const qualifier
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABCAAGBQJXIo/gAAoJEKo94to8JTllBewP+gKeJmKR4DBWMyISqH/ZfqHm
acpyL45BPcdmuhcUZhOyV4jxjpNDXvWkfshoAwDM87cy4qgA4UceGgdu8nfjvuF3
1DUvU4g6qbQJIp8h/uLHE4CiLhqTwuuu2i4YMbR6E+hEuWx2D7MLJQP1zqbA6d5E
rl6AX1Bf6ajN5lZq8V0KSlvgP6N0Wew1h36D5APy0MCrijS1D9cMBOue1CyDh4pP
Vfwfr3e8dMchtTQvoozoOQN1LW9xcBNkFifdzKLp+P20s5hiB+uBDkQ9VBQr3hKp
YztdKJsYcHgZqUkNM54jQ3i+xxM1Inq8IaEQbqjTJyEf4LIpTTpEn93nGG/Nx3+T
4DKc+Ce2BI74qvqwt2seeNr722ftf6kCa37JpvfusaHotELMPB0GCrONgJPS9Udk
g9zEAZrJ27zeFAfr7LA3Agywq3Lr1JhHndEodCcMxbBHY33HBFNlBqCWy8YqQyQv
IsJGF1Z91xf8WXsEIzID3tCM7nb0c4/S2IEKamQAq98HG7dXOGsAgrJqqFiJEoN0
maeLt7UPIqxORjZk0k6uYC4nE5eZSlID4jKNJF2BB2orJs00z2AC5/H4dsZ488DI
gcJd9rfIFGrzhCiFAiUnOz5CY1ZyxtCTdxvfvwIioPxy6MvizBR4G52EgyFA7rN+
d/8qYw5UCiLpf/ptDzkY
=029c
-----END PGP SIGNATURE-----
Merge tag 'lpc32xx-soc-4.7' of git://github.com/vzapolskiy/linux-lpc32xx into next/soc
Merge "NXP LPC32xx mach updates for v4.7" from Vladimir Zapolskiy:
This includes a few nonfunctional clean-ups for NXP LPC32xx:
* removed leftover from restart code migration to a watchdog driver
* removed dead code leftovers from migration to CCF driver
* fix double const qualifier
* tag 'lpc32xx-soc-4.7' of git://github.com/vzapolskiy/linux-lpc32xx:
ARM: lpc32xx: remove duplicate const on lpc32xx_auxdata_lookup
ARM: lpc32xx: remove leftovers of legacy clock source and provider drivers
ARM: lpc32xx: remove reboot header file
The change adds a list of files for maintenance under NXP LPC32xx
section, the listed files are NXP LPC32xx SoC series mach files,
DTS files of NXP LPC32xx SoC powered boards and NXP LPC32xx SoC
peripheral drivers, most of the peripheral driver file names match
'lpc32xx' pattern.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Roland Stigge added initial support of NXP LPC32xx SoC series and
first boards powered by it, but for a while since v3.18-rc1 the
SoC support is unmaintained and became stale.
Vladimir Zapolskiy and Sylvain Lemieux expressed interest in
continuation of NXP LPC32xx maintenance, reflect this in MAINTAINERS
record file for better communication with Linux kernel community.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A record of NXP LPC32xx SoC support is lost between LMxx hwmon drivers
and lockdep, rename and move it to a place where all other ARM
SoC and machines settle.
Note, NXP LPC32xx maintenance is actually about SoC series itself, SoC
peripherals and a number of machines powered by LPC32xx SoC, so while
we are here correct the title name to emphasize that the maintenance
concerns SoC support in general.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Now that we know exactly which page sizes our caller wants to use in the
given domain, we can restrict higher-order allocation attempts to just
those sizes, if any, and avoid wasting any time or effort on other sizes
which offer no benefit. In the same vein, this also lets us accommodate
a minimum order greater than 0 for special cases.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Tested-by: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Many IOMMUs support multiple page table formats, meaning that any given
domain may only support a subset of the hardware page sizes presented in
iommu_ops->pgsize_bitmap. There are also certain use-cases where the
creator of a domain may want to control which page sizes are used, for
example to force the use of hugepage mappings to reduce pagetable walk
depth.
To this end, add a per-domain pgsize_bitmap to represent the subset of
page sizes actually in use, to make it possible for domains with
different requirements to coexist.
Signed-off-by: Will Deacon <will.deacon@arm.com>
[rm: hijacked and rebased original patch with new commit message]
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
As a set of driver-provided callbacks and static data, there is no
compelling reason for struct iommu_ops to be mutable in core code, so
enforce const-ness throughout.
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
The priv field from iommu_ops is a hangover from the of_dma_configure
series and isn't actually used. Remove it before it has chance to
spread.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
When audio and music units have some quirks in their sequence of packet,
it's really hard for non-owners to identify the quirks. Although developers
need dumps for sequence of packets, it's difficult for users who have no
knowledges and no equipments for this purpose.
This commit adds tracepoints for this situation. When users encounter
the issue, they can dump a part of packet data via Linux tracing framework
as long as using drivers in ALSA firewire stack.
Additionally, tracepoints for outgoing packets will be our help to check
and debug packet processing of ALSA firewire stack.
This commit newly adds 'snd_firewire_lib' subsystem with 'in_packet' and
'out_packet' events. In the events, some attributes of packets and the
index of packet managed by this module are recorded per packet.
This is an usage:
$ trace-cmd record -e snd_firewire_lib:out_packet \
-e snd_firewire_lib:in_packet
/sys/kernel/tracing/events/snd_firewire_lib/out_packet/filter
/sys/kernel/tracing/events/snd_firewire_lib/in_packet/filter
Hit Ctrl^C to stop recording
^C
$ trace-cmd report trace.dat
...
23647.033934: in_packet: 01 4073 ffc0 ffc1 00 000f0040 9001b2d1 122 44
23647.033936: in_packet: 01 4074 ffc0 ffc1 00 000f0048 9001c83b 122 45
23647.033937: in_packet: 01 4075 ffc0 ffc1 00 000f0050 9001ffff 002 46
23647.033938: in_packet: 01 4076 ffc0 ffc1 00 000f0050 9001e1a6 122 47
23647.035426: out_packet: 01 4123 ffc1 ffc0 01 010f00d0 9001fb40 122 17
23647.035428: out_packet: 01 4124 ffc1 ffc0 01 010f00d8 9001ffff 002 18
23647.035429: out_packet: 01 4125 ffc1 ffc0 01 010f00d8 900114aa 122 19
23647.035430: out_packet: 01 4126 ffc1 ffc0 01 010f00e0 90012a15 122 20
(Here, some common fields are omitted so that a line to be within 80
characters.)
...
One line represent one packet. The legend for the last nine fields is:
- The second of cycle scheduled for the packet
- The count of cycle scheduled for the packet
- The ID of node as source (hex)
- Some devices transfer packets with invalid source node ID in their CIP
header.
- The ID of node as destination (hex)
- The value is not in CIP header of packets.
- The value of isochronous channel
- The first quadlet of CIP header (hex)
- The second quadlet of CIP header (hex)
- The number of included quadlets
- The index of packet in a buffer maintained by this module
This is an example to parse these lines from text file by Python3 script:
\#!/usr/bin/env python3
import sys
def parse_ts(second, cycle, syt):
offset = syt & 0xfff
syt >>= 12
if cycle & 0x0f > syt:
cycle += 0x10
cycle &= 0x1ff0
cycle |= syt
second += cycle // 8000
cycle %= 8000
# In CYCLE_TIMER of 1394 OHCI, second is represented in 8 bit.
second %= 128
return (second, cycle, offset)
def calc_ts(second, cycle, offset):
ts = offset
ts += cycle * 3072
# In DMA descriptor of 1394 OHCI, second is represented in 3 bit.
ts += (second % 8) * 8000 * 3072
return ts
def subtract_ts(minuend, subtrahend):
# In DMA descriptor of 1394 OHCI, second is represented in 3 bit.
if minuend < subtrahend:
minuend += 8 * 8000 * 3072
return minuend - subtrahend
if len(sys.argv) != 2:
print('At least, one argument is required for packet dump.')
sys.exit()
filename = sys.argv[1]
data = []
prev = 0
with open(filename, 'r') as f:
for line in f:
pos = line.find('packet:')
if pos < 0:
continue
pos += len('packet:')
line = line[pos:].strip()
fields = line.split(' ')
datum = []
datum.append(fields[8])
syt = int(fields[6][4:], 16)
# Empty packet in IEC 61883-1, or NODATA in IEC 61883-6
if syt == 0xffff:
data_blocks = 0
else:
payload_size = int(fields[7], 10)
data_block_size = int(fields[5][2:4], 16)
data_blocks = (payload_size - 2) / data_block_size
datum.append(data_blocks)
second = int(fields[0], 10)
cycle = int(fields[1], 10)
start = (second << 25) | (cycle << 12)
datum.append('0x{0:08x}'.format(start))
start = calc_ts(second, cycle, 0)
datum.append("0x" + fields[5])
datum.append("0x" + fields[6])
if syt == 0xffff:
second = 0
cycle = 0
tick = 0
else:
second, cycle, tick = parse_ts(second, cycle, syt)
ts = calc_ts(second, cycle, tick)
datum.append(start)
datum.append(ts)
if ts == 0:
datum.append(0)
datum.append(0)
else:
# Usual case, or a case over 8 seconds.
if ts > start or start > 7 * 8000 * 3072:
datum.append(subtract_ts(ts, start))
if ts > prev or start > 7 * 8000 * 3072:
gap = subtract_ts(ts, prev)
datum.append(gap)
else:
datum.append('backward')
else:
datum.append('invalid')
prev = ts
data.append(datum)
sys.exit()
The data variable includes array with these elements:
- The index of the packet
- The number of data blocks in the packet
- The value of cycle count (hex)
- The value of CIP header 1 (hex)
- The value of CIP header 2 (hex)
- The value of cycle count (tick)
- The value of calculated presentation timestamp (tick)
- The offset between the cycle count and presentation timestamp
- The elapsed ticks from the previous presentation timestamp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
In callback function of isochronous context, modules can queue packets to
indicated isochronous cycles. Although the cycle to queue a packet is
deterministic by calculation, this module doesn't implement the calculation
because it's useless for processing.
In future, the cycle count is going to be printed with the other parameters
for debugging. This commit is the preparation. The cycle count is computed
by cycle unit, and correctly arranged to corresponding packets. The
calculated count is used in later commit.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
In callback function of isochronous context, u32 variable is passed for
cycle count. The value of this variable comes from DMA descriptors of 1394
Open Host Controller Interface (1394 OHCI). In the specification, DMA
descriptors transport lower 3 bits for second field and full cycle field in
16 bits field, therefore 16 bits of the u32 variable are available. The
value for second is modulo 8, and the value for cycle is modulo 8,000.
Currently, ALSA firewire-lib module don't use the value of the second
field, because the value is useless to calculate presentation timestamp in
IEC 61883-6. However, the value may be useful for debugging. In later
commit, it will be printed with the other parameters for debugging.
This commit makes this module to handle the whole cycle count including
second. The value is calculated by cycle unit. The existed code is already
written with ignoring the value of second, thus this commit causes no
issues.
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Signed-off-by: Takashi Iwai <tiwai@suse.de>