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691,473 commits

Author SHA1 Message Date
Darren Etheridge
b62222fcaa drm/tilcdc: make frame_done interrupt active at all times
The frame_done interrupt was only being enabled when the vsync
interrupts were being enabled by DRM.  However the frame_done is
used to determine if the LCD controller has successfully completed
the raster_enable, raster_disable commands and the vsync interrupts
are not always enabled during these operations.

Signed-off-by: Darren Etheridge <detheridge@ti.com>
Tested-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-02-25 16:39:31 +02:00
Darren Etheridge
85fd27f80b drm/tilcdc: fix kernel panic on suspend when no hdmi monitor connected
On BeagleBone Black if no HDMI monitor is connected and suspend
is requested a kernel panic will result:

root@am335x-evm:~# echo mem > /sys/power/state
[ 65.548710] PM: Syncing filesystems ... done.
[ 65.631311] Freezing user space processes ... (elapsed 0.006 seconds) done.
[ 65.648619] Freezing remaining freezable tasks ... (elapsed 0.005 seconds) done.
[ 65.833500] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa30e004
[ 65.841692] Internal error: : 1028 [#1] SMP ARM
  <snip>
[ 66.105287] [<c03765f0>] (platform_pm_suspend) from [<c037b6d4>] (dpm_run_callback+0x34/0x70)
[ 66.114370] [<c037b6d4>] (dpm_run_callback) from [<c037ba84>] (__device_suspend+0x10c/0x2f4)
[ 66.123357] [<c037ba84>] (__device_suspend) from [<c037d004>] (dpm_suspend+0x58/0x218)
[ 66.131796] [<c037d004>] (dpm_suspend) from [<c008d948>] (suspend_devices_and_enter+0x9c/0x3c0)
[ 66.141055] [<c008d948>] (suspend_devices_and_enter) from [<c008de7c>] (pm_suspend+0x210/0x24c)
[ 66.150312] [<c008de7c>] (pm_suspend) from [<c008cabc>] (state_store+0x68/0xb8)
[ 66.158103] [<c008cabc>] (state_store) from [<c02e9654>] (kobj_attr_store+0x14/0x20)
[ 66.166355] [<c02e9654>] (kobj_attr_store) from [<c0185c70>] (sysfs_kf_write+0x4c/0x50)
[ 66.174883] [<c0185c70>] (sysfs_kf_write) from [<c018926c>] (kernfs_fop_write+0xb4/0x150)
[ 66.183598] [<c018926c>] (kernfs_fop_write) from [<c0122638>] (vfs_write+0xa8/0x180)
[ 66.191846] [<c0122638>] (vfs_write) from [<c01229f8>] (SyS_write+0x40/0x8c)
[ 66.199365] [<c01229f8>] (SyS_write) from [<c000e580>] (ret_fast_syscall+0x0/0x48)
[ 66.207426] Code: e595c210 e5932000 e59cc000 e08c2002 (e592c000)

This is because the lcdc module is not enabled when no monitor is detected
to save power.  However the suspend handler just blindly tries to save the
lcdc state by copying out the pertinent registers. However module is off
so no good things happen when you try and access it.

This patch only saves off the registers if the module is enabled, and
then only restores the registers on resume if they were saved off during
suspend.

Signed-off-by: Darren Etheridge <detheridge@ti.com>
Tested-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-02-25 16:39:31 +02:00
Dave Gerlach
416a07fbe7 drm/tilcdc: adopt pinctrl support
Update tilcdc driver to set the state of the pins to:
- "default on resume
- "sleep" on suspend

By optionally putting the pins into sleep state in the suspend callback
we can accomplish two things.
- minimize current leakage from pins and thus save power,
- prevent the IP from driving pins output in an uncontrolled manner,
which may happen if the power domain drops the domain regulator.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-02-25 16:39:30 +02:00
Tomi Valkeinen
6f206e9d2a drm/tilcdc: verify fb pitch
LCDC hardware does not support fb pitch that is different (i.e. larger)
than the screen size. The driver currently does no checks for this, and
the results of too big pitch are are flickering and lower fps.

This issue easily happens when using libdrm's modetest tool with non-32
bpp modes. As modetest always allocated 4 bytes per pixel, it implies a
bigger pitch for 16 or 24 bpp modes.

This patch adds a check to reject pitches the hardware cannot support.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
2016-02-25 16:39:29 +02:00
Darren Etheridge
3d19306a82 drm/tilcdc: rewrite pixel clock calculation
Updating the tilcdc DRM driver code to calculate the LCD controller
pixel clock more accurately. Based on a suggested implementation by
Tomi Valkeinen.

The current code does not work correctly and produces wrong results
with many requested clock rates. It also oddly uses two different
clocks, a display pll clock and a divider clock (child of display
pll), instead of just using the clock coming to the lcdc.

This patch removes the use of the display pll clock, and rewrites the
code to calculate the clock rates. The idea is simply to request a
clock rate of pixelclock*2, as the LCD controller has an internal
divider which we set to 2.

Signed-off-by: Darren Etheridge <detheridge@ti.com>
[Rewrapped description]
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-02-25 16:39:28 +02:00
Arnd Bergmann
60f2395231 ARM: mvebu: mark mvebu_hwcc_pci_nb as __maybe_unused
The coherency notifier block is only used when CONFIG_PCI
is enabled, otherwise we get a warning:

arch/arm/mach-mvebu/coherency.c:110:30: warning: 'mvebu_hwcc_pci_nb' defined but not used [-Wunused-variable]

There is no nice way to use an if(IS_ENABLED()) check here to
let the compiler know that it might be used, so let's mark
the structure as __maybe_unused.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-25 15:39:20 +01:00
Arnd Bergmann
d3201ede94 ARM: mv78xx0: avoid unused function warning
mv78xx0 produces a harmless warning when CONFIG_CACHE_FEROCEON_L2 is
disabled:

arch/arm/mach-mv78xx0/common.c:385:19: warning: 'is_l2_writethrough' defined but not used [-Wunused-function]

This avoids the warning by changing the #ifdef to an if(IS_ENABLED())
check with the same resulting object code.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-25 15:38:38 +01:00
Arnd Bergmann
993e221518 ARM: orion: only select I2C_BOARDINFO when using I2C
If we select I2C_BOARDINFO and I2C is disabled, we get a
harmless Kconfig warning:

warning: (MACH_DOVE_DB && MACH_DB88F5281 && MACH_RD88F5182 && MACH_RD88F5182_DT && MACH_KUROBOX_PRO && MACH_DNS323 && MACH_LINKSTATION_PRO && MACH_LINKSTATION_LSCHL && MACH_LINKSTATION_LS_HGL && MACH_NET2BIG) selects I2C_BOARDINFO which has unmet direct dependencies (I2C)

Making the select itself conditional avoids the warning and
makes the kernel slightly smaller as the compiler will be
able to drop the unused board info.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2016-02-25 15:37:16 +01:00
Marek Szyprowski
5fa61cbff1 iommu/exynos: Support multiple attach_device calls
IOMMU core calls attach_device callback without detaching device from
the previous domain. This patch adds support for such unballanced calls.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:11 +01:00
Marek Szyprowski
9b93a409fd iommu/exynos: Add Maintainers entry for Exynos SYSMMU driver
Add Marek Szyprowski as maintainer for Exynos IOMMU driver.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:10 +01:00
Marek Szyprowski
740a01eee9 iommu/exynos: Add support for v5 SYSMMU
This patch adds support for v5 of SYSMMU controller, found in Samsung
Exynos 5433 SoCs. The main difference of v5 is support for 36-bit physical
address space and some changes in register layout and core clocks hanging.
This patch also adds support for ARM64 architecture, which is used by
Exynos 5433 SoCs.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:10 +01:00
Marek Szyprowski
e6802707fb iommu/exynos: Update device tree documentation
Exynos SYSMMU bindings documentation was merged before generic IOMMU
binding have been introduced. This patch updates documentation to match
current state.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:10 +01:00
Marek Szyprowski
850d313e2e iommu/exynos: Add support for SYSMMU controller with bogus version reg
SYSMMU on some SoCs reports bogus values in VERSION register. Force
hardware version to 1.0 for such controllers. This patch also moves reading
version register to driver's probe() function.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:10 +01:00
Marek Szyprowski
d631ea9809 iommu/exynos: Unify code for fldp cache invalidation
This patch simplifies the code for handling of flpdcache invalidation.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:10 +01:00
Marek Szyprowski
83addecdb7 iommu/exynos: Refactor init config code
This patch rewrites sysmmu_init_config function to make it easier to read
and understand.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:10 +01:00
Marek Szyprowski
d093fc7e83 iommu/exynos: Refactor fault handling code
This patch provides a new implementation for page fault handing code. The
new implementation is ready for future extensions. No functional changes
have been made.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:09 +01:00
Marek Szyprowski
02cdc365cf iommu/exynos: Refactor code (no direct register access)
This patch changes some internal functions to have access to the state of
sysmmu device instead of having only it's registers. This will make the
code ready for future extensions.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:09 +01:00
Marek Szyprowski
b398af2169 iommu/exynos: Simplify master clock operations
All clock API function can be called on NULL clock, so simplify code avoid
checking of master clock presence.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:09 +01:00
Marek Szyprowski
5e3435eb7e iommu/exynos: Remove ARM-specific cache flush interface
This patch replaces custom ARM-specific code for performing CPU cache flush
operations with generic code based on DMA-mapping. Domain managing code
is independent of particular SYSMMU device, so the first registered SYSMMU
device is used for DMA-mapping calls. This simplification works fine
because all SYSMMU controllers are in the same address space (where
DMA address equals physical address) and the DMA-mapping calls are done
mainly to flush CPU cache to make changes visible to SYSMMU controllers.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:09 +01:00
Marek Szyprowski
58c6f6a3dc iommu/exynos: Add support for IOMMU_DOMAIN_DMA domain type
This patch adds support for DMA domain type. Such domain have DMA cookie
prepared and can be used by generic DMA-IOMMU glue layer.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:09 +01:00
Marek Szyprowski
6c2ae7e291 iommu/exynos: Rework iommu group initialization
This patch replaces custom code in add_device implementation with
iommu_group_get_for_dev() call and provides the needed callback.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 15:32:08 +01:00
Axel Lin
ea04a7cae3 gpio: pisosr: Use gpiod_set_value_cansleep in pisosr_gpio_refresh()
This driver has .can_sleep flag set.
So the pisosr_gpio_get() can be called from contexts that can sleep.
Thus use the cansleep() variant in pisosr_gpio_refresh().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-25 15:20:46 +01:00
Axel Lin
21d08ab9c9 gpio: pisosr: Use devm_gpiod_get_optional for gpio->load_gpio
gpio->load_gpio is optional, so use devm_gpiod_get_optional instead.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-25 15:20:46 +01:00
Andrzej Hajda
d34607d11d gpio: xgene: fix type of variable containing error codes
ret variable can contain error values and is compared with zero.
Its type must be signed.

The problem has been detected using coccinelle script
scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-25 15:20:45 +01:00
Simon Horman
2af66e1dec gpio: rcar: Use ARCH_RENESAS
Make use of ARCH_RENESAS in place of ARCH_SHMOBILE.

This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-25 15:20:45 +01:00
Axel Lin
22d4ca3522 gpio: ts4800: Drop redundant code to set already initialized gpio_chip fields
Both chip->base and chip->label are correctly set by bgpio_init().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Tested-by: Julien Grossholtz <julien.grossholtz@savoirfairelinux.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-25 15:20:44 +01:00
Axel Lin
b178e7ead0 gpio: brcmstb: Use list_for_each_entry at appropriate places
Use list_for_each_entry to simplify the code a bit.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-25 15:20:43 +01:00
Axel Lin
f0d3c72ccb gpio: ath79: Check valid gpio count for both DT and non-DT cases
Move the code checking valid gpio count to cover both DT and non-DT cases.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-25 15:20:43 +01:00
Maarten Lankhorst
e8861675c5 drm/i915: Kill off intel_crtc->atomic.wait_vblank, v6.
Currently we perform our own wait in post_plane_update,
but the atomic core performs another one in wait_for_vblanks.
This means that 2 vblanks are done when a fb is changed,
which is a bit overkill.

Merge them by creating a helper function that takes a crtc mask
for the planes to wait on.

The broadwell vblank workaround may look gone entirely but this is
not the case. pipe_config->wm_changed is set to true
when any plane is turned on, which forces a vblank wait.

Changes since v1:
- Removing the double vblank wait on broadwell moved to its own commit.
Changes since v2:
- Move out POWER_DOMAIN_MODESET handling to its own commit.
Changes since v3:
- Do not wait for vblank on legacy cursor updates. (Ville)
- Move broadwell vblank workaround comment to page_flip_finished. (Ville)
Changes since v4:
- Compile fix, legacy_cursor_flip -> *_update.
Changes since v5:
- Kill brackets.
- Add WARN_ON when wait_for_vblanks fails.
- Remove extra newlines.
- Split the checks whether vblank is needed to a separate function,
  with comments why a vblank is needed.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/56CD84DA.5030507@linux.intel.com
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2016-02-25 15:16:22 +01:00
Yoshihiro Shimoda
06bfcaa91f iommu: Fix second argument of trace_map() to report correct paddr
Since iommu_map() code added pgsize value to the paddr, trace_map()
used wrong paddr. So, this patch adds "orig_paddr" value in the
iommu_map() to use for the trace_map().

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
2016-02-25 14:57:22 +01:00
Arnaldo Carvalho de Melo
bb109acc4a perf tools: Fix parsing of pmu events with empty list of modifiers
In 1d55e8ef34 ("perf tools: Introduce opt_event_config nonterminal") I
removed the unconditional "'/' '/'" for pmu events such as
"intel_pt//" but forgot to use opt_event_config where it expected some
event_config, oops. Fix it.

Noticed when trying to use:

  # perf record -e intel_pt// -a sleep 1
  event syntax error: 'intel_pt//'
                               \___ parser error
  Run 'perf list' for a list of valid events

   Usage: perf record [<options>] [<command>]
      or: perf record [<options>] -- <command> [<options>]

      -e, --event <event>   event selector. use 'perf list' to list available events
  #

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Wang Nan <wangnan0@huawei.com>
Fixes: 1d55e8ef34 ("perf tools: Introduce opt_event_config nonterminal")
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-02-25 10:56:21 -03:00
Stephane Eranian
7e9551bc72 perf jvmti: improve error message in Makefile
This patch improves the error message given by jvmti Makefile when the
alternatives command cannot be found. It now suggests the user locates
the root of their Java installation and pass it with JDIR=

Signed-off-by: Stephane Eranian <eranian@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1456378056-18812-1-git-send-email-eranian@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-02-25 10:43:28 -03:00
Takashi Iwai
f883982dc1 ALSA: hda - Fix headset support and noise on HP EliteBook 755 G2
HP EliteBook 755 G2 with ALC3228 (ALC280) codec [103c:221c] requires
the known fixup (ALC269_FIXUP_HEADSET_MIC) for making the headset mic
working.  Also, it suffers from the loopback noise problem, so we
should disable aamix path as well.

Reported-by: Derick Eddington <derick.eddington@gmail.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2016-02-25 14:36:08 +01:00
Viresh Kumar
07f101d33d clockevents/drivers/exynos_mct: Implement ->set_state_oneshot_stopped()
set_state_oneshot_stopped() is called by the clkevt core, when the next
event is required at an expiry time of 'KTIME_MAX'. This normally
happens with NO_HZ_{IDLE|FULL} in both LOWRES/HIGHRES modes.

This patch makes the clockevent device to stop on such an event, to
avoid spurious interrupts, as explained by: commit 8fff52fd50
("clockevents: Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state").

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:34:08 +01:00
Viresh Kumar
3effa3ceea clockevents/drivers/arm_global_timer: Implement ->set_state_oneshot_stopped()
set_state_oneshot_stopped() is called by the clkevt core, when the next
event is required at an expiry time of 'KTIME_MAX'. This normally
happens with NO_HZ_{IDLE|FULL} in both LOWRES/HIGHRES modes.

This patch makes the clockevent device to stop on such an event, to
avoid spurious interrupts, as explained by: commit 8fff52fd50
("clockevents: Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state").

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:34:06 +01:00
Viresh Kumar
cf8c5009ee clockevents/drivers/arm_arch_timer: Implement ->set_state_oneshot_stopped()
set_state_oneshot_stopped() is called by the clkevt core, when the next
event is required at an expiry time of 'KTIME_MAX'. This normally
happens with NO_HZ_{IDLE|FULL} in both LOWRES/HIGHRES modes.

This patch makes the clockevent device to stop on such an event, to
avoid spurious interrupts, as explained by: commit 8fff52fd50
("clockevents: Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state").

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:34:05 +01:00
Rabin Vincent
bbaa067027 clocksource/drivers/arm_global_timer: Register delay timer
Provide a delay timer using the lower 32-bits of the global timer so
that we can use that instead of having to calibrating delays.

Signed-off-by: Rabin Vincent <rabin.vincent@axis.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:34:04 +01:00
Ezequiel Garcia
1b18fd2023 clocksource/drivers/lpc32xx: Support timer-based ARM delay
This commit implements the ARM timer-based delay timer for the
LPC32xx, LPC18xx, LPC43xx family of SoCs.

Also, add a dependency to restrict compiling this driver for
the ARM architecture.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Joachim Eastwood <manabian@gmail.com>
2016-02-25 14:33:58 +01:00
Ezequiel Garcia
32f32d982f clocksource/drivers/lpc32xx: Support periodic mode
This commit adds the support for periodic mode. This is done by not
setting the MR0S (Stop on TnMR0) bit on MCR, thus allowing
interrupts to be periodically generated on MR0 matches.

In order to do this, move the initial configuration that is specific to
the one-shot mode to set_state_oneshot().

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Joachim Eastwood <manabian@gmail.com>
2016-02-25 14:30:20 +01:00
Ezequiel Garcia
751db1a6ea clocksource/drivers/lpc32xx: Don't use the prescaler counter for clockevents
This commit switches the clockevents one-shot current implementation
to avoid using the prescaler counter. The clockevents timer currently
uses MR0=1, PR=ticks; and after this commit is uses MR0=ticks, PR=0.

While using the prescaler with PR=1 works fine in one-shot mode,
it seems it doesn't work as expected in periodic mode.

By using the only match channel register (MR0) for the timer we make
the periodic mode introduction easier, and consistent with one-shot mode.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Joachim Eastwood <manabian@gmail.com>
Tested-by: Joachim Eastwood <manabian@gmail.com>
2016-02-25 14:30:19 +01:00
Shawn Lin
522ed95c26 clocksource/drivers/rockchip: Add err handle for rk_timer_init
Currently rockchip_timer doesn't do some basic cleanup work when
failing to init the timer. Let's add err handle routine to deal
with all the err cases.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:30:17 +01:00
Robin Murphy
e392d603f6 clocksource/drivers/arm_arch_timer: Enable and verify MMIO access
So far, we have been blindly assuming that having access to a
memory-mapped timer frame implies that the individual elements of that
frame frame are already enabled. Whilst it's the firmware's job to give
us non-secure access to frames in the first place, we should not rely
on implementations always being generous enough to also configure CNTACR
for those non-secure frames (e.g. [1]).

Explicitly enable feature-level access per-frame, and verify that the
access we want is really implemented before trying to make use of it.

[1]:https://github.com/ARM-software/tf-issues/issues/170

Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-02-25 14:30:15 +01:00
Joerg Roedel
28f6915447 Merge branch 'for-joerg/io-pgtable' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into arm/io-pgtable 2016-02-25 14:23:58 +01:00
Linus Walleij
725e3b7d40 Merge branch 'devm_gpiochip' of https://github.com/ldewangan/linux-upstream into devm-gpiochip-add-data 2016-02-25 14:22:10 +01:00
Kefeng Wang
c966f0521d arm64: defconfig: Enable DesignWare APB GPIO controller
The Synopsys DesignWare APB GPIO controller is used by several vender's socs,
like apm/marvell/altera/hisilicon, enable it by default.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-02-25 21:21:26 +08:00
Axel Lin
ea1361fd5f gpio: pisosr: Use devm_gpiod_get_optional for gpio->load_gpio
gpio->load_gpio is optional, so use devm_gpiod_get_optional instead.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-25 14:16:57 +01:00
Kefeng Wang
82a14b1e95 arm64: dts: hip05: Append power button node for D02 board
This patch adds poweroff button device node to support
poweroff feature on hip05 d02 board.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-02-25 21:15:58 +08:00
Kefeng Wang
8f41d122bf arm64: dts: hip05: Append gpio nodes
There are two dw GPIO controllers in hip05 peri sub, this patch
adds the corresponding device tree nodes.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-02-25 21:15:58 +08:00
Kefeng Wang
abf9c25d55 arm64: dts: hip05: Append all gicv3 ITS entries
There are four subsystems in hip05 soc, peri/m3/pcie/dsa,
each subsystem has one its, append them under gicv3 node.

They will be used by hisilicon mbigen.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-02-25 21:15:58 +08:00
Kefeng Wang
6897db62bb arm64: dts: hip05: Use Cortex specific device node for pmu
Instead of using the generic armv8-pmuv3 compatibility, use
the more specific Cortex A57 compatibility.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2016-02-25 21:15:58 +08:00