Commit graph

691,473 commits

Author SHA1 Message Date
Nicolas Pitre
8d43b49e7e hid-sensor-hub.c: fix wrong do_div() usage
do_div() must only be used with a u64 dividend.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2015-11-16 12:39:55 -05:00
Julia Lawall
93189ea425 ASoC: Intel: constify sst_block_ops structures
The sst_block_ops structure is never modified, and is thus declared as
const.

Done with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Acked-by: Jie Yang <yang.jie@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16 17:38:54 +00:00
John Lin
0580bcc91d ASoC: rt5645: Add struct dmi_system_id "Google Edgar" for Chrome OS
Add platform specific data for Edgar project.

Signed-off-by: John Lin <john.lin@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16 17:38:33 +00:00
Sugar Zhang
7fd9093a75 ASoC: rockchip: add playback property
rockchip,playback-channels: max playback channels, 8 channels default.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16 17:38:05 +00:00
Sugar Zhang
c4f9374ddc ASoC: rockchip: i2s: compatible with different chips
there maybe more than one i2s module inside chip, and these i2s modules
have different channels features.

for example: there are 3 i2s in rk3066, one support 8 channels playback
and 2 channels capture, but the others only support 2 channels playback
and 2 channels capture.

in order to compatible with these various chips, we add playback and
capture property to specify these values.

there are default channels configuration in driver: 8 channels playback
and 2 channels capture. if not add property, we use the default values.

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16 17:38:05 +00:00
Nicolas Pitre
3db14288bc ti/fapll: fix wrong do_div() usage
do_div() is meant to be used with an unsigned dividend.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2015-11-16 12:37:55 -05:00
Nicolas Pitre
e55791883f ti/clkt_dpll: fix wrong do_div() usage
do_div() is meant to be used with an unsigned dividend.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2015-11-16 12:37:55 -05:00
Nicolas Pitre
3ed9c82437 tegra/clk-divider: fix wrong do_div() usage
do_div() is meant to be used with an unsigned dividend.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2015-11-16 12:37:55 -05:00
Nicolas Pitre
4471f9a4db imx/clk-pllv2: fix wrong do_div() usage
do_div() is meant to be used with an unsigned dividend.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2015-11-16 12:37:54 -05:00
Nicolas Pitre
6a0078c852 imx/clk-pllv1: fix wrong do_div() usage
do_div() is meant to be used with an unsigned dividend.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2015-11-16 12:37:54 -05:00
Nicolas Pitre
8cb87c0407 nouveau/nvkm/subdev/clk/gk20a.c: fix wrong do_div() usage
do_div() must only be used with a u64 dividend.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
2015-11-16 12:37:54 -05:00
Bard Liao
49abc6cd58 ASoC: rt5645: Separate regmap for rt5645 and rt5650
rt5645.c support both rt5645 and rt5650 codec. And the default
value of registers are not identical. So we use different regmap
for the two codecs.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-16 17:37:10 +00:00
Sachin Pandhare
e9f96bc53c ASoC: wm8962: correct addresses for HPF_C_0/1
From datasheet:
R17408 (4400h) HPF_C_1
R17409 (4401h) HPF_C_0
17048 -> 17408 (0x4400)
17049 -> 17409 (0x4401)

Signed-off-by: Sachin Pandhare <sachinpandhare@gmail.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
2015-11-16 17:36:20 +00:00
Bjørn Mork
59536da345 USB: qcserial: Fix support for HP lt4112 LTE/HSPA+ Gobi 4G Modem
The DEVICE_HWI type was added under the faulty assumption that Huawei
devices based on Qualcomm chipsets and firmware use the static USB
interface numbering known from Gobi devices.  But this model does
not apply to Huawei devices like the HP branded lt4112 (Huawei me906e).
Huawei firmwares will dynamically assign interface numbers. Functions
are renumbered when the firmware is reconfigured.

Fix by changing the DEVICE_HWI type to use a simplified version
of Huawei's subclass + protocol scheme: Blacklisting known network
interface combinations and assuming the rest are serial.

Reported-and-tested-by: Muri Nicanor <muri+libqmi@immerda.ch>
Tested-by: Martin Hauke <mardnh@gmx.de>
Cc: <stable@vger.kernel.org>
Fixes: e7181d005e ("USB: qcserial: Add support for HP lt4112 LTE/HSPA+ Gobi 4G Modem")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: Johan Hovold <johan@kernel.org>
2015-11-16 18:29:07 +01:00
Simon Horman
9b5ba0df4e ARM: shmobile: Introduce ARCH_RENESAS
The purpose of this patch is to start the process of replacing both
ARCH_SHMOBILE and ARCH_SHMOBILE_MULTI with ARCH_RENESAS.

RENESAS seems to be a more appropriate name than SHMOBILE for the majority
of Renesas 32-bit ARM based SoCs. The name is conveniently also (newer)
ARM64 based SoCs.

This patches only addresses 32-bit ARM based SoCs.  Proposed support for
the ARM64 based r8a7795 SoC already uses ARCH_RENESAS which selects
ARCH_SHMOBILE.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 02:15:55 +09:00
Simon Horman
804b0d7011 MAINTAINERS: Remove link to oss.renesas.com which is closed
There doesn't seem much value in keeping this link listed
in the MAINTAINERS file any more.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 02:15:55 +09:00
Geert Uytterhoeven
0ba58de231 drivers: sh: Get rid of CONFIG_ARCH_SHMOBILE_MULTI
Shmobile is all multiplatform these days, so get rid of the reference to
CONFIG_ARCH_SHMOBILE_MULTI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-17 02:12:46 +09:00
Drew Richardson
9e9caa6a49 arm64: perf: Add event descriptions
Add additional information about the ARM architected hardware events
to make counters self describing. This makes the hardware PMUs easier
to use as perf list contains possible events instead of users having
to refer to documentation like the ARM TRMs.

Signed-off-by: Drew Richardson <drew.richardson@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-11-16 17:09:02 +00:00
Drew Richardson
90381cba64 arm64: perf: Convert event enums to #defines
The enums are not necessary and this allows the event values to be
used to construct static strings at compile time.

Signed-off-by: Drew Richardson <drew.richardson@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-11-16 17:09:02 +00:00
Sudeep Holla
a946e8c717 genirq: Delay incrementing interrupt count if it's disabled/pending
In case of a wakeup interrupt, irq_pm_check_wakeup disables the interrupt
and marks it pending and suspended, disables it and notifies the pm core
about the wake event. The interrupt gets handled later once the system
is resumed.

However the irq stats is updated twice: once when it's disabled waiting
for the system to resume and later when it's handled, resulting in wrong
counting of the wakeup interrupt when waking up the system.

This patch updates the interrupt count so that it's updated only when
the interrupt gets handled. It's already handled correctly in
handle_edge_irq and handle_edge_eoi_irq.

Reported-by: Manoil Claudiu <claudiu.manoil@freescale.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Link: http://lkml.kernel.org/r/1446661957-1019-1-git-send-email-sudeep.holla@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-11-16 17:55:55 +01:00
Dan Williams
f46c4bd16e ahci: kill 'intr_status'
This field in achi_port_priv was only used to support threaded
interrupts.  Now that we are hardirq only it can be deleted.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16 11:30:12 -05:00
Dan Williams
a6b7fb764e ahci: switch from 'threaded' to 'hardirq' interrupt handling
For high frequency I/O the overhead of threaded interrupts impacts
performance.  A quick out-of-the-box test (i.e. no affinity tuning)
shows ~10% random read performance at ~20% less cpu.  The cpu wins
appear to be from reduced lock contention.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16 11:29:10 -05:00
Dan Williams
d684a90d38 ahci: per-port msix support
Some AHCI controllers support per-port MSI-X vectors.  At the same time
the Linux AHCI driver needs to support one-off architectures that
implement a single MSI-X vector for all ports.  The heuristic for
enabling AHCI ports becomes, in order of preference:

1/ per-port multi-MSI-X

2/ per-port multi-MSI

3/ single MSI

4/ single MSI-X

5/ legacy INTX

This all depends on AHCI implementations with potentially broken MSI-X
requesting less vectors than the number of ports.  If this assumption is
violated we will need to start explicitly white-listing AHCI-MSIX
implementations.

Reported-by: Ricardo Neri <ricardo.neri@intel.com>
[ricardo: fix struct msix_entry handling]
Reported-by: kernel test robot <ying.huang@linux.intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16 11:29:10 -05:00
Al Viro
555fa0fa61 fs: out of bounds on stack in iov_iter_advance
On Wed, Nov 11, 2015 at 10:19:48AM +0000, Al Viro wrote:

> I'll cook the minimal fixup for API change after I get some sleep and
> send it your way, unless somebody gets there first...

This should do it - switches ->ioctl() to pvfs2_inode_[gs]etxattr() and
converts xattr_handler ->[gs]et() to new API.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Mike Marshall <hubcap@omnibond.com>
2015-11-16 11:27:24 -05:00
Alexandra Yates
4d92f0099a ahci: Order SATA device IDs for codename Lewisburg
This change was to preserve the ascending order of device IDs.
There was an exception with the first two Lewisburg device IDs to
keep all device IDs of the same kind grouped by code name.

Signed-off-by: Alexandra Yates <alexandra.yates@linux.intel.com>
signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16 11:22:16 -05:00
Charles_Rose@Dell.com
c5967b79ec ahci: Add Device ID for Intel Sunrise Point PCH
This patch adds missing AHCI RAID SATA Device IDs for the Intel Sunrise
Point PCH.

Signed-off-by: Nanda Kishore Chinna <nanda_kishore_chinna@dell.com>
Signed-off-by: Charles Rose <charles_rose@dell.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-11-16 11:19:59 -05:00
Aaro Koskinen
2c2025b41a usb: phy: omap-otg: fix uninitialized pointer
otg_dev->extcon was referenced before otg_dev was initialized. Fix.

Cc: <stable@vger.kernel.org> # v4.3
Fixes: a2fd242324 ("usb: phy: omap-otg: Replace deprecated API of extcon")
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-16 10:17:40 -06:00
Uwe Kleine-König
705e63d2b2 usb: musb: core: fix order of arguments to ulpi write callback
There is a bit of a mess in the order of arguments to the ulpi write
callback. There is

	int ulpi_write(struct ulpi *ulpi, u8 addr, u8 val)

in drivers/usb/common/ulpi.c;

	struct usb_phy_io_ops {
		...
		int (*write)(struct usb_phy *x, u32 val, u32 reg);
	}

in include/linux/usb/phy.h.

The callback registered by the musb driver has to comply to the latter,
but up to now had "offset" first which effectively made the function
broken for correct users. So flip the order and while at it also
switch to the parameter names of struct usb_phy_io_ops's write.

Fixes: ffb865b1e4 ("usb: musb: add ulpi access operations")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-16 10:15:42 -06:00
Tejun Heo
6c2920926b cgroup: replace unified-hierarchy.txt with a proper cgroup v2 documentation
Now that cgroup v2 is almost out of the door, replace the development
documentation unified-hierarchy.txt with Documentation/cgroup.txt
which is a superset of unified-hierarchy.txt and authoritatively
describes all userland-visible aspects of cgroup.

v2: Updated to include all information from blkio-controller.txt and
    list filesystems which support cgroup writeback as suggested by
    Vivek.

Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Li Zefan <lizefan@huawei.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
2015-11-16 11:13:34 -05:00
Tejun Heo
0d94276645 cgroup: rename Documentation/cgroups/ to Documentation/cgroup-legacy/
In preparation for adding cgroup2 documentation, rename
Documentation/cgroups/ to Documentation/cgroup-legacy/.

Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Li Zefan <lizefan@huawei.com>
2015-11-16 11:13:34 -05:00
Tejun Heo
67e9c74b8a cgroup: replace __DEVEL__sane_behavior with cgroup2 fs type
With major controllers - cpu, memory and io - shaping up for the
unified hierarchy, cgroup2 is about ready to be, gradually, released
into the wild.  Replace __DEVEL__sane_behavior flag which was used to
select the unified hierarchy with a separate filesystem type "cgroup2"
so that unified hierarchy can be mounted as follows.

  mount -t cgroup2 none $MOUNT_POINT

The cgroup2 fs has its own magic number - 0x63677270 ("cgrp").

v2: Assign a different magic number to cgroup2 fs.

Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Li Zefan <lizefan@huawei.com>
Cc: Johannes Weiner <hannes@cmpxchg.org>
2015-11-16 11:13:34 -05:00
Heikki Krogerus
b4c580a43d usb: dwc3: pci: add support for Intel Broxton SOC
PCI IDs for Broxton based platforms.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-11-16 10:12:29 -06:00
Chunming Zhou
43c27fb5c2 drm/amdgpu: update pd while updating vm as well
Change-Id: I93a861cd6707f7d91672b9e19757cc50008cd7a2
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 11:06:00 -05:00
Christian König
5d82730af7 drm/amdgpu: fix handling order in scheduler CS
We need to clear parser.ibs and num_ibs before amd_sched_fence_create,
otherwise the IB could be freed twice if fence creates fails.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-16 11:05:59 -05:00
Christian König
e284022163 drm/amdgpu: fix incorrect mutex usage v3
Before this patch the scheduler fence was created when we push the job
into the queue, so we could only get the fence after pushing it.

The mutex now was necessary to prevent the thread pushing the jobs to
the hardware from running faster than the thread pushing the jobs into
the queue.

Otherwise the thread pushing jobs into the queue would have accessed
possible freed up memory when it tries to get a reference to the fence.

So what you get in the end is thread A:
mutex_lock(&job->lock);
...
Kick of thread B.
...
mutex_unlock(&job->lock);

And thread B:
mutex_lock(&job->lock);
....
mutex_unlock(&job->lock);
kfree(job);

I'm actually not sure if I'm still up to date on this, but this usage
pattern used to be not allowed with mutexes. See here as well
https://lwn.net/Articles/575460/.

v2: remove unrelated changes, fix missing owner
v3: rebased, add more commit message

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:58 -05:00
Christian König
4a56228337 drm/amdgpu: cleanup scheduler fence get/put dance
The code was correct, but getting two references when the ownership
is linearly moved on is a bit awkward and just overhead.

Signed: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:58 -05:00
Chunming Zhou
7034decf6a drm/amdgpu: add command submission workflow tracepoint
OGL needs these tracepoints to investigate performance issue.

Change-Id: I5e58187d061253f7d665dfce8e4e163ba91d3e2b
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
2015-11-16 11:05:57 -05:00
Flora Cui
5f2e816b29 drm/amdgpu: update Fiji's tiling mode table
Change-Id: I925c15015390113f7e27746ec5751eaa6a92c2a7
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:56 -05:00
Rex Zhu
c305fd5fff drm/amdgpu: fix bug that can't enter thermal interrupt for bonaire.
Set reversed bit to enable/disable thermal interrupt.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-11-16 11:05:56 -05:00
Arnd Bergmann
e1b35f6103 drm/amdgpu: fix seq_printf format string
The amdgpu driver has a debugfs interface that shows the amount of
VRAM in use, but the newly added code causes a build error on
all 32-bit architectures:

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1076:17: warning: format '%lu' expects argument of type 'long unsigned int', but argument 4 has type 'long long int' [-Wformat=]

This fixes the format string to use "%llu" for printing 64-bit
numbers, which works everywhere, as long as we also cast to 'u64'.
Unlike atomic64_t, u64 is defined as 'unsigned long long' on
all architectures.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: a2ef8a9749 ("drm/amdgpu: add vram usage into debugfs")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:55 -05:00
Maxim Sheviakov
515c752dab drm/radeon: fix quirk for MSI R7 370 Armor 2X
There was a typo in the original.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=92865

Signed-off-by: Maxim Sheviakov <mrader3940@yandex.ru>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:54 -05:00
Jay Cornwall
a80b30476d drm/amdgpu: Fix default page access routing
The VM default page (used when a VM translation fails) is allocated in
system memory. The VM is misconfigured to interpret the physical address
as referencing a VRAM physical page.

Route default page accesses to system memory.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jay Cornwall <jay@jcornwall.me>
Cc: <stable@vger.kernel.org> # v4.2+
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:53 -05:00
Alex Deucher
24dd2f64c5 drm/radeon: unconditionally set sysfs_initialized
Avoids spew on resume for systems where sysfs may
fail even on init.

bug:
https://bugzilla.kernel.org/show_bug.cgi?id=106851

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-11-16 11:05:53 -05:00
Christian König
7e52a81c2f drm/amdgpu: cleanup amdgpu_cs_parser handling
No need any more to allocate that structure dynamically, just put it on the
stack. This is a start to cleanup some of the scheduler fallouts.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:52 -05:00
Christian König
e4a58a28b5 drm/amdgpu: fix leaking the IBs on error
Fixing a memory leak when the scheduler is enabled.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:51 -05:00
Chunming Zhou
f5617f9dde drm/amd: add kmem cache for sched fence
Change-Id: I45bb8ff10ef05dc3b15e31a77fbcf31117705f11
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 11:05:51 -05:00
Chunming Zhou
b49c84a576 drm/amdgpu: add kmem cache for amdgpu fence
Change-Id: I5ad8dd156ccf27a6f18004aa0a215a0925b6e67b
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-16 11:05:50 -05:00
Flora Cui
451f698bca drm/amdgpu: update fiji_mgcg_cgcg_init table
Change-Id: If44b8057741c78208f1976f60f31b535c944d0bd
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-11-16 11:05:49 -05:00
Christian König
16ae42feb0 drm/amdgpu: use common fence for amdgpu_vm_fence
Just cleanup the function parameters.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-16 11:05:49 -05:00
Christian König
b56c22853e drm/amdgpu: use fence_is_later() for vm_flush as well v2
v2: remove superfluous check

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-11-16 11:05:48 -05:00