Commit graph

691,473 commits

Author SHA1 Message Date
Joerg Roedel
08f63d9774 ACPI: Do not create a platform_device for IOAPIC/IOxAPIC
No platform-device is required for IO(x)APICs, so don't even
create them.

[ rjw: This fixes a problem with leaking platform device objects
  after IOAPIC/IOxAPIC hot-removal events.]

Signed-off-by: Joerg Roedel <jroedel@suse.de>
Cc: All applicable <stable@vger.kernel.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:37:19 +02:00
Joerg Roedel
e3d5092b67 ACPI: ioapic: Clear on-stack resource before using it
The on-stack resource-window 'win' in setup_res() is not
properly initialized. This causes the pointers in the
embedded 'struct resource' to contain stale addresses.

These pointers (in my case the ->child pointer) later get
propagated to the global iomem_resources list, causing a #GP
exception when the list is traversed in
iomem_map_sanity_check().

Fixes: c183619b63 (x86/irq, ACPI: Implement ACPI driver to support IOAPIC hotplug)
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:31:45 +02:00
Jonathan Neuschäfer
8067669150 ARM: qcom_defconfig: Enable Qualcomm remoteproc and related drivers
An adsp-pil node is present in at least the MSM8974 SoC. Simply enable
all Qualcomm remoteproc drivers to avoid more work in the future.

The SMP2P driver is required for adsp-pil to initialize correctly.

Enable the SMSM driver at Bjorn Andersson's request: "We also need
CONFIG_QCOM_SMSM=y here, its currently used to signal state of the ring
buffers for WiFi."

CONFIG_QCOM_WCNSS_CTRL is required to load firmware/configuration data
into the WCNSS core, which handles WiFi and Bluetooth.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 16:23:24 -05:00
Rafael J. Wysocki
b02aabe8ab cpufreq: intel_pstate: Eliminate intel_pstate_get_min_max()
Some computations in intel_pstate_get_min_max() are not necessary
and one of its two callers doesn't even use the full result.

First off, the fixed-point value of cpu->max_perf represents a
non-negative number between 0 and 1 inclusive and cpu->min_perf
cannot be greater than cpu->max_perf.  It is not necessary to check
those conditions every time the numbers in question are used.

Moreover, since intel_pstate_max_within_limits() only needs the
upper boundary, it doesn't make sense to compute the lower one in
there and returning min and max from intel_pstate_get_min_max()
via pointers doesn't look particularly nice.

For the above reasons, drop intel_pstate_get_min_max(), add a helper
to get the base P-state for min/max computations and carry out them
directly in the previous callers of intel_pstate_get_min_max().

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:17 +02:00
Rafael J. Wysocki
2bfc4cbb5f cpufreq: intel_pstate: Do not walk policy->cpus
intel_pstate_hwp_set() is the only function walking policy->cpus
in intel_pstate.  The rest of the code simply assumes one CPU per
policy, including the initialization code.

Therefore it doesn't make sense for intel_pstate_hwp_set() to
walk policy->cpus as it is guaranteed to have only one bit set
for policy->cpu.

For this reason, rearrange intel_pstate_hwp_set() to take the CPU
number as the argument and drop the loop over policy->cpus from it.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:16 +02:00
Rafael J. Wysocki
8ca6ce3701 cpufreq: intel_pstate: Introduce pid_in_use()
Add a new function pid_in_use() to return the information on whether
or not the PID-based P-state selection algorithm is in use.

That allows a couple of complicated conditions in the code to be
reduced to simple checks against the new function's return value.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:16 +02:00
Rafael J. Wysocki
2f49afc2a6 cpufreq: intel_pstate: Drop struct cpu_defaults
The cpu_defaults structure is redundant, because it only contains
one member of type struct pstate_funcs which can be used directly
instead of struct cpu_defaults.

For this reason, drop struct cpu_defaults, use struct pstate_funcs
directly instead of it where applicable and rename all of the
variables of that type accordingly.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:16 +02:00
Rafael J. Wysocki
de4a76cb58 cpufreq: intel_pstate: Move cpu_defaults definitions
Move the definitions of the cpu_defaults structures after the
definitions of utilization update callback routines to avoid
extra declarations of the latter.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:16 +02:00
Rafael J. Wysocki
67dd9bf441 cpufreq: intel_pstate: Add update_util callback to pstate_funcs
Avoid using extra function pointers during P-state selection by
dropping the get_target_pstate member from struct pstate_funcs,
adding a new update_util callback to it (to be registered with
the CPU scheduler as the utilization update callback in the active
mode) and reworking the utilization update callback routines to
invoke specific P-state selection functions directly.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:16 +02:00
Rafael J. Wysocki
eabd22c657 cpufreq: intel_pstate: Use different utilization update callbacks
Notice that some overhead in the utilization update callbacks
registered by intel_pstate in the active mode can be avoided if
those callbacks are tailored to specific configurations of the
driver.  For example, the utilization update callback for the HWP
enabled case only needs to update the average CPU performance
periodically whereas the utilization update callback for the
PID-based algorithm does not need to take IO-wait boosting into
account and so on.

With that in mind, define three utilization update callbacks for
three different use cases: HWP enabled, the CPU load "powersave"
P-state selection algorithm and the PID-based "powersave" P-state
selection algorithm and modify the driver initialization to
choose the callback matching its current configuration.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:15 +02:00
Rafael J. Wysocki
0042b2c069 cpufreq: intel_pstate: Modify check in intel_pstate_update_status()
One of the checks in intel_pstate_update_status() implicitly relies
on the information that there are only two struct cpufreq_driver
objects available, but it is better to do it directly against the
value it really is about (to make the code easier to follow if
nothing else).

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:15 +02:00
Rafael J. Wysocki
ee8df89a68 cpufreq: intel_pstate: Drop driver_registered variable
The driver_registered variable in intel_pstate is used for checking
whether or not the driver has been registered, but intel_pstate_driver
can be used for that too (with the rule that the driver is not
registered as long as it is NULL).

That is a bit more straightforward and the code may be simplified
a bit this way, so modify the driver accordingly.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:15 +02:00
Rafael J. Wysocki
694cb17347 cpufreq: intel_pstate: Skip unnecessary PID resets on init
PID controller parameters only need to be initialized if the
get_target_pstate_use_performance() P-state selection routine
is going to be used.  It is not necessary to initialize them
otherwise, so don't do that.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:14 +02:00
Rafael J. Wysocki
7aec5b50e9 cpufreq: intel_pstate: Set HWP sampling interval once
In the HWP enabled case pid_params.sample_rate_ns only needs to be
updated once, because it is global, so do that when setting hwp_active
instead of doing it during the initialization of every CPU.

Moreover, pid_params.sample_rate_ms is never used if HWP is enabled,
so do not update it at all then.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:14 +02:00
Rafael J. Wysocki
ff35f02ea1 cpufreq: intel_pstate: Clean up intel_pstate_busy_pid_reset()
intel_pstate_busy_pid_reset() is the only caller of pid_reset(),
pid_p_gain_set(), pid_i_gain_set(), and pid_d_gain_set().  Moreover,
it passes constants as two parameters of pid_reset() and all of
the other routines above essentially contain the same code, so
fold all of them into the caller and drop unnecessary computations.

Introduce percent_fp() for converting integer values in percent
to fixed-point fractions and use it in the above code cleanup.

Finally, rename intel_pstate_busy_pid_reset() to
intel_pstate_pid_reset() as it also is used for the
initialization of PID parameters for every CPU and the
meaning of the "busy" part of the name is not particularly
clear.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:11 +02:00
Rafael J. Wysocki
4ddd0146c7 cpufreq: intel_pstate: Fold intel_pstate_reset_all_pid() into the caller
There is only one caller of intel_pstate_reset_all_pid(), which is
pid_param_set() used in the debugfs interface only, and having that
code split does not make it particularly convenient to follow.

For this reason, move the body of intel_pstate_reset_all_pid() into
its caller and drop that function.

Also change the loop from for_each_online_cpu() (which is obviously
racy with respect to CPU offline/online) to for_each_possible_cpu(),
so that all PID parameters are reset for all CPUs regardless of their
online/offline status (to prevent, for example, a previously offline
CPU from going online with a stale set of PID parameters).

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:09 +02:00
Rafael J. Wysocki
5c43905369 cpufreq: intel_pstate: Initialize pid_params statically
Notice that both the existing struct cpu_defaults instances in which
PID parameters are actually initialized use the same values of those
parameters, so it is not really necessary to copy them over to
pid_params dynamically.

Instead, initialize pid_params statically with those values and
drop the unused pid_policy member from struct cpu_defaults along
with copy_pid_params() used for initializing it.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:08 +02:00
Rafael J. Wysocki
6404367862 cpufreq: intel_pstate: Drop pointless initialization of PID parameters
The P-state selection algorithm used by intel_pstate for Atom
processors is not based on the PID controller and the initialization
of PID parametrs for those processors is pointless and confusing, so
drop it.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:07 +02:00
Rafael J. Wysocki
e14cf8857e cpufreq: intel_pstate: Eliminate struct perf_limits
After recent changes the purpose of struct perf_limits is not
particularly clear any more and the code may be made somewhat
easier to follow by eliminating it, so go for that.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-03-28 23:12:07 +02:00
Arnd Bergmann
f0e6876606 ARM: OMAP2+: mark omap_init_rng as __init
I found this section mismatch when building with an older
compiler release:

WARNING: vmlinux.o(.text+0x3051c): Section mismatch in reference from the
function omap_init_rng() to the function .init.text:omap_device_build()

Obviously this one function should be __init as well. Normally
we don't get a warning as the function gets inlined into its
caller.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[tony@atomide.com: formatted error message a bit]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-03-28 14:10:09 -07:00
Kevin Hilman
49e9e6163c ARM: OMAP2+: dm81xx: Add clkdm and hwmod for SATA
Add the SATA clockdomain (part of CM_DEFAULT) and a hwmod for the SATA
block on dm81xx.

Tested on DM8168 EVM.

Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[Bartosz: removed an unused define]
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-03-28 14:10:03 -07:00
Roger Quadros
e2d54fe769 ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss
It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss
is in use then there are random chances that the usb_otg_ss module
will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3.

Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use
fixes this issue.

We don't know yet if usb_otg_ss instances 3 and 4 are affected by this
issue or not so don't add this flag for those instances.

Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-03-28 14:09:58 -07:00
Roger Quadros
a241623836 ARM: DRA7: hwmod: Fix DCAN1 stuck in transition
Add HWMOD_CLKDM_NOAUTO flag to DCAN1 module.

Without this DCAN1 module remains stuck in transition
after the CAN interface is brought down. This is also suggested
in Errata i893 "DCAN Initialization Sequence".

Add the HWMOD_CLKDM_NOAUTO to DCAN2 module as well
as it is mentioned in Errata i893.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-03-28 14:09:54 -07:00
Omar Sandoval
8b0c441e15 jsflash: stop sharing request queue across multiple gendisks
Compile-tested only (by hacking it to compile on x86).

Cc: David S. Miller <davem@davemloft.net>
Signed-off-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-03-28 15:06:58 -06:00
Omar Sandoval
103db8b2df swim: stop sharing request queue across multiple gendisks
Compile-tested only (by hacking it to compile on x86).

Signed-off-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-03-28 15:06:58 -06:00
Omar Sandoval
3a644142e8 parport/pf: stop sharing request queue across multiple gendisks
Compile-tested only.

Cc: Tim Waugh <tim@cyberelk.net>
Signed-off-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-03-28 15:06:58 -06:00
Omar Sandoval
547b50a1fb parport/pcd: stop sharing request queue across multiple gendisks
Compile-tested only.

Cc: Tim Waugh <tim@cyberelk.net>
Signed-off-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-03-28 15:06:58 -06:00
Omar Sandoval
eaf487ca30 parport/pd: stop sharing request queue across multiple gendisks
Compile-tested only.

Cc: Tim Waugh <tim@cyberelk.net>
Signed-off-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-03-28 15:06:58 -06:00
Omar Sandoval
a893cd76bb hd: stop sharing request queue across multiple gendisks
Compile-tested only.

Signed-off-by: Omar Sandoval <osandov@fb.com>
Signed-off-by: Jens Axboe <axboe@fb.com>
2017-03-28 15:06:58 -06:00
Stanimir Varbanov
b182cc4d59 firmware: qcom_scm: add two scm calls for iommu secure page table
Those two new SCM calls are needed from qcom-iommu driver in order
to initialize secure iommu page table.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 16:03:21 -05:00
Rob Clark
a2c680c6ce firmware/qcom: add qcom_scm_restore_sec_cfg()
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 16:03:21 -05:00
Tony Lindgren
da72e49364 Merge branch 'omap-for-v4.12/dt-droid4-v2' into omap-for-v4.12/dt-v2 2017-03-28 14:00:55 -07:00
Georgi Djakov
9db9559cfa ARM: dts: qcom: msm8974: Add RPMCC DT node
Add the RPM Clock Controller DT node for msm8974-based platforms, so that
drivers can use the clocks provided by the RPM processor.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 16:00:36 -05:00
Linus Walleij
3869fd6a76 ARM: dts: fix typo on APQ8060 Dragonboard
The DTS referred to SDC5 when it meant SDC1.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 16:00:36 -05:00
Linus Walleij
dfc1401026 ARM: dts: add SDC2 and SDC4 to the MSM8660 family
To make the picture complete, add DTS entries also for the
second and fourth MMC/SD blocks on the MSM8660. SDC2 is
an 8-bit interface and SDC4 is a 4-bit interface.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 16:00:35 -05:00
Jonathan Neuschäfer
4d931755fe ARM: dts: msm8974: Hook up adsp-pil's xo clock
Without this patch (and with CONFIG_QCOM_ADSP_PIL), I get this error:

	[    0.711529] qcom_adsp_pil adsp-pil: failed to get xo clock
	[    0.711540] remoteproc remoteproc0: releasing adsp-pil

With this patch, adsp-pil can initialize correctly.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 16:00:35 -05:00
Ivan T. Ivanov
1e20223d8e ARM: dts: qcom: Add msm8974 CoreSight components
Add initial set of CoreSight components found on Qualcomm
msm8974 and apq8074 based platforms, including the APQ8074
Dragonboard board.

Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 16:00:35 -05:00
Bjorn Andersson
90621b8044 arm64: dts: qcom: msm8916: Update hexagon node
It's necessary to reference the xo clock and cx supply, so specify these
in the node. Also move the Hexagon smd-edge into the hexagon node, to
enable SSR.

As cxo is not yet available we reference the fixed version of cxo for
now, which will work until proper power management is implemented.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 15:46:19 -05:00
avaneesh dwivedi
3f1802f888 arm64: dts: msm8996: Add SLPI SMP2P dt node.
Add smp2p support to communicate with slpi processor.

Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 15:46:18 -05:00
Stephen Boyd
8bfa6eae5a arm64: dts: qcom: Replace PMU compatible with a53 specific one
The PMU on msm8916 is for the cortex-a53 type CPU. Update the
compatible to the more specific one so we can get the a53
specific events out of the PMU.

Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 15:46:08 -05:00
Bjorn Andersson
a2940f36a8 arm64: dts: qcom: msm8996: Fixup smp2p node
The SMEM state property name changes between the integration branch and
mainline, update to use the correct one.

Fixes: 2f45d9fcd5 ("arm64: dts: msm8996: Add SMP2P and APCS nodes")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-03-28 15:46:05 -05:00
Al Viro
c1aad8dcc4 asm-generic: zero in __get_user(), not __get_user_fn()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2017-03-28 16:43:45 -04:00
Al Viro
3fb5007528 asm-generic/uaccess.h: don't mess with __copy_{to,from}_user
only h8300 actually used those; might as well define them there.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2017-03-28 16:43:44 -04:00
Al Viro
db68ce10c4 new helper: uaccess_kernel()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2017-03-28 16:43:25 -04:00
Sjoerd Simons
7301f269dd ARM: dts: rockchip: Enable sata support on rock2 square
The Rock 2 square board has a USB -> SATA converter hooked up to its usb
host1 connection. Enable the usb controller and always turn on the power
on the 5V sata power connector (controlled by gpio).

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-03-28 22:20:14 +02:00
Jacek Anaszewski
e631bf9caa Immutable branch between MFD and LEDS due for the v4.12 merge window
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Merge tag 'ib-mfd-leds-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into for-next

Immutable branch between MFD and LEDS due for the v4.12 merge window

* tag 'ib-mfd-leds-v4.12':
  mfd: cpcap: Add missing include dependencies
2017-03-28 21:24:02 +02:00
Jin Yao
c1dfcfad58 perf report: Drop cycles 0 for LBR print
For some platforms, for example Broadwell, it doesn't support cycles
for LBR. But the perf always prints cycles:0, it's not necessary.

The patch refactors the LBR info print code and drops the cycles:0.

For example: perf report --branch-history --no-children --stdio

On Broadwell:
--0.91%--__random_r random_r.c:394 (iterations:2)
          __random_r random_r.c:360 (predicted:0.0%)
          __random_r random_r.c:380 (predicted:0.0%)
          __random_r random_r.c:357

On Skylake:
--1.07%--main div.c:39 (predicted:52.4% cycles:1 iterations:17)
          main div.c:44 (predicted:52.4% cycles:1)
          main div.c:42 (cycles:2)
          compute_flag div.c:28 (cycles:2)
          compute_flag div.c:27 (cycles:1)
          rand rand.c:28 (cycles:1)
          rand rand.c:28 (cycles:1)
          __random random.c:298 (cycles:1)
          __random random.c:297 (cycles:1)
          __random random.c:295 (cycles:1)
          __random random.c:295 (cycles:1)
          __random random.c:295 (cycles:1)

Signed-off-by: Yao Jin <yao.jin@linux.intel.com>
	Reviewed-by: Andi Kleen <ak@linux.intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@intel.com>
Link: http://lkml.kernel.org/r/1489046786-10061-1-git-send-email-yao.jin@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2017-03-28 16:20:59 -03:00
Linus Torvalds
fe82203b63 virtio: fixes
Fixes to multiple issues in virtio. Most notably
 a regression fix for crashes reported by Fedora users.
 Hybernate is still reportedly broken, working on it.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost

Pull virtio fixes from Michael Tsirkin:
 "Fixes to multiple issues in virtio.

  Most notably a regression fix for crashes reported by Fedora users.
  Hibernate is still reportedly broken, working on it"

* tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost:
  virtio_balloon: prevent uninitialized variable use
  virtio-balloon: use actual number of stats for stats queue buffers
  virtio_balloon: init 1st buffer in stats vq
  virtio_pci: fix out of bound access for msix_names
2017-03-28 11:43:35 -07:00
Linus Torvalds
050fc52d83 All x86-specific, apart from some arch-independent syzkaller fixes.
v1->v2: added one more Reviewed-by
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM fixes from Paolo Bonzini:
 "All x86-specific, apart from some arch-independent syzkaller fixes"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: x86: cleanup the page tracking SRCU instance
  KVM: nVMX: fix nested EPT detection
  KVM: pci-assign: do not map smm memory slot pages in vt-d page tables
  KVM: kvm_io_bus_unregister_dev() should never fail
  KVM: VMX: Fix enable VPID conditions
  KVM: nVMX: Fix nested VPID vmx exec control
  KVM: x86: correct async page present tracepoint
  kvm: vmx: Flush TLB when the APIC-access address changes
  KVM: x86: use pic/ioapic destructor when destroy vm
  KVM: x86: check existance before destroy
  KVM: x86: clear bus pointer when destroyed
  KVM: Documentation: document MCE ioctls
  KVM: nVMX: don't reset kvm mmu twice
  PTP: fix ptr_ret.cocci warnings
  kvm: fix usage of uninit spinlock in avic_vm_destroy()
  KVM: VMX: downgrade warning on unexpected exit code
2017-03-28 11:33:34 -07:00
Alexey Klimov
4605fff00b mailbox: check ->last_tx_done for NULL in case of timer-based polling
It is allowed by code to register mailbox controller that sets txdone_poll
flag to request timer-based polling with missed ->last_tx_done() method.
If such thing happens and since presence of last_tx_done() is not checked
it will fail in hrtimer callback function txdone_hrtimer() when first
message will be transmitted.

This patch adds check for this method and logging of error on
registration of mailbox controller if it requested timer-based polling.

Signed-off-by: Alexey Klimov <alexey.klimov@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-03-28 23:52:02 +05:30