Highlights:
----------
- MPU:
- STM32MP13:
- Add and enable LTDC display (rocktech,rk043fn48h)
on stm32mp135f-dk.
- Add firewall bus based on ETZPC firewall controller.
- Add PWR regulator support: Can be only used if the platform is
set as "no-secure" (RCC_SECCFGR cleared) either use SCMI
regulator.
- STMP32MP15:
- Add firewall bus based on ETZPC firewall controller.
- Add heartbeat on stm32mp157c-ed1.
- STM32MP25:
- Add firewall bus based on RIFSC firewall controller.
- Add clock support (RCC) based on SCMI clock protocol for root clocks.
- Add all I2C instances and declare i2c2/i2c8 on stm32mp257f-ev1.
- Add all SPI instances. and declare spi3/spi8 on stm32mp257f-ev1.
-----BEGIN PGP SIGNATURE-----
iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmYqV7odHGFsZXhhbmRy
ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIWlCBAArsf4o7GwC3K3tBAj
ViR8UzGz3leIa0QHrZHhFvVQGjHllWYxBviDmKGRQwNarRlP6hFx+gHxmjqBxqk3
h45Wpa5zGbZMFYwGgdcJWLhB6aYy+GKOvUNuJDAc640K+uj9UECNIogwj80+2WWK
vRs5FrbgNqaZiGo7wKnJshEAHE+c03UEhj0+KD7JTHhGoXN/kX0nVZOqXQ2tH3+n
WNwk7M0dc3Is0cjDuWBlXzc7mDUj7uYtPU2c7kyleNEd6P7ZZ2nmZMus63jqP4Xt
tV0E5mmPqLGx1ABX1v9GXCYXuPu+YmWNTtm7J1Mea6WA6CoWUhTD+4c4Y6tzi3zo
KORQGviXyycZxKD9WEW9SX9swoJuwaapltzaT1VsbpimYx3AlSs0ZRjW5eQ9P9E3
imMqbPEP6r1Qj4M6JD1G8jaCYagzTk6qWBzPNjc2syX5gPczDQltbwNmYS0kaMyb
WVHh91p639Qlnb8gSwdCxMLI5Ppa0OxQcw4xWWbfjxqVF2PMZYdBvO4jPEafbKTZ
foykD/r+q/k6oKWr4Bfme7of+QiQvehFc7BF5Dt3nwIBHuQKeooueMWJe5EZix9o
6FPTCPw7ktnnujBqfsMGM59h3/VZcuW/wcBEOoYu+pZ0g2OODdzeL5lyIyFvRE69
ICpP4thLnATkS2TaSAS9acCwVpA=
=o2fQ
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYvXb4ACgkQYKtH/8kJ
Uica3xAAso78p08TkahE5cxTyJP3bC5Seiks4vY3pimMQmsmqlYPb5timtHZdKMN
T28o06lrTPs3+A3H+JBA2N2QmZC8JJiCMq2PAUUEneUiKo7N/QVUmUp+N0aeocez
sbJHK4eJsaK2RFAKb5opBPV5ZjAE3Y35qQa1ogMivWvMs7Qaxk/I++xPSIE+N5hl
9gf2RP6EV06R85Lg4G9yUFDWLHc6UiEulQwujx24faTyYAy6J+5gysO0mxn8HhH5
/wR2RTOg2NfyKlNM+kf1R5hoA3EUo1GH0QLBfblSY5cONzCcOyz9IWxinphHLIYN
GPztcRXFl2rJKGJjjW9cgBkMZb1ifGkq95U06BBFiwCTLdam41F9cg0/U8cZJZfG
CGw4Bv5kbVZzlqDLTKiZH4Qmdecqv0qZkzUsqr0b3tmvy7dtaKHOZ/NyNqWIgEtK
kJtyfRCb+y+LV2uyfAy0I8fwea8tH5z/yxVOR+ny5E3zXHjpjnMRDMevg/Z/eWcX
oHqkeXXpLGM9zm1ab6sEa4HT4gW0AGH4o/kqRagbfj4fVca6ldyFHpmndRSiSY43
1S6aW1kIM22oUoTsOrsz+0dt+XYg5Po1tqZDf2yBj6Wgus5qZLz2FlbfoWdL6NGH
lWHy+WuEu/ZXcbwlRda2v2w0nq2QY1EoQx5Ku3WQCABcf33S8no=
=9M2b
-----END PGP SIGNATURE-----
Merge tag 'stm32-dt-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.10, round 1
Highlights:
----------
- MPU:
- STM32MP13:
- Add and enable LTDC display (rocktech,rk043fn48h)
on stm32mp135f-dk.
- Add firewall bus based on ETZPC firewall controller.
- Add PWR regulator support: Can be only used if the platform is
set as "no-secure" (RCC_SECCFGR cleared) either use SCMI
regulator.
- STMP32MP15:
- Add firewall bus based on ETZPC firewall controller.
- Add heartbeat on stm32mp157c-ed1.
- STM32MP25:
- Add firewall bus based on RIFSC firewall controller.
- Add clock support (RCC) based on SCMI clock protocol for root clocks.
- Add all I2C instances and declare i2c2/i2c8 on stm32mp257f-ev1.
- Add all SPI instances. and declare spi3/spi8 on stm32mp257f-ev1.
* tag 'stm32-dt-for-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (21 commits)
arm64: dts: st: correct masks for GIC PPI interrupts on stm32mp25
arm64: dts: st: add spi3 / spi8 properties on stm32mp257f-ev1
arm64: dts: st: add spi3/spi8 pins for stm32mp25
arm64: dts: st: add all 8 spi nodes on stm32mp251
arm64: dts: st: add i2c2 / i2c8 properties on stm32mp257f-ev1
arm64: dts: st: add i2c2/i2c8 pins for stm32mp25
arm64: dts: st: add all 8 i2c nodes on stm32mp251
arm64: dts: st: add rcc support for STM32MP25
ARM: dts: stm32: enable display support on stm32mp135f-dk board
ARM: dts: stm32: add LTDC pinctrl on STM32MP13x SoC family
ARM: dts: stm32: add LTDC support for STM32MP13x SoC family
dt-bindings: display: simple: allow panel-common properties
ARM: dts: stm32: add PWR regulators support on stm32mp131
media: dt-bindings: add access-controllers to STM32MP25 video codecs
ARM: dts: stm32: add heartbeat led for stm32mp157c-ed1
ARM: dts: stm32: move can3 node from stm32f746 to stm32f769
ARM: dts: stm32: put ETZPC as an access controller for STM32MP13x boards
ARM: dts: stm32: add ETZPC as a system bus for STM32MP13x boards
ARM: dts: stm32: put ETZPC as an access controller for STM32MP15x boards
ARM: dts: stm32: add ETZPC as a system bus for STM32MP15x boards
...
Link: https://lore.kernel.org/r/2040767c-413e-4447-b354-c44999930e4c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Add FIFO depth to each SPI node so we can avoid matching this through
DTS alias. Difference SPI instances on given SoC have different FIFO
depths.
2. Exynos850: add clock controllers providing clocks to CPUs.
3. Google GS101: few cleanups and add missing serial engine (USI)
interface nodes.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmYqA4gQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1yUJEACEAN4PSt1XsENwwH7wyIXn+Yehx4wszoIC
jXiYotrWC8wcqg5gdcimCIyHGSO/Bg6C1UgvMxmo4QLXJ3NnMRWPENqd+k6sfTcW
LxhzJeLGDSYHI3CArPV/gc9WFnypAuDVHrWLOSxgUbvxuv/8nZe7Xd2cGScz2h9G
JHE6Kfpp08S1NtcaTyUNko8/DU2bl9sKjEVP6sDjqtsZqNv5TMLICbUq6R9HervL
bslHCEfTy12Ov0SLmh+wbPhv/Mh6VWW/PO6hA5cvgwFPo3E+Q2UOz2i7wtI1Wff6
8fBBpDaVuJF9vDgDZKxmATHZJpJNLXyaVUmHgPcM8hQ7Yt8aX7jH/Jymr4VSwgho
a0duE/usSYNn5yfO+5d3UWwUv3BY4g4YX0LPTdONu37+J2JFUi88FjDOWPNc/Uh2
o9zieilx2vrzhU6njizlKF9irWSojEzzZEzbWCAhs2JXBJATiPMYvh/zB08yy1oK
Rm9SaznlOBJwCqG6s3DgYTvgsMRj8YkWyLR0AW//4fKCC57WeyLtgfZDRWK+XYZm
XwAtbrbfMZBLq/kxoc4zOJ/UhySnLvlvuXWjRcJKJPqlQDDEGl31KJIbnYQHFr6U
EZWXcsaCGu2yES55RTCgp+hxJfqmOZhc7DVulQoHu7CvEuRr/XOQ8SCpr3PIFkOc
im01Ydquiw==
=NTPF
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYvWv8ACgkQYKtH/8kJ
UicYNA//Ynh/68Wg83w0+diMFKbM6a0uznzgyLeo9eIKRB7a90AiKLat2UuLHkZH
GTPmQYJur6hbJ2iVoSUI/AMwVX82PFqXGCbWmgbau3515ICFQlW5aJhy7Zm9Ingo
si9bTC5DSAzKwkCyFpbVC0iO6I0dGKZUoVV4nPgqjd7TQUOUg1kwMFrKcLymPBWv
d9fit6bLZTMBLtZa9+b+DGvpe0Bkv9IVR8PFDYCkcSZg6/JaXrdoKwZ/pTl2DZLG
bifP3v8P9VOGahC29E+oOliAIk3Z5Uey4cwc5tQIZ76G3o0MUqLCngtdW7SngFnx
JcP9MhB9hoQB7zB7Bz8kKeDLKl/Jk7YW83hWqPbdJYSybQdySR28AWMZXGmvMmWe
q8Z5tp6uQMfCPsrBAZmBQJEx/fBGbALlbeuwV7vXHvCXeItlWZ6FsX7coWhz5rNq
Dt8KC9niT7VZGYn3gzaNs9SSMvWj9x7uB4v669k5N6LnyQku3iL+z9RDi/OCVx3X
gJWHKf55KmZicjHSrCaTIADUeblK18dxeKzxVOh3DSM6PVJL4nLTExTA4Zl21gAv
Caxwbl10rrZTrNcVXld1Bm5QWvbYjjIT+I0sAzwMzj/4FbLFdzRparjwCNCccQ6i
DcLZZpKusgFXhW1J/setxITi0pV1PASYX5narCHa+xWfK4sHJ5k=
=K6Ie
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.10
1. Add FIFO depth to each SPI node so we can avoid matching this through
DTS alias. Difference SPI instances on given SoC have different FIFO
depths.
2. Exynos850: add clock controllers providing clocks to CPUs.
3. Google GS101: few cleanups and add missing serial engine (USI)
interface nodes.
* tag 'samsung-dt64-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: gs101: define all PERIC USI nodes
arm64: dts: exynos: gs101: join lines close to 80 chars
arm64: dts: exynos: gs101: move pinctrl-* properties after clocks
arm64: dts: exynos: gs101: move serial_0 pinctrl-0/names to dtsi
arm64: dts: exynos: gs101: reorder pinctrl-* properties
arm64: dts: exynos850: Add CPU clocks
arm64: dts: exynosautov9: specify the SPI FIFO depth
arm64: dts: exynos5433: specify the SPI FIFO depth
Link: https://lore.kernel.org/r/20240425071856.9235-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
New CPU #defines encode vendor and family as well as model.
[ dhansen: vertically align 0's in invlpg_miss_ids[] ]
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181518.41946-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181518.41927-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181517.41907-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
[ dhansen: vertically align macro and remove stray subject / ]
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181516.41887-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
[ bp: Squash two resctrl patches into one. ]
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181514.41848-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181513.41829-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181511.41753-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181510.41733-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181505.41654-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181504.41634-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181503.41614-1-tony.luck%40intel.com
New CPU #defines encode vendor and family as well as model.
[ bp: Squash *three* uncore patches into one. ]
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/all/20240424181501.41557-1-tony.luck%40intel.com
Update n900 charge limit, and make use of the clksel binding for dra7
for the clksel clocks and other dpll output related clocks.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAmYp3y0RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPjUw/8CEk27NriuwwJ51pnDYL+kVMprTPvTRnn
BPTXHduIIZjoKpSQxBoSx3vu/YklKPzrzng/OjyqLwINH228Edn4zufweuVRmHwa
oXwQvnJyFoeKGjsMbUz57DThFosWUecWMpBUU3n/9/gZC64YAy4P5jXXJkAJXac4
iU4pfdZ3NuNW2Pv+g7DrUatvvqFPx8E2NvonMLVCUuZDxhQXo6XQQMNHrrLySPbq
K45Z2864rj4Td2/T3X3GUVXbKI5xOZ63M2sVtYP5Z0UVBs+Ay3Rvj1YcELOWfPMi
17fzPd7sJ+wCPDFohF8UlpNEOns5m1KdTf1gRgPfB8vwQ/KghtOU7s+cTgeTJan3
nb1PuMcetRhJpAqmWPYhWPLRBNDjZEadp6pjNRRbABzO4uC1W4RhmrQ5lG5CBsHD
SUF+snnLnQmmH7K3c+gtyyt/+Is0Ga2bq82Z/n4LvGsPk6pZScnMtxZJVEfJiknC
ZEEA3t1F5HhzQaZaTx401Kwijj1oEg+54axjiL0ze9JLSL7NUMphCz6IJVKPOyNo
WzH37RmwM/mFNAXbX317sJXERYdjY6wRY7lRPkLF19NP4CQkJ5/ckcYum4J8PmX9
RRpEhnMWl2Fsb7LmPYLH3/rIAUsa0aQ1jgY/wr4oVdHxs/Lf008Lc5S4zCklPAeV
PXWGGMTLmxc=
=+DGK
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYvWmwACgkQYKtH/8kJ
Uic36w/+IKBMt8RR+lKWfY2Pn4QMjx4BgM68FoZ8fnC8BvX8jOaE66RpaxdZm/oC
UAFsUPr/R232bBn4VzpjlsCUot0DoyEfucFO/Tvav9CukCL9bafMMYQ48fOpdK/h
wYFBbohCDtdVIpqmXgEPcgyoC2WlyYlF19diM2OeFUidk/Yp/q6XTu8o5wxZ4I6i
zM81BfN4zmnfogAr9N1Wkf8j3DQN1fXyHKVRHc5wRerMB0Y9jzggjdY0gSePvp2A
Pc+BhXR17nSt+hnvuqR+ACIx1LPmO72O89RqIzthoEBhZwrboJNOCjR7+JF71kv+
On3dWm6rIkE9H+qj1fnVKD4H+QI9kIT6pijzBc3myH1LFsG6HL/ZUZjre1gY+XiX
3bfiwSBV495akdMToJdBy0sRezZJdfbAIpTurCJoDaTg8M7f8nCROVrftHXEPDDn
RxT5USrW56/MsRoHT4gAxGDch8IWqmddgQ4v9sXa5QzomPPznLK9g3FRfdKrklbS
OwHzX7nk7TeqHUrAIEcXeq0JcR5/4aTTg824dbg1D1EM8J8zwdMHE1nus6jLOpz9
XcoX6AqScW6xlBMZMmXpkSE0iE1kyCVuaDSgX4JXIfsAHKUsqOWzUSSOkntoTby+
rhDa5ofDrwhU/DvOyL/aIRH3+wErF6ZMNe4FmAr0Pcu2YA8JTEM=
=jNDn
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v6.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt
Devicetree changes for omaps for v6.10
Update n900 charge limit, and make use of the clksel binding for dra7
for the clksel clocks and other dpll output related clocks.
* tag 'omap-for-v6.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra7: Use clksel binding for CTRL_CORE_SMA_SW_0
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_USB
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_PER
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_ABE_PLL_SYS
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_CORE
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_EVE
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_GMAC
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_DRR
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_GPU
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_IVA
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_DSP
ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_CORE
ARM: dts: n900: set charge current limit to 950mA
Link: https://lore.kernel.org/r/pull-1714020191-304166@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily,
it doesn't provide any detail on uarch specific events.
There's still remaining cases for CPUs without any corresponding PMU
definition and for big.LITTLE systems which only have a single PMU node
(there should be one per core type).
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Acked-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Link: https://lore.kernel.org/r/20240417203853.3212103-1-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add HDMI capture support for the Function expansion board for the
Eagle development board,
- Add PMIC support for the RZ/G2UL SMARC EVK development board,
- Add thermal, more serial ((H)SCIF), and timer (CMT and TMU) support
for the R-Car V4M SoC,
- Add Timer Unit (TMU) support for the R-Mobile APE6, R-Car Gen2, and
RZ/G1 SoCs,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZhkAtwAKCRCKwlD9ZEnx
cI/UAQDXti0XEMAK5NpdccmUjvlm4TYxTkoV7RB+bkfR+i4fgwEA3O6jjBa0y8fO
kH98OKMQpukHOm0Y4NwWPbQXB2rOKgM=
=eCJv
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmYvWKcACgkQYKtH/8kJ
UiewCg/9FQ3syL/oB0w7LnCJrqUXk5v+BpwSZqEGWmwjcsO27RkDe18kmeROPkK4
1rJpkx4rjkMbqHQd63bFj5nUF9j5G4Rd8z/BXQKFKlh1O79lZNZmFqOny/u4L4d4
8vUF4qvbhKel0ffzSspJ4tiaySDkQP41OKCpGDXPiy2vzl0UHY4cohg4Qvdrs4kO
L/JgtIrr4sBWBq7rFDn4NUG/0QQfx8Uqgt4m6HXZjOc4CaHrh/MjnI7FULQ5EqAv
d9+sbNjTfvQ5W4pklEL+s/bspe0+KdVetj5dy0GVpwxQA6YKnabpnMNzzOB2k25Q
lpSKt8dpQJi07YiHoR8q72V5vzwc63kvQQc/uC/feQ/QC94HDFCqe4ZeGPWTcZOj
ChE2YA4+2zXIQj+1wIRies3EMgWUamcdzVgG9JxZGKAnofoo/kaEkkPo+mgBFkF9
xaQvtVNbuUlyuCYt/FDisBIAgEJjIwxtG568pZl/sbMuEAb0NLCTprepEMJbH6Dr
F1o0LHGu8VQJtFWvwkfyp/n9DB14b0kZTmtGlF2bZE31FiVR+scDvUurh3Oh4lWB
R4UnAQUXGhSoJhtJJ7WFB/nv26JFouvafiM3Vt3bm5VncxbYgku4/9wzeJv1PDG9
/o9yXIH405jdhd4D72qVGmrCbqr0d7qkJgc7mdQAKsjQVhoe/as=
=7aeg
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.10
- Add HDMI capture support for the Function expansion board for the
Eagle development board,
- Add PMIC support for the RZ/G2UL SMARC EVK development board,
- Add thermal, more serial ((H)SCIF), and timer (CMT and TMU) support
for the R-Car V4M SoC,
- Add Timer Unit (TMU) support for the R-Mobile APE6, R-Car Gen2, and
RZ/G1 SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: rzg3s-smarc-som: Fix Ethernet aliases
arm64: dts: renesas: r8a779h0: Add TMU nodes
arm64: dts: renesas: r8a779h0: Add CMT nodes
arm64: dts: renesas: gray-hawk-single: Enable nfsroot
ARM: dts: renesas: r9a06g032: Remove duplicate interrupt-parent
arm64: dts: renesas: gray-hawk-single: Add second debug serial port
arm64: dts: renesas: r8a779h0: Add SCIF nodes
arm64: dts: renesas: r8a779h0: Add remaining HSCIF nodes
ARM: dts: renesas: rcar-gen2: Add TMU nodes
ARM: dts: renesas: rzg1: Add TMU nodes
ARM: dts: renesas: r8a73a4: Add TMU nodes
ARM: dts: renesas: r7s72100: Add interrupt-names to SCIF nodes
arm64: dts: renesas: r8a779h0: Add thermal nodes
arm64: dts: renesas: rzg2ul-smarc: Enable PMIC and built-in RTC, GPIO and ONKEY
arm64: dts: renesas: eagle: Add capture overlay for Function expansion board
Link: https://lore.kernel.org/r/cover.1712915536.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The code ignored the I2C_M_RD flag on I2C messages. Instead it assumed
an i2c transaction with a single message must be a write operation and a
transaction with two messages would be a read operation.
Though this works for the driver code, it leads to problems once the i2c
device is exposed to code not knowing this convention. For example,
I did "insmod i2c-dev" and issued read requests from userspace, which
were translated into write requests and destroyed the EEPROM of my
device.
So, just check and respect the I2C_M_READ flag, which indicates a read
when set on a message. If it is absent, it is a write message.
Incidentally, changing from the case statement to a while loop allows
the code to lift the limitation to two i2c messages per transaction.
There are 4 more *_i2c_transfer functions affected by the same behaviour
and limitation that should be fixed in the same way.
Link: https://lore.kernel.org/linux-media/20220116112238.74171-2-micha@freedict.org
Signed-off-by: Michael Bunk <micha@freedict.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
The new m88ds3101b demodulator version requires the highest bit of
register 0x11 be cleared after tuning to a new frequency to make the
lock output pin go high when a signal is found. This pin is normally
connected to an indicator led.
Link: https://lore.kernel.org/linux-media/20220116112238.74171-1-micha@freedict.org
Signed-off-by: Michael Bunk <micha@freedict.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
A spelling error was found in the comment section of
include/uapi/linux/xfrm.h. Since this header file is copied to many
userspace programs and undergoes Debian spellcheck, it's preferable to
fix it in upstream rather than downstream having exceptions.
This commit fixes the spelling mistake.
Fixes: df71837d50 ("[LSM-IPSec]: Security association restriction.")
Signed-off-by: Antony Antony <antony.antony@secunet.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
Doug Berger says:
====================
net: bcmgenet: protect contended accesses
Some registers may be modified by parallel execution contexts and
require protections to prevent corruption.
A review of the driver revealed the need for these additional
protections.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
The UMAC_CMD register is written from different execution
contexts and has insufficient synchronization protections to
prevent possible corruption. Of particular concern are the
acceses from the phy_device delayed work context used by the
adjust_link call and the BH context that may be used by the
ndo_set_rx_mode call.
A spinlock is added to the driver to protect contended register
accesses (i.e. reg_lock) and it is used to synchronize accesses
to UMAC_CMD.
Fixes: 1c1008c793 ("net: bcmgenet: add main driver file")
Cc: stable@vger.kernel.org
Signed-off-by: Doug Berger <opendmb@gmail.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The ndo_set_rx_mode function is synchronized with the
netif_addr_lock spinlock and BHs disabled. Since this
function is also invoked directly from the driver the
same synchronization should be applied.
Fixes: 72f9634762 ("net: bcmgenet: set Rx mode before starting netif")
Cc: stable@vger.kernel.org
Signed-off-by: Doug Berger <opendmb@gmail.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The EXT_RGMII_OOB_CTRL register can be written from different
contexts. It is predominantly written from the adjust_link
handler which is synchronized by the phydev->lock, but can
also be written from a different context when configuring the
mii in bcmgenet_mii_config().
The chances of contention are quite low, but it is conceivable
that adjust_link could occur during resume when WoL is enabled
so use the phydev->lock synchronizer in bcmgenet_mii_config()
to be sure.
Fixes: afe3f907d2 ("net: bcmgenet: power on MII block for all MII modes")
Cc: stable@vger.kernel.org
Signed-off-by: Doug Berger <opendmb@gmail.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
If the base-time for taprio is in the past, start the schedule at the time
of the form "base_time + N*cycle_time" where N is the smallest possible
integer such that the above time is in the future.
Signed-off-by: Tanmay Patil <t-patil@ti.com>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
These are special packets that the drivers sends directly to the
firmware connection manager (ICM). These do not have route string
because they are always consumed by the firmware connection manager
running on the host router, so hard-code that in the output accordingly.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
xtensa's flush_dcache_page() can be a no-op sometimes. There is a
generic implementation for this case in include/asm-generic/
cacheflush.h.
#ifndef ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE
static inline void flush_dcache_page(struct page *page)
{
}
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
#endif
So remove the superfluous flush_dcache_page() definition, which also
helps silence potential build warnings complaining the page variable
passed to flush_dcache_page() is not used.
In file included from crypto/scompress.c:12:
include/crypto/scatterwalk.h: In function 'scatterwalk_pagedone':
include/crypto/scatterwalk.h:76:30: warning: variable 'page' set but not used [-Wunused-but-set-variable]
76 | struct page *page;
| ^~~~
crypto/scompress.c: In function 'scomp_acomp_comp_decomp':
>> crypto/scompress.c:174:38: warning: unused variable 'dst_page' [-Wunused-variable]
174 | struct page *dst_page = sg_page(req->dst);
|
The issue was originally reported on LoongArch by kernel test
robot (Huacai fixed it on LoongArch), then reported by Guenter
and me on xtensa.
This patch also removes lots of redundant macros which have
been defined by asm-generic/cacheflush.h.
Cc: Huacai Chen <chenhuacai@loongson.cn>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202403091614.NeUw5zcv-lkp@intel.com/
Reported-by: Barry Song <v-songbaohua@oppo.com>
Closes: https://lore.kernel.org/all/CAGsJ_4yDk1+axbte7FKQEwD7X2oxUCFrEc9M5YOS1BobfDFXPA@mail.gmail.com/
Reported-by: Guenter Roeck <linux@roeck-us.net>
Closes: https://lore.kernel.org/all/aaa8b7d7-5abe-47bf-93f6-407942436472@roeck-us.net/
Fixes: 77292bb8ca ("crypto: scomp - remove memcpy if sg_nents is 1 and pages are lowmem")
Signed-off-by: Barry Song <v-songbaohua@oppo.com>
Message-Id: <20240319010920.125192-1-21cnbao@gmail.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Currently, the condition "__this_cpu_read(ksoftirqd) == current" is used to
invoke rcu_softirq_qs() in ksoftirqd tasks context for non-RT kernels.
This works correctly as long as the context is actually task context but
this condition is wrong when:
- the current task is ksoftirqd
- the task is interrupted in a RCU read side critical section
- __do_softirq() is invoked on return from interrupt
Syzkaller triggered the following scenario:
-> finish_task_switch()
-> put_task_struct_rcu_user()
-> call_rcu(&task->rcu, delayed_put_task_struct)
-> __kasan_record_aux_stack()
-> pfn_valid()
-> rcu_read_lock_sched()
<interrupt>
__irq_exit_rcu()
-> __do_softirq)()
-> if (!IS_ENABLED(CONFIG_PREEMPT_RT) &&
__this_cpu_read(ksoftirqd) == current)
-> rcu_softirq_qs()
-> RCU_LOCKDEP_WARN(lock_is_held(&rcu_sched_lock_map))
The rcu quiescent state is reported in the rcu-read critical section, so
the lockdep warning is triggered.
Fix this by splitting out the inner working of __do_softirq() into a helper
function which takes an argument to distinguish between ksoftirqd task
context and interrupted context and invoke it from the relevant call sites
with the proper context information and use that for the conditional
invocation of rcu_softirq_qs().
Reported-by: syzbot+dce04ed6d1438ad69656@syzkaller.appspotmail.com
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Zqiang <qiang.zhang1211@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240427102808.29356-1-qiang.zhang1211@gmail.com
Link: https://lore.kernel.org/lkml/8f281a10-b85a-4586-9586-5bbc12dc784f@paulmck-laptop/T/#mea8aba4abfcb97bbf499d169ce7f30c4cff1b0e3
Don't populate the read-only arrays cck_rates, ofdm_rates, ht_rates_1t and
channel_all on the stack at run time, instead make them static const and
clean up the formatting.
Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240425155733.114423-1-colin.i.king@gmail.com
The assignment of the else and if branches is the same in the "case:
MLO_2_PLUS_0_1RF" branch of the function rtw89_phy_get_kpath, so we
remove it and add comments here to make the code easier to understand.
./drivers/net/wireless/realtek/rtw89/phy.c:6406:2-4: WARNING: possible condition with no effect (if == else).
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=8812
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240422072922.50940-1-jiapeng.chong@linux.alibaba.com
If there is any changes with Wi-Fi/Bluetooth, the mechanism will
trigger run_coex to update information and coexistence mechanism.
Enable/Disable reports here can make sure the action take effect
in time.
Signed-off-by: Ching-Te Ku <ku920601@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240423130502.32682-9-pkshih@realtek.com
BTG(A hardware block, which Wi-Fi 2.4Ghz & Bluetooth shared a part
of hardware). Because some information are saved in role info. So the
logic also need to get value from the version 8 role info.
Signed-off-by: Ching-Te Ku <ku920601@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240423130502.32682-8-pkshih@realtek.com
This function is to let Bluetooth know Wi-Fi is using which channel,
and ask Bluetooth do not hop into the nearby channel. Wi-Fi channel
is saved at role info, this patch make the logic also get the channel
value from version 8 role info.
Signed-off-by: Ching-Te Ku <ku920601@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240423130502.32682-7-pkshih@realtek.com
It will assign wrong value to version 7 slot parameter setting, because
the structure member order has changed. Add a for-loop to assign variables
manually.
Signed-off-by: Ching-Te Ku <ku920601@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240423130502.32682-6-pkshih@realtek.com
The report is reported from Bluetooth, it shows the current Bluetooth
driver & firmware version code. Wi-Fi & Bluetooth need to use compatible
version. The version 7 report adjust the structure variables order.
Signed-off-by: Ching-Te Ku <ku920601@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240423130502.32682-5-pkshih@realtek.com
The report is reported from Bluetooth, it described the usable
Bluetooth channel map. Bluetooth should not hopped into Wi-Fi
using channel. Version 8 report adjust the structure variables
order.
Signed-off-by: Ching-Te Ku <ku920601@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240423130502.32682-4-pkshih@realtek.com
This report is reported from Bluetooth, it described Bluetooth scan
parameters. Version 7 adjust the structure variables order.
Signed-off-by: Ching-Te Ku <ku920601@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240423130502.32682-3-pkshih@realtek.com
The mechanism will use Wi-Fi null packet to stop the packets from
access point to avoid the interference to Bluetooth when switch
to Bluetooth slot. The report can check whether the null packet is
working as expected or not.
Signed-off-by: Ching-Te Ku <ku920601@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240423130502.32682-2-pkshih@realtek.com
RFE type 5 of 8852B is a type of hardware module, which can use different
external components, so update register settings accordingly.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240423121247.24714-2-pkshih@realtek.com
The CTS cannot be received by the peer due to center frequency
deviation. This issue can be solved by correct settings to
transmit proper CTS.
Signed-off-by: Kuan-Chung Chen <damon.chen@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240423121247.24714-1-pkshih@realtek.com