This property is not needed for usb controller. The usb phy needs it
instead.
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch adds the pinmux and nodes for usbotg and usbh2.
In v6 revision of the pca100 the usb phys were changed to usb3320 which
are connected by their reset pins. We add the phy configuration to the
description.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for Toradex Colibri iMX8DX SoM. As the i.MX8QXP variant is
already supported, update the description with i.MX8DX and add
'fsl,imx8dx' item as well.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
'toradex,colibri-imx8x' is already present as a constant value for
'i.MX8QP Board with Toradex Colibri iMX8X Modules', so there is no need
to keep it twice as a enum value for 'i.MX8QXP based Boards'.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for Toradex Colibri iMX8DX SoM and Aster, Evaluation Board v3,
Iris and Iris v2 carrier boards the module can be mated in.
This SoM is a variant of the already supported Colibri iMX8QXP, using an
NXP i.MX8DX SoC instead of i.MX8QXP.
Link: https://www.toradex.com/computer-on-modules/colibri-arm-family/nxp-imx-8x
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DTSI for i.MX8DX processor. According to 'i.MX 8DualX Industrial
Applications Processors Data Sheet', the GPU and shader use a clock of
372MHz. Therefore, this dtsi includes the imx8dxp.dtsi and changes the
clock accordingly.
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The devicetree files can be (re-)used in u-boot now, they are imported
on a regular basis (see OF_UPSTREAM option) there. Up until now, it
didn't matter for linux and there was just a combined devicetree
"-var3-ads2" (with ads2 being the carrier board). But if the devicetree
files are now reused in u-boot, we need to have an individual "-var3"
variant, because the bootloader is just using the bare "varN" devicetree
files. Split the "var3" off of the "-var3-ads2" devicetree.
Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drm-misc-next for v6.10-rc1:
UAPI Changes:
- Add SIZE_HINTS property for cursor planes.
Cross-subsystem Changes:
Core Changes:
- Document the requirements and expectations of adding new
driver-specific properties.
- Assorted small fixes to ttm.
- More Kconfig fixes.
- Add struct drm_edid_product_id and helpers.
- Use drm device based logging in more drm functions.
- Fixes for drm-panic, and option to test it.
- Assorted small fixes and updates to edid.
- Add drm_crtc_vblank_crtc and use it in vkms, nouveau.
Driver Changes:
- Assorted small fixes and improvements to bridge/imx8mp-hdmi-tx, nouveau, ast, qaic, lima, vc4, bridge/anx7625, mipi-dsi.
- Add drm panic to simpledrm, mgag200, imx, ast.
- Use dev_err_probe in bridge/panel drivers.
- Add Innolux G121X1-L03, LG sw43408 panels.
- Use struct drm_edid in i915 bios parsing.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/2dc1b7c6-1743-4ddd-ad42-36f700234fbe@linux.intel.com
In order to connect to networks which require 802.11w, add the
MFP_CAPABLE flag and let mac80211 do the actual crypto in software.
When a robust management frame is received, rx_dec->swdec is not set,
even though the HW did not decrypt it. Extend the check and don't set
RX_FLAG_DECRYPTED for these frames in order to use SW decryption.
Use the security flag in the RX descriptor for this purpose, like it is
done in the rtw88 driver.
Cc: stable@vger.kernel.org
Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240418071813.1883174-3-martin.kaistra@linutronix.de
This reverts commit 77f5924fc4.
There is a more elegant solution to check for not decrypted frames,
which is to check the security flag in the RX descriptor.
Revert commit 77f5924fc4 ("wifi: rtl8xxxu: enable MFP support") in
favor of this to be able to send it to stable.
Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240418071813.1883174-2-martin.kaistra@linutronix.de
Driver throws messages when scanning with a lot of traffic, because packets
in TX buffer can not be transmitted in time. Since this is a common
occurrence, change them to debug message with special debug mask that
developers can turn on this mask by default for further analysis.
Cc: Lewis Robbins <lewis.robbins2@gmail.com>
Tested-by: Lewis Robbins <lewis.robbins2@gmail.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240418002916.5965-1-pkshih@realtek.com
When hal_reset on MAC_1/PHY_1, we should pass tx_en1 instead of tx_en0.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240417090058.42663-1-pkshih@realtek.com
We will support MLO on 802.11be chip, e.g. RTL8922A, in the future. At that
time being, we will set WIPHY_FLAG_SUPPORTS_MLO according to chip info and
FW features at runtime. But, with WIPHY_FLAG_SUPPORTS_MLO flag, cfg80211
will disable WEXT. In case inconsistent user experience, if 802.11be chip,
we disable WEXT uniformly from now on.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://msgid.link/20240417090050.42607-1-pkshih@realtek.com
Merge series from Shenghao Ding <shenghao-ding@ti.com>:
mixer-test report:
root@am335x-evm:/bin# mixer-test
TAP version 13
# Card 0 - TI BeagleBone Black (TI BeagleBone Black)
1..455
ok 1 get_value.0.64
# 0.64 PCMD3180 i2c2 Profile id
ok 2 name.0.64
ok 3 write_default.0.64
ok 4 write_valid.0.64
ok 5 write_invalid.0.64
ok 6 event_missing.0.64
ok 7 event_spurious.0.64
ok 8 get_value.0.63
# 0.63 PCMD3180 i2c2 Dev3 Ch8 Digi Volume
ok 9 name.0.63
ok 10 write_default.0.63
ok 11 write_valid.0.63
ok 12 write_invalid.0.63
ok 13 event_missing.0.63
ok 14 event_spurious.0.63
ok 15 get_value.0.62
# 0.62 PCMD3180 i2c2 Dev3 Ch7 Digi Volume
ok 16 name.0.62
ok 17 write_default.0.62
ok 18 write_valid.0.62
ok 19 write_invalid.0.62
ok 20 event_missing.0.62
ok 21 event_spurious.0.62
ok 22 get_value.0.61
# 0.61 PCMD3180 i2c2 Dev3 Ch6 Digi Volume
ok 23 name.0.61
ok 24 write_default.0.61
ok 25 write_valid.0.61
ok 26 write_invalid.0.61
ok 27 event_missing.0.61
ok 28 event_spurious.0.61
ok 29 get_value.0.60
# 0.60 PCMD3180 i2c2 Dev3 Ch5 Digi Volume
ok 30 name.0.60
ok 31 write_default.0.60
ok 32 write_valid.0.60
ok 33 write_invalid.0.60
ok 34 event_missing.0.60
ok 35 event_spurious.0.60
ok 36 get_value.0.59
# 0.59 PCMD3180 i2c2 Dev3 Ch4 Digi Volume
ok 37 name.0.59
ok 38 write_default.0.59
ok 39 write_valid.0.59
ok 40 write_invalid.0.59
ok 41 event_missing.0.59
ok 42 event_spurious.0.59
ok 43 get_value.0.58
# 0.58 PCMD3180 i2c2 Dev3 Ch3 Digi Volume
ok 44 name.0.58
ok 45 write_default.0.58
ok 46 write_valid.0.58
ok 47 write_invalid.0.58
ok 48 event_missing.0.58
ok 49 event_spurious.0.58
ok 50 get_value.0.57
# 0.57 PCMD3180 i2c2 Dev3 Ch2 Digi Volume
ok 51 name.0.57
ok 52 write_default.0.57
ok 53 write_valid.0.57
ok 54 write_invalid.0.57
ok 55 event_missing.0.57
ok 56 event_spurious.0.57
ok 57 get_value.0.56
# 0.56 PCMD3180 i2c2 Dev3 Ch1 Digi Volume
ok 58 name.0.56
ok 59 write_default.0.56
ok 60 write_valid.0.56
ok 61 write_invalid.0.56
ok 62 event_missing.0.56
ok 63 event_spurious.0.56
ok 64 get_value.0.55
# 0.55 PCMD3180 i2c2 Dev3 Ch8 Fine Volume
ok 65 name.0.55
ok 66 write_default.0.55
ok 67 write_valid.0.55
ok 68 write_invalid.0.55
ok 69 event_missing.0.55
ok 70 event_spurious.0.55
ok 71 get_value.0.54
# 0.54 PCMD3180 i2c2 Dev3 Ch7 Fine Volume
ok 72 name.0.54
ok 73 write_default.0.54
ok 74 write_valid.0.54
ok 75 write_invalid.0.54
ok 76 event_missing.0.54
ok 77 event_spurious.0.54
ok 78 get_value.0.53
# 0.53 PCMD3180 i2c2 Dev3 Ch6 Fine Volume
ok 79 name.0.53
ok 80 write_default.0.53
ok 81 write_valid.0.53
ok 82 write_invalid.0.53
ok 83 event_missing.0.53
ok 84 event_spurious.0.53
ok 85 get_value.0.52
# 0.52 PCMD3180 i2c2 Dev3 Ch5 Fine Volume
ok 86 name.0.52
ok 87 write_default.0.52
ok 88 write_valid.0.52
ok 89 write_invalid.0.52
ok 90 event_missing.0.52
ok 91 event_spurious.0.52
ok 92 get_value.0.51
# 0.51 PCMD3180 i2c2 Dev3 Ch4 Fine Volume
ok 93 name.0.51
ok 94 write_default.0.51
ok 95 write_valid.0.51
ok 96 write_invalid.0.51
ok 97 event_missing.0.51
ok 98 event_spurious.0.51
ok 99 get_value.0.50
# 0.50 PCMD3180 i2c2 Dev3 Ch3 Fine Volume
ok 100 name.0.50
ok 101 write_default.0.50
ok 102 write_valid.0.50
ok 103 write_invalid.0.50
ok 104 event_missing.0.50
ok 105 event_spurious.0.50
ok 106 get_value.0.49
# 0.49 PCMD3180 i2c2 Dev3 Ch2 Fine Volume
ok 107 name.0.49
ok 108 write_default.0.49
ok 109 write_valid.0.49
ok 110 write_invalid.0.49
ok 111 event_missing.0.49
ok 112 event_spurious.0.49
ok 113 get_value.0.48
# 0.48 PCMD3180 i2c2 Dev3 Ch1 Fine Volume
ok 114 name.0.48
ok 115 write_default.0.48
ok 116 write_valid.0.48
ok 117 write_invalid.0.48
ok 118 event_missing.0.48
ok 119 event_spurious.0.48
ok 120 get_value.0.47
# 0.47 PCMD3180 i2c2 Dev2 Ch8 Digi Volume
ok 121 name.0.47
ok 122 write_default.0.47
ok 123 write_valid.0.47
ok 124 write_invalid.0.47
ok 125 event_missing.0.47
ok 126 event_spurious.0.47
ok 127 get_value.0.46
# 0.46 PCMD3180 i2c2 Dev2 Ch7 Digi Volume
ok 128 name.0.46
ok 129 write_default.0.46
ok 130 write_valid.0.46
ok 131 write_invalid.0.46
ok 132 event_missing.0.46
ok 133 event_spurious.0.46
ok 134 get_value.0.45
# 0.45 PCMD3180 i2c2 Dev2 Ch6 Digi Volume
ok 135 name.0.45
ok 136 write_default.0.45
ok 137 write_valid.0.45
ok 138 write_invalid.0.45
ok 139 event_missing.0.45
ok 140 event_spurious.0.45
ok 141 get_value.0.44
# 0.44 PCMD3180 i2c2 Dev2 Ch5 Digi Volume
ok 142 name.0.44
ok 143 write_default.0.44
ok 144 write_valid.0.44
ok 145 write_invalid.0.44
ok 146 event_missing.0.44
ok 147 event_spurious.0.44
ok 148 get_value.0.43
# 0.43 PCMD3180 i2c2 Dev2 Ch4 Digi Volume
ok 149 name.0.43
ok 150 write_default.0.43
ok 151 write_valid.0.43
ok 152 write_invalid.0.43
ok 153 event_missing.0.43
ok 154 event_spurious.0.43
ok 155 get_value.0.42
# 0.42 PCMD3180 i2c2 Dev2 Ch3 Digi Volume
ok 156 name.0.42
ok 157 write_default.0.42
ok 158 write_valid.0.42
ok 159 write_invalid.0.42
ok 160 event_missing.0.42
ok 161 event_spurious.0.42
ok 162 get_value.0.41
# 0.41 PCMD3180 i2c2 Dev2 Ch2 Digi Volume
ok 163 name.0.41
ok 164 write_default.0.41
ok 165 write_valid.0.41
ok 166 write_invalid.0.41
ok 167 event_missing.0.41
ok 168 event_spurious.0.41
ok 169 get_value.0.40
# 0.40 PCMD3180 i2c2 Dev2 Ch1 Digi Volume
ok 170 name.0.40
ok 171 write_default.0.40
ok 172 write_valid.0.40
ok 173 write_invalid.0.40
ok 174 event_missing.0.40
ok 175 event_spurious.0.40
ok 176 get_value.0.39
# 0.39 PCMD3180 i2c2 Dev2 Ch8 Fine Volume
ok 177 name.0.39
ok 178 write_default.0.39
ok 179 write_valid.0.39
ok 180 write_invalid.0.39
ok 181 event_missing.0.39
ok 182 event_spurious.0.39
ok 183 get_value.0.38
# 0.38 PCMD3180 i2c2 Dev2 Ch7 Fine Volume
ok 184 name.0.38
ok 185 write_default.0.38
ok 186 write_valid.0.38
ok 187 write_invalid.0.38
ok 188 event_missing.0.38
ok 189 event_spurious.0.38
ok 190 get_value.0.37
# 0.37 PCMD3180 i2c2 Dev2 Ch6 Fine Volume
ok 191 name.0.37
ok 192 write_default.0.37
ok 193 write_valid.0.37
ok 194 write_invalid.0.37
ok 195 event_missing.0.37
ok 196 event_spurious.0.37
ok 197 get_value.0.36
# 0.36 PCMD3180 i2c2 Dev2 Ch5 Fine Volume
ok 198 name.0.36
ok 199 write_default.0.36
ok 200 write_valid.0.36
ok 201 write_invalid.0.36
ok 202 event_missing.0.36
ok 203 event_spurious.0.36
ok 204 get_value.0.35
# 0.35 PCMD3180 i2c2 Dev2 Ch4 Fine Volume
ok 205 name.0.35
ok 206 write_default.0.35
ok 207 write_valid.0.35
ok 208 write_invalid.0.35
ok 209 event_missing.0.35
ok 210 event_spurious.0.35
ok 211 get_value.0.34
# 0.34 PCMD3180 i2c2 Dev2 Ch3 Fine Volume
ok 212 name.0.34
ok 213 write_default.0.34
ok 214 write_valid.0.34
ok 215 write_invalid.0.34
ok 216 event_missing.0.34
ok 217 event_spurious.0.34
ok 218 get_value.0.33
# 0.33 PCMD3180 i2c2 Dev2 Ch2 Fine Volume
ok 219 name.0.33
ok 220 write_default.0.33
ok 221 write_valid.0.33
ok 222 write_invalid.0.33
ok 223 event_missing.0.33
ok 224 event_spurious.0.33
ok 225 get_value.0.32
# 0.32 PCMD3180 i2c2 Dev2 Ch1 Fine Volume
ok 226 name.0.32
ok 227 write_default.0.32
ok 228 write_valid.0.32
ok 229 write_invalid.0.32
ok 230 event_missing.0.32
ok 231 event_spurious.0.32
ok 232 get_value.0.31
# 0.31 PCMD3180 i2c2 Dev1 Ch8 Digi Volume
ok 233 name.0.31
ok 234 write_default.0.31
ok 235 write_valid.0.31
ok 236 write_invalid.0.31
ok 237 event_missing.0.31
ok 238 event_spurious.0.31
ok 239 get_value.0.30
# 0.30 PCMD3180 i2c2 Dev1 Ch7 Digi Volume
ok 240 name.0.30
ok 241 write_default.0.30
ok 242 write_valid.0.30
ok 243 write_invalid.0.30
ok 244 event_missing.0.30
ok 245 event_spurious.0.30
ok 246 get_value.0.29
# 0.29 PCMD3180 i2c2 Dev1 Ch6 Digi Volume
ok 247 name.0.29
ok 248 write_default.0.29
ok 249 write_valid.0.29
ok 250 write_invalid.0.29
ok 251 event_missing.0.29
ok 252 event_spurious.0.29
ok 253 get_value.0.28
# 0.28 PCMD3180 i2c2 Dev1 Ch5 Digi Volume
ok 254 name.0.28
ok 255 write_default.0.28
ok 256 write_valid.0.28
ok 257 write_invalid.0.28
ok 258 event_missing.0.28
ok 259 event_spurious.0.28
ok 260 get_value.0.27
# 0.27 PCMD3180 i2c2 Dev1 Ch4 Digi Volume
ok 261 name.0.27
ok 262 write_default.0.27
ok 263 write_valid.0.27
ok 264 write_invalid.0.27
ok 265 event_missing.0.27
ok 266 event_spurious.0.27
ok 267 get_value.0.26
# 0.26 PCMD3180 i2c2 Dev1 Ch3 Digi Volume
ok 268 name.0.26
ok 269 write_default.0.26
ok 270 write_valid.0.26
ok 271 write_invalid.0.26
ok 272 event_missing.0.26
ok 273 event_spurious.0.26
ok 274 get_value.0.25
# 0.25 PCMD3180 i2c2 Dev1 Ch2 Digi Volume
ok 275 name.0.25
ok 276 write_default.0.25
ok 277 write_valid.0.25
ok 278 write_invalid.0.25
ok 279 event_missing.0.25
ok 280 event_spurious.0.25
ok 281 get_value.0.24
# 0.24 PCMD3180 i2c2 Dev1 Ch1 Digi Volume
ok 282 name.0.24
ok 283 write_default.0.24
ok 284 write_valid.0.24
ok 285 write_invalid.0.24
ok 286 event_missing.0.24
ok 287 event_spurious.0.24
ok 288 get_value.0.23
# 0.23 PCMD3180 i2c2 Dev1 Ch8 Fine Volume
ok 289 name.0.23
ok 290 write_default.0.23
ok 291 write_valid.0.23
ok 292 write_invalid.0.23
ok 293 event_missing.0.23
ok 294 event_spurious.0.23
ok 295 get_value.0.22
# 0.22 PCMD3180 i2c2 Dev1 Ch7 Fine Volume
ok 296 name.0.22
ok 297 write_default.0.22
ok 298 write_valid.0.22
ok 299 write_invalid.0.22
ok 300 event_missing.0.22
ok 301 event_spurious.0.22
ok 302 get_value.0.21
# 0.21 PCMD3180 i2c2 Dev1 Ch6 Fine Volume
ok 303 name.0.21
ok 304 write_default.0.21
ok 305 write_valid.0.21
ok 306 write_invalid.0.21
ok 307 event_missing.0.21
ok 308 event_spurious.0.21
ok 309 get_value.0.20
# 0.20 PCMD3180 i2c2 Dev1 Ch5 Fine Volume
ok 310 name.0.20
ok 311 write_default.0.20
ok 312 write_valid.0.20
ok 313 write_invalid.0.20
ok 314 event_missing.0.20
ok 315 event_spurious.0.20
ok 316 get_value.0.19
# 0.19 PCMD3180 i2c2 Dev1 Ch4 Fine Volume
ok 317 name.0.19
ok 318 write_default.0.19
ok 319 write_valid.0.19
ok 320 write_invalid.0.19
ok 321 event_missing.0.19
ok 322 event_spurious.0.19
ok 323 get_value.0.18
# 0.18 PCMD3180 i2c2 Dev1 Ch3 Fine Volume
ok 324 name.0.18
ok 325 write_default.0.18
ok 326 write_valid.0.18
ok 327 write_invalid.0.18
ok 328 event_missing.0.18
ok 329 event_spurious.0.18
ok 330 get_value.0.17
# 0.17 PCMD3180 i2c2 Dev1 Ch2 Fine Volume
ok 331 name.0.17
ok 332 write_default.0.17
ok 333 write_valid.0.17
ok 334 write_invalid.0.17
ok 335 event_missing.0.17
ok 336 event_spurious.0.17
ok 337 get_value.0.16
# 0.16 PCMD3180 i2c2 Dev1 Ch1 Fine Volume
ok 338 name.0.16
ok 339 write_default.0.16
ok 340 write_valid.0.16
ok 341 write_invalid.0.16
ok 342 event_missing.0.16
ok 343 event_spurious.0.16
ok 344 get_value.0.15
# 0.15 PCMD3180 i2c2 Dev0 Ch8 Digi Volume
ok 345 name.0.15
ok 346 write_default.0.15
ok 347 write_valid.0.15
ok 348 write_invalid.0.15
ok 349 event_missing.0.15
ok 350 event_spurious.0.15
ok 351 get_value.0.14
# 0.14 PCMD3180 i2c2 Dev0 Ch7 Digi Volume
ok 352 name.0.14
ok 353 write_default.0.14
ok 354 write_valid.0.14
ok 355 write_invalid.0.14
ok 356 event_missing.0.14
ok 357 event_spurious.0.14
ok 358 get_value.0.13
# 0.13 PCMD3180 i2c2 Dev0 Ch6 Digi Volume
ok 359 name.0.13
ok 360 write_default.0.13
ok 361 write_valid.0.13
ok 362 write_invalid.0.13
ok 363 event_missing.0.13
ok 364 event_spurious.0.13
ok 365 get_value.0.12
# 0.12 PCMD3180 i2c2 Dev0 Ch5 Digi Volume
ok 366 name.0.12
ok 367 write_default.0.12
ok 368 write_valid.0.12
ok 369 write_invalid.0.12
ok 370 event_missing.0.12
ok 371 event_spurious.0.12
ok 372 get_value.0.11
# 0.11 PCMD3180 i2c2 Dev0 Ch4 Digi Volume
ok 373 name.0.11
ok 374 write_default.0.11
ok 375 write_valid.0.11
ok 376 write_invalid.0.11
ok 377 event_missing.0.11
ok 378 event_spurious.0.11
ok 379 get_value.0.10
# 0.10 PCMD3180 i2c2 Dev0 Ch3 Digi Volume
ok 380 name.0.10
ok 381 write_default.0.10
ok 382 write_valid.0.10
ok 383 write_invalid.0.10
ok 384 event_missing.0.10
ok 385 event_spurious.0.10
ok 386 get_value.0.9
# 0.9 PCMD3180 i2c2 Dev0 Ch2 Digi Volume
ok 387 name.0.9
ok 388 write_default.0.9
ok 389 write_valid.0.9
ok 390 write_invalid.0.9
ok 391 event_missing.0.9
ok 392 event_spurious.0.9
ok 393 get_value.0.8
# 0.8 PCMD3180 i2c2 Dev0 Ch1 Digi Volume
ok 394 name.0.8
ok 395 write_default.0.8
ok 396 write_valid.0.8
ok 397 write_invalid.0.8
ok 398 event_missing.0.8
ok 399 event_spurious.0.8
ok 400 get_value.0.7
# 0.7 PCMD3180 i2c2 Dev0 Ch8 Fine Volume
ok 401 name.0.7
ok 402 write_default.0.7
ok 403 write_valid.0.7
ok 404 write_invalid.0.7
ok 405 event_missing.0.7
ok 406 event_spurious.0.7
ok 407 get_value.0.6
# 0.6 PCMD3180 i2c2 Dev0 Ch7 Fine Volume
ok 408 name.0.6
ok 409 write_default.0.6
ok 410 write_valid.0.6
ok 411 write_invalid.0.6
ok 412 event_missing.0.6
ok 413 event_spurious.0.6
ok 414 get_value.0.5
# 0.5 PCMD3180 i2c2 Dev0 Ch6 Fine Volume
ok 415 name.0.5
ok 416 write_default.0.5
ok 417 write_valid.0.5
ok 418 write_invalid.0.5
ok 419 event_missing.0.5
ok 420 event_spurious.0.5
ok 421 get_value.0.4
# 0.4 PCMD3180 i2c2 Dev0 Ch5 Fine Volume
ok 422 name.0.4
ok 423 write_default.0.4
ok 424 write_valid.0.4
ok 425 write_invalid.0.4
ok 426 event_missing.0.4
ok 427 event_spurious.0.4
ok 428 get_value.0.3
# 0.3 PCMD3180 i2c2 Dev0 Ch4 Fine Volume
ok 429 name.0.3
ok 430 write_default.0.3
ok 431 write_valid.0.3
ok 432 write_invalid.0.3
ok 433 event_missing.0.3
ok 434 event_spurious.0.3
ok 435 get_value.0.2
# 0.2 PCMD3180 i2c2 Dev0 Ch3 Fine Volume
ok 436 name.0.2
ok 437 write_default.0.2
ok 438 write_valid.0.2
ok 439 write_invalid.0.2
ok 440 event_missing.0.2
ok 441 event_spurious.0.2
ok 442 get_value.0.1
# 0.1 PCMD3180 i2c2 Dev0 Ch2 Fine Volume
ok 443 name.0.1
ok 444 write_default.0.1
ok 445 write_valid.0.1
ok 446 write_invalid.0.1
ok 447 event_missing.0.1
ok 448 event_spurious.0.1
ok 449 get_value.0.0
# 0.0 PCMD3180 i2c2 Dev0 Ch1 Fine Volume
ok 450 name.0.0
ok 451 write_default.0.0
ok 452 write_valid.0.0
ok 453 write_invalid.0.0
ok 454 event_missing.0.0
ok 455 event_spurious.0.0
# Totals: pass:455 fail:0 xfail:0 xpass:0 skip:0 error:0
Merge series from Seven Lee <wtli@nuvoton.com>:
Change the original fixed delay to the assignment from the property. It
will make it more flexible to different platforms to avoid pop noise at
the beginning of recording.
Merge series from Cezary Rojewski <cezary.rojewski@intel.com>:
The change is based on rafael/acpi-nhlt [1] immutable branch which
Rafael kindly prepared for me. Without the topmost changes to ACPI/NHLT,
the patches present will fail to compile.
Recent changes for the ACPI tree [2] refactored interfaces of the NHLT
table. Currently we have two implementations - one found in acpi
subsystem (unused) and one in sound/hda/. As NHLT is part of ACPI, idea
is to make the former useful and then switch all users of existing
sound/hda/intel-nhlt.c to this new interface over time and remove the
duplicate afterward.
[1]: https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git/?h=acpi-nhlt
[2]: https://lore.kernel.org/linux-acpi/20240319083018.3159716-1-cezary.rojewski@intel.com/
Turbostat assumed that every package had a die_id = 0.
When this assumption was violated, it exited
when looking for the package uncore frequency:
turbostat: /sys/.../intel_uncore_frequency/package_01_die_00/current_freq_khz: open failed: No such file or directory
Signed-off-by: Len Brown <len.brown@intel.com>
If sysfs directory "intel_uncore_frequency/cluster00/" exists,
then use uncore cluster code (now its own routine).
The previous check for
"intel_uncore_frequency/package_00_die_00/current_freq_khz",
could be unreliable in the face of sparse die id's.
Signed-off-by: Len Brown <len.brown@intel.com>
Kernel developers often need to diagnose remote customer systems
with the latest turbostat, yet customers are running binary distros
with out-dated turbostat and the customer has no experience
cloning linux kernel trees.
Add a turbostat "snapshot" makefile target to create a standalone
source snapshot from the developer's git tree, appropriately hacked
so that the customer can build turbostat without a kernel tree.
Include the turbostat binary in the snapshot, for convenience in
those situations where the source and destination are trusted,
(and have new enough glibc to execute).
The snapshot is named with the date it was taken rather than
the turbostat VERSION, as it could occur between VERSIONS...
Signed-off-by: Len Brown <len.brown@intel.com>
The Tanix TX1 is a tiny TV box with the Allwinner H313 SoC. The box
features no Ethernet or an SD card slot, which makes booting from it
somewhat interesting: Pressing the hidden FEL button and using a USB-A
to USB-A cable to upload code from a host PC is one way to run mainline.
The box features:
- Allwinner H313 SoC (4 * Arm Cortex-A53 cores)
- 1 or 2 GB DRAM
- 8 or 16 GB eMMC flash
- SCI S9082H WiFi chip
- HDMI port
- one USB 2.0 port
- 3.5mm AV port
- barrel plug 5V DC input via barrel plug
The devicetree covers most peripherals.
The eMMC did not work properly in HS200 speed mode, so this mode property
is omitted. HS-DDR seems to work fine.
The blue LED is connected to the same GPIO pin as the red LED, just
using the opposite polarity. Apparently there is no way of describing
this in DT, so the red LED is omitted.
Next to the FEL button is a hidden button, that can be pushed by using
something like a paperclip, through the ventilation vents of the case.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20240418104942.1556914-3-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
The Tanix TX1 is a tiny TV box with the Allwinner H313 SoC, a lower bin
version of the Allwinner H616. It comes with no SD card slot or Ethernet
port.
Add the board/SoC compatible string pair to the list of known boards.
Since the H313 does not look different from a software point of view,
we keep the H616 compatible string.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240418104942.1556914-2-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
This loop definition automatically releases the handle on early exit
reducing the chance of bugs that cause resource leaks.
Co-developed-by: Briza Mel Dias de Sousa <brizamel.dias@usp.br>
Signed-off-by: Briza Mel Dias de Sousa <brizamel.dias@usp.br>
Signed-off-by: Lorenzo Bertin Salvador <lorenzobs@usp.br>
Link: https://lore.kernel.org/r/20240420182744.153184-2-lorenzobs@usp.br
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Here are some small char/misc and other driver fixes for 6.9-rc5.
Included in here are the following:
- binder driver fix for reported problem
- speakup crash fix
- mei driver fixes for reported problems
- comdei driver fix
- interconnect driver fixes
- rtsx driver fix
- peci.h kernel doc fix
All of these have been in linux-next for over a week with no reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.9-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char / misc driver fixes from Greg KH:
"Here are some small char/misc and other driver fixes for 6.9-rc5.
Included in here are the following:
- binder driver fix for reported problem
- speakup crash fix
- mei driver fixes for reported problems
- comdei driver fix
- interconnect driver fixes
- rtsx driver fix
- peci.h kernel doc fix
All of these have been in linux-next for over a week with no reported
problems"
* tag 'char-misc-6.9-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc:
peci: linux/peci.h: fix Excess kernel-doc description warning
binder: check offset alignment in binder_get_object()
comedi: vmk80xx: fix incomplete endpoint checking
mei: vsc: Unregister interrupt handler for system suspend
Revert "mei: vsc: Call wake_up() in the threaded IRQ handler"
misc: rtsx: Fix rts5264 driver status incorrect when card removed
mei: me: disable RPL-S on SPS and IGN firmwares
speakup: Avoid crash on very long word
interconnect: Don't access req_list while it's being manipulated
interconnect: qcom: x1e80100: Remove inexistent ACV_PERF BCM
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-16-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-15-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-14-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-13-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-12-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-11-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-10-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
While at it, let's remove the bridge properties from board dts as they are
now redundant.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-9-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-8-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-7-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-6-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-5-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-4-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-3-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-2-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-1-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This regulator is responsible not just for the PCIe 3.3v rail, but also
for 5v VBUS on the left USB port. There is currently no way to correctly
model this dependency on the USB controller, as a result when the PCIe
driver is not available (for example when in the initramfs) USB is
non-functional.
Until support is added for modelling this property (likely by
referencing it as a supply under a usb-connector node), let's just make
it always on. We don't target any power constrained usecases and this
regulator is required for USB to function correctly.
Fixes: 3f72e2d3e6 ("arm64: dts: qcom: Add Dragonboard 845c")
Suggested-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240320122515.3243711-1-caleb.connolly@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Clang warns (or errors with CONFIG_WERROR):
sound/usb/mixer_scarlett2.c:3697:6: error: variable 'err' is used uninitialized whenever 'if' condition is false [-Werror,-Wsometimes-uninitialized]
3697 | if (private->autogain_updated) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~
sound/usb/mixer_scarlett2.c:3707:9: note: uninitialized use occurs here
3707 | return err;
| ^~~
sound/usb/mixer_scarlett2.c:3697:2: note: remove the 'if' if its condition is always true
3697 | if (private->autogain_updated) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
sound/usb/mixer_scarlett2.c:3688:9: note: initialize the variable 'err' to silence this warning
3688 | int err;
| ^
| = 0
1 error generated.
Initialize ret to zero to ensure ret is initialized in all paths within
scarlett2_ag_target_ctl_get(), which matches the style of other
functions in this driver.
Fixes: e30ea5340c ("ALSA: scarlett2: Add autogain target controls")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Message-ID: <20240419-alsa-scarlett2-fix-wsometimes-uninitialized-v1-1-e2ace8642e08@kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Here are 2 changes for 6.9-rc5 that deal with "driver core" stuff, that
do the following:
- sysfs reference leak fix
- embargoed-hardware-issues.rst update for Power
Both of these have been in linux-next for over a week with no reported
issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-6.9-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
Pull kernfs bugfix and documentation update from Greg KH:
"Here are two changes for 6.9-rc5 that deal with "driver core" stuff,
that do the following:
- sysfs reference leak fix
- embargoed-hardware-issues.rst update for Power
Both of these have been in linux-next for over a week with no reported
issues"
* tag 'driver-core-6.9-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
Documentation: embargoed-hardware-issues.rst: Add myself for Power
fs: sysfs: Fix reference leak in sysfs_break_active_protection()
On Qcom SoCs, the PCIe host bridge is connected to a single PCIe bridge
for each controller instance. Hence, add a node to represent the bridge.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240321-pcie-qcom-bridge-dts-v2-20-1eb790c53e43@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
