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Author SHA1 Message Date
Arnd Bergmann
b0f9a3111d This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.7, please pull the following:
 
 - Stefan adds GPIO labels to the Raspberry Pi 4 Model B board DTS
 
 - Nicolas moves the eMMC2 controller into its separate node in order for
   platform firmware to perform the necessary "dma-ranges" property
   patching based on the chip revision since the eMMC controller has
   different addressing constraints.
 
 - Florian convers a whole bunch of Broadcom boards bindings from text to
   YAML.
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Merge tag 'arm-soc/for-5.7/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.7, please pull the following:

- Stefan adds GPIO labels to the Raspberry Pi 4 Model B board DTS

- Nicolas moves the eMMC2 controller into its separate node in order for
  platform firmware to perform the necessary "dma-ranges" property
  patching based on the chip revision since the eMMC controller has
  different addressing constraints.

- Florian convers a whole bunch of Broadcom boards bindings from text to
  YAML.

* tag 'arm-soc/for-5.7/devicetree' of https://github.com/Broadcom/stblinux:
  dt-bindings: arm: Document Broadcom SoCs 'secondary-boot-reg'
  dt-bindings: arm: bcm: Convert Vulcan to YAML
  dt-bindings: arm: bcm: Convert BCM11351 to YAML
  dt-bindings: arm: bcm: Convert BCM4708 to YAML
  dt-bindings: arm: bcm: Convert BCM23550 to YAML
  dt-bindings: arm: bcm: Convert BCM21664 to YAML
  dt-bindings: arm: bcm: Convert Stingray to YAML
  dt-bindings: arm: bcm: Convert Northstar 2 to YAML
  dt-bindings: arm: bcm: Convert Northstar Plus to YAML
  dt-bindings: arm: bcm: Convert Hurricane 2 to YAML
  dt-bindings: arm: bcm: Convert Cygnus to YAML
  ARM: dts: bcm2711: Move emmc2 into its own bus
  ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

Link: https://lore.kernel.org/r/20200311212012.9418-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:41:32 +01:00
Chunyan Zhang
2cedfe1247 arm64: dts: specify console via command line
The SPRD serial driver need to know which serial port would be used as
console in an early period during initialization, otherwise console
init would fail since we added this feature[1].

So this patch add console to command line via devicetree.

[1] https://lore.kernel.org/lkml/20190826072929.7696-4-zhang.lyra@gmail.com/

Link: https://lore.kernel.org/r/20200311112120.30890-1-zhang.lyra@gmail.com
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:40:54 +01:00
Arnd Bergmann
8f79ec4639 Devicetree changes for omaps for v5.7 merge window
Few device tree changes for omaps for v5.7 to configure omap5
 AESS module and to add idle_states for am335x and am437x cpuidle.
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Merge tag 'omap-for-v5.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.7 merge window

Few device tree changes for omaps for v5.7 to configure omap5
AESS module and to add idle_states for am335x and am437x cpuidle.

* tag 'omap-for-v5.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am4372: Add idle_states for cpuidle
  ARM: dts: am33xx: Add idle_states for cpuidle
  ARM: dts: Configure omap5 AESS

Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com-4
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:40:08 +01:00
Arnd Bergmann
56fc0e678f Versatile DTS updates for the v5.7 series take one:
- Schema validation for the top level of all ARM reference
   designs: Integrator, Versatile, RealView, Juno.
 - Clean up some node names in the trees so they pass
   validation fine.
 - Drop the old text bindings.
 - A top level DMA ranges patch from Rob.
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Merge tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt

Versatile DTS updates for the v5.7 series take one:

- Schema validation for the top level of all ARM reference
  designs: Integrator, Versatile, RealView, Juno.
- Clean up some node names in the trees so they pass
  validation fine.
- Drop the old text bindings.
- A top level DMA ranges patch from Rob.

* tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM/arm64: dts: Rename SMB bus to just bus
  dt-bindings: arm: Drop the non-YAML bindings
  dt-bindings: arm: Add Versatile Express and Juno YAML schema
  dt-bindings: arm: Add RealView YAML schema
  dt-bindings: arm: Add Versatile YAML schema
  dt-bindings: arm: Add Integrator YAML schema
  ARM: dts: RealView: Fix the name of the SoC node
  ARM: dts: Versatile: Use syscon as node name for IB2
  ARM: dts: integratorap: Remove top level dma-ranges

Link: https://lore.kernel.org/r/CACRpkdbbniYVnsE-pAmU2qCerswserNgEFtY48XQ+_K+DUNC9Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:39:16 +01:00
Arnd Bergmann
7d716bd4b6 Renesas ARM64 DT updates for v5.7
- CryptoCell support for R-Car M3-W, M3-W+, M3-N, E3, and D3,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm64-dt-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM64 DT updates for v5.7

  - CryptoCell support for R-Car M3-W, M3-W+, M3-N, E3, and D3,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm64-dt-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: rzg2: Add reset control properties for display
  arm64: dts: renesas: rcar-gen3: Add reset control properties for display
  arm64: dts: renesas: Remove use of ARCH_R8A7795
  arm64: dts: renesas: rcar-gen3: Add CCREE nodes
  arm64: dts: renesas: rcar-gen3: Replace "vsps" by "renesas,vsps"
  arm: dts: renesas: r8a77980: Remove r8a77970 DU compatible

Link: https://lore.kernel.org/r/20200226110221.19288-5-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:24:44 +01:00
Arnd Bergmann
3cd3fabd82 Renesas ARM DT updates for v5.7
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.7

  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: dts: rzg1: Add reset control properties for display
  ARM: dts: rcar-gen2: Add reset control properties for display
  ARM: dts: r8a7745: Convert to new DU DT bindings
  ARM: dts: r7s72100: Add SPIBSC clocks
  ARM: dts: renesas: Group tuples in operating-points properties
  ARM: dts: renesas: Add missing ethernet PHY reset GPIO on Gen2 reference boards

Link: https://lore.kernel.org/r/20200226110221.19288-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:20:18 +01:00
David S. Miller
2910594fd3 wireless-drivers fixes for v5.6
Fourth, and last, set of fixes for v5.6. Just two important fixes to
 iwlwifi regressions.
 
 iwlwifi
 
 * fix GEO_TX_POWER_LIMIT command on certain devices which caused
   firmware to crash during initialisation
 
 * add back device ids for three devices which were accidentally
   removed
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Merge tag 'wireless-drivers-2020-03-25' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers

Kalle Valo says:

====================
wireless-drivers fixes for v5.6

Fourth, and last, set of fixes for v5.6. Just two important fixes to
iwlwifi regressions.

iwlwifi

* fix GEO_TX_POWER_LIMIT command on certain devices which caused
  firmware to crash during initialisation

* add back device ids for three devices which were accidentally
  removed
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-25 13:12:26 -07:00
Arnd Bergmann
c43ff6a814 cpuidle: tegra: Changes for v5.7-rc1
These changes unify CPU idle support for Tegra20, Tegra30 and Tegra114.
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Merge tag 'tegra-for-5.7-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc

cpuidle: tegra: Changes for v5.7-rc1

These changes unify CPU idle support for Tegra20, Tegra30 and Tegra114.

* tag 'tegra-for-5.7-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  cpuidle: tegra: Disable CC6 state if LP2 unavailable
  cpuidle: tegra: Squash Tegra114 driver into the common driver
  cpuidle: tegra: Squash Tegra30 driver into the common driver
  cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle

Link: https://lore.kernel.org/r/20200313165848.2915133-9-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:10:14 +01:00
Arnd Bergmann
880e19294c arm64: soc: ZynqMP SoC changes for v5.7
- Change firmware dependency to be able to disable it
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Merge tag 'zynqmp-soc-for-v5.7' of https://github.com/Xilinx/linux-xlnx into arm/soc

arm64: soc: ZynqMP SoC changes for v5.7

- Change firmware dependency to be able to disable it

* tag 'zynqmp-soc-for-v5.7' of https://github.com/Xilinx/linux-xlnx:
  arm64: zynqmp: Make zynqmp_firmware driver optional
  include: linux: firmware: Correct config dependency of zynqmp_eemi_ops

Link: https://lore.kernel.org/r/ecef6de5-8318-9f88-db8c-7c33fe44901f@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:06:37 +01:00
Arnd Bergmann
d0d593464a ARM: Xilinx Zynq SoC patches for v5.7
- Use proper clock header in soc code
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Merge tag 'zynq-soc-for-v5.7' of https://github.com/Xilinx/linux-xlnx into arm/soc

ARM: Xilinx Zynq SoC patches for v5.7

- Use proper clock header in soc code

* tag 'zynq-soc-for-v5.7' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: Replace <linux/clk-provider.h> by <linux/of_clk.h>

Link: https://lore.kernel.org/r/005af9f0-85b5-7bac-2d99-5bb3857debb3@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:05:22 +01:00
Arnd Bergmann
ec18b456be AT91 SoC for 5.7
- Rework PM to support sam9x60
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Merge tag 'at91-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc

AT91 SoC for 5.7

 - Rework PM to support sam9x60

* tag 'at91-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: at91: pm: add quirk for sam9x60's ulp1
  ARM: at91: pm: add plla disable/enable support for sam9x60
  clk: at91: move sam9x60's PLL register offsets to PMC header
  ARM: at91: pm: s/sfr/sfrbu in pm_suspend.S
  ARM: at91: pm: add pmc_version member to at91_pm_data
  ARM: at91: pm: add macros for plla disable/enable
  ARM: at91: pm: revert do not disable/enable PLLA for ULP modes
  ARM: at91: pm: use proper master clock register offset
  ARM: at91: Drop unneeded select of COMMON_CLK

Link: https://lore.kernel.org/r/20200322090116.GA208895@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:04:15 +01:00
Arnd Bergmann
fd91e03e5f pmic wrapper:
- add support for MT6779 SoC
 
 cmdq-helper:
 - set knows_txdone in mailbox client
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Merge tag 'v5.6-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/soc

pmic wrapper:
- add support for MT6779 SoC

cmdq-helper:
- set knows_txdone in mailbox client

* tag 'v5.6-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: pwrap: add support for MT6359 PMIC
  soc: mediatek: pwrap: add pwrap driver for MT6779 SoCs
  dt-bindings: pwrap: mediatek: add pwrap support for MT6779
  soc: mediatek: knows_txdone needs to be set in Mediatek CMDQ helper

Link: https://lore.kernel.org/r/61165e91-f211-ad37-a81c-cbf3ff69fa1b@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:03:31 +01:00
Arnd Bergmann
a4b58e00c9 i.MX SoC changes for 5.7:
- A number of cleanups from Anson Huang to remove unneeded includes,
    drop unnecessary newlines and base check etc.
  - Apply Cortex-A9 specific errata only to Cortex-A9 based i.MX SoCs
    and avoid impacting Cortex-A7 based designs.
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Merge tag 'imx-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc

i.MX SoC changes for 5.7:

 - A number of cleanups from Anson Huang to remove unneeded includes,
   drop unnecessary newlines and base check etc.
 - Apply Cortex-A9 specific errata only to Cortex-A9 based i.MX SoCs
   and avoid impacting Cortex-A7 based designs.

* tag 'imx-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: Drop unnecessary src_base check
  ARM: imx: Remove unnecessary blank lines
  ARM: imx: Add missing of_node_put()
  ARM: imx: Remove unused include of linux/of.h on mach-imx6sl.c
  ARM: imx: Remove unused includes on mach-imx6q.c
  ARM: imx: Remove unused include of linux/irqchip/arm-gic.h
  ARM: imx: limit errata selection to Cortex-A9 based designs

Link: https://lore.kernel.org/r/20200318051918.32579-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:02:02 +01:00
Arnd Bergmann
ca1fa06bdb mvebu arm for 5.6 (part 1)
Various cleanup:
 
 On Orion5x:
 - Drop unneeded select of PCI_DOMAINS_GENERIC
 - Remove unneeded variable ret
 - Replace setup_irq() by request_irq()
 
 On Dove: Mark dove_io_desc as __maybe_unused
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Merge tag 'mvebu-arm-5.7-1' of git://git.infradead.org/linux-mvebu into arm/soc

mvebu arm for 5.6 (part 1)

Various cleanup:

On Orion5x:
- Drop unneeded select of PCI_DOMAINS_GENERIC
- Remove unneeded variable ret
- Replace setup_irq() by request_irq()

On Dove: Mark dove_io_desc as __maybe_unused

* tag 'mvebu-arm-5.7-1' of git://git.infradead.org/linux-mvebu:
  arm: mach-dove: Mark dove_io_desc as __maybe_unused
  ARM: orion: replace setup_irq() by request_irq()
  ARM: orion5x: ts78xx: Remove unneeded variable ret
  ARM: orion5x: Drop unneeded select of PCI_DOMAINS_GENERIC

Link: https://lore.kernel.org/r/87eetux7um.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 21:00:52 +01:00
Arnd Bergmann
10996b2404 ARM: tegra: Core changes for v5.7-rc1
These patches a preparatory work to move the CPU idle drivers into
 drivers/cpuidle.
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Merge tag 'tegra-for-5.7-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc

ARM: tegra: Core changes for v5.7-rc1

These patches a preparatory work to move the CPU idle drivers into
drivers/cpuidle.

* tag 'tegra-for-5.7-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: cpuidle: Remove unnecessary memory barrier
  ARM: tegra: cpuidle: Make abort_flag atomic
  ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
  ARM: tegra: Make outer_disable() open-coded
  ARM: tegra: Rename some of the newly exposed PM functions
  ARM: tegra: Expose PM functions required for new cpuidle driver
  ARM: tegra: Propagate error from tegra_idle_lp2_last()
  ARM: tegra: Change tegra_set_cpu_in_lp2() type to void
  ARM: tegra: Remove pen-locking from cpuidle-tegra20
  ARM: tegra: Add tegra_pm_park_secondary_cpu()
  ARM: tegra: Compile sleep-tegra20/30.S unconditionally

Link: https://lore.kernel.org/r/20200313165848.2915133-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:58:56 +01:00
Arnd Bergmann
94af02c4bc soc/tegra: Changes for v5.7-rc1
These changes implement various clocks that are controlled by the PMC
 and add support for configuring the voltage level of some pins (needed
 for example to support high-speed modes on the SD/MMC interfaces).
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Merge tag 'tegra-for-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc

soc/tegra: Changes for v5.7-rc1

These changes implement various clocks that are controlled by the PMC
and add support for configuring the voltage level of some pins (needed
for example to support high-speed modes on the SD/MMC interfaces).

* tag 'tegra-for-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Cleanup whitespace usage
  soc/tegra: pmc: Add pins for Tegra194
  soc/tegra: Add support for 32 kHz blink clock
  soc/tegra: Add Tegra PMC clocks registration into PMC driver
  dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
  dt-bindings: phy: tegra-xusb: Add usb-role-switch
  dt-bindings: phy: tegra: Add Tegra194 support
  dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
  dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
  dt-bindings: tegra: Convert Tegra PMC bindings to YAML
  dt-bindings: clock: tegra: Add IDs for OSC clocks

Link: https://lore.kernel.org/r/20200313165848.2915133-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:56:55 +01:00
Arnd Bergmann
2d5c31a072 STM32 SoC updates for v5.7, round 1
Highlights:
 ----------
 
  - Add early console support for all STM32 SoCs: F4/F7/H7/MP1
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Merge tag 'stm32-soc-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/soc

STM32 SoC updates for v5.7, round 1

Highlights:
----------

 - Add early console support for all STM32 SoCs: F4/F7/H7/MP1

* tag 'stm32-soc-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: debug: stm32: add UART early console support for STM32MP1
  ARM: debug: stm32: add UART early console support for STM32H7
  ARM: debug: stm32: add UART early console configuration for STM32F7
  ARM: debug: stm32: add UART early console configuration for STM32F4

Link: https://lore.kernel.org/r/4e427e37-99c9-239a-f3f8-a3bf50eb1eb2@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:56:29 +01:00
Arnd Bergmann
ce5b71d3ff Allwinner Core Changes for v5.7
Just one change for our mach code for including the correct clk header.
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Merge tag 'sunxi-core-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/soc

Allwinner Core Changes for v5.7

Just one change for our mach code for including the correct clk header.

* tag 'sunxi-core-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: sunxi: Replace <linux/clk-provider.h> by <linux/of_clk.h>

Link: https://lore.kernel.org/r/20200313055342.GA19760@wens.csie.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:55:54 +01:00
Arnd Bergmann
7cd6fa6062 This pull request contains Broadcom ARM64 SoCs changes for 5.7, please
pull the following:
 
 - Geert drops the non-existent HAVE_ARM_ARCH_TIMER symbol select for
   ARCH_BCM2835
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Merge tag 'arm-soc/for-5.7/soc-arm64' of https://github.com/Broadcom/stblinux into arm/soc

This pull request contains Broadcom ARM64 SoCs changes for 5.7, please
pull the following:

- Geert drops the non-existent HAVE_ARM_ARCH_TIMER symbol select for
  ARCH_BCM2835

* tag 'arm-soc/for-5.7/soc-arm64' of https://github.com/Broadcom/stblinux:
  arm64: bcm2835: Drop select of nonexistent HAVE_ARM_ARCH_TIMER

Link: https://lore.kernel.org/r/20200311212012.9418-4-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:55:15 +01:00
Arnd Bergmann
27262a7544 This pull request contains Broadcom ARM-based SoCs changes for 5.7,
please pull the following:
 
 - Geert drops redundant selects for Broadcom SoCs which are already
   implied by ARCH_MULTI_V6_V7
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Merge tag 'arm-soc/for-5.7/soc' of https://github.com/Broadcom/stblinux into arm/soc

This pull request contains Broadcom ARM-based SoCs changes for 5.7,
please pull the following:

- Geert drops redundant selects for Broadcom SoCs which are already
  implied by ARCH_MULTI_V6_V7

* tag 'arm-soc/for-5.7/soc' of https://github.com/Broadcom/stblinux:
  ARM: bcm: Drop unneeded select of PCI_DOMAINS_GENERIC, HAVE_SMP, TIMER_OF

Link: https://lore.kernel.org/r/20200311212012.9418-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:54:38 +01:00
Arnd Bergmann
f40969fb56 PM changes for am335x and am437x for v5.7 merge window
A series of changes from Dave Gerlach to enable basic cpuidle support
 for am335x and am437x based on generic cpuidle-arm driver.
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Merge tag 'omap-for-v5.7/pm33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

PM changes for am335x and am437x for v5.7 merge window

A series of changes from Dave Gerlach to enable basic cpuidle support
for am335x and am437x based on generic cpuidle-arm driver.

* tag 'omap-for-v5.7/pm33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: omap2plus_defconfig: Add CONFIG_ARM_CPUIDLE
  soc: ti: pm33xx: Add base cpuidle support
  ARM: OMAP2+: pm33xx-core: Extend platform_data ops for cpuidle
  ARM: OMAP2+: pm33xx-core: Add cpuidle_ops for am335x/am437x
  dt-bindings: arm: cpu: Add TI AM335x and AM437x enable method

Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:52:42 +01:00
Arnd Bergmann
6480e7b38d SoC changes for omaps for v5.7 merge window
A change to improve the warning output for device tree data
 mismatch as compared to legacy platform data for ti-sysc
 related interconnect target modules.
 
 And change omap1 to request_irq() instead of setup_irq().
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Merge tag 'omap-for-v5.7/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

SoC changes for omaps for v5.7 merge window

A change to improve the warning output for device tree data
mismatch as compared to legacy platform data for ti-sysc
related interconnect target modules.

And change omap1 to request_irq() instead of setup_irq().

* tag 'omap-for-v5.7/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP: replace setup_irq() by request_irq()
  ARM: OMAP2+: Improve handling of ti-sysc related sysc_fields

Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:52:08 +01:00
Christoph Hellwig
43fcd9e1ea nvme: cleanup namespace identifier reporting in nvme_init_ns_head
Lift the common namespace identifier reporting between the shared
namespace and new nshead cases into common code.  This also means
one less lock is held while doing I/O.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:56 +09:00
Christoph Hellwig
026d2ef752 nvme: rename __nvme_find_ns_head to nvme_find_ns_head
There is no non __-prefixed version, so make the name a little more
readable.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:56 +09:00
Christoph Hellwig
fb314eb0cb nvme: refactor nvme_identify_ns_descs error handling
Move the handling of an error into the function from the caller, and
only do it for an actual error on the admin command itself, not the
command parsing, as that should be enough to deal with devices claiming
a bogus version compliance.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:56 +09:00
Israel Rukshin
bea54ef53f nvme-tcp: Add warning on state change failure at nvme_tcp_setup_ctrl
The transition to LIVE state should not fail in case of a new controller.
Moving to DELETING state before nvme_tcp_create_ctrl() allocates all the
resources may leads to NULL dereference at teardown flow (e.g., IO tagset,
admin_q, connect_q).

Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:56 +09:00
Israel Rukshin
96135862df nvme-rdma: Add warning on state change failure at nvme_rdma_setup_ctrl
The transition to LIVE state should not fail in case of a new controller.
Moving to DELETING state before nvme_tcp_create_ctrl() allocates all the
resources may leads to NULL dereference at teardown flow (e.g., IO tagset,
admin_q, connect_q).

Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:56 +09:00
Israel Rukshin
ce1518139e nvme: Fix controller creation races with teardown flow
Calling nvme_sysfs_delete() when the controller is in the middle of
creation may cause several bugs. If the controller is in NEW state we
remove delete_controller file and don't delete the controller. The user
will not be able to use nvme disconnect command on that controller again,
although the controller may be active. Other bugs may happen if the
controller is in the middle of create_ctrl callback and
nvme_do_delete_ctrl() starts. For example, freeing I/O tagset at
nvme_do_delete_ctrl() before it was allocated at create_ctrl callback.

To fix all those races don't allow the user to delete the controller
before it was fully created.

Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:56 +09:00
Israel Rukshin
726612b6b8 nvme: Make nvme_uninit_ctrl symmetric to nvme_init_ctrl
Put the ctrl reference count at nvme_uninit_ctrl as opposed to
nvme_init_ctrl which takes it. This decrease the reference count at the
core layer instead of decreasing it on each transport separately.
Also move the call of nvme_uninit_ctrl at PCI driver after calling to
nvme_release_prp_pools and nvme_dev_unmap, in order to put the reference
count after using the dev. This is safe because those functions use
nvme_dev which is freed only later at nvme_pci_free_ctrl.

Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:56 +09:00
Israel Rukshin
b780d7415a nvme: Fix ctrl use-after-free during sysfs deletion
In case nvme_sysfs_delete() is called by the user before taking the ctrl
reference count, the ctrl may be freed during the creation and cause the
bug. Take the reference as soon as the controller is externally visible,
which is done by cdev_device_add() in nvme_init_ctrl(). Also take the
reference count at the core layer instead of taking it on each transport
separately.

Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:56 +09:00
Israel Rukshin
253fd4ac80 nvme-pci: Re-order nvme_pci_free_ctrl
Destroy the resources in the same order like in nvme_probe error flow to
improve code readability.

Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:55 +09:00
Israel Rukshin
6721c18a06 nvme: Remove unused return code from nvme_delete_ctrl_sync
The return code of nvme_delete_ctrl_sync is never used, so change it to
void.

Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:55 +09:00
Israel Rukshin
e7c43feae2 nvme: Use nvme_state_terminal helper
Improve code readability.

Reviewed-by: Max Gurtovoy <maxg@mellanox.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:55 +09:00
Max Gurtovoy
f41cfd5d0a nvme: release ida resources
ida instances allocate some internal memory in addition to the base
'struct ida'. Use ida_destroy() to release that memory at module_exit().

Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:55 +09:00
masahiro31.yamada@kioxia.com
c225b61031 nvme: Add compat_ioctl handler for NVME_IOCTL_SUBMIT_IO
Currently 32 bit application gets ENOTTY when it calls
compat_ioctl with NVME_IOCTL_SUBMIT_IO in 64 bit kernel.

The cause is that the results of sizeof(struct nvme_user_io),
which is used to define NVME_IOCTL_SUBMIT_IO,
are not same between 32 bit compiler and 64 bit compiler.

* 32 bit: the result of sizeof nvme_user_io is 44.
* 64 bit: the result of sizeof nvme_user_io is 48.

64 bit compiler seems to add 32 bit padding for multiple of 8 bytes.

This patch adds a compat_ioctl handler.
The handler replaces NVME_IOCTL_SUBMIT_IO32 with NVME_IOCTL_SUBMIT_IO
in case 32 bit application calls compat_ioctl for submit in 64 bit kernel.
Then, it calls nvme_ioctl as usual.

Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Masahiro Yamada (KIOXIA) <masahiro31.yamada@kioxia.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:55 +09:00
Sagi Grimberg
e90d172b11 nvmet-tcp: optimize tcp stack TX when data digest is used
If we have a 4-byte data digest to send to the wire, but we
have more data to send, set MSG_MORE to tell the stack
that more is coming.

Reviewed-by: Mark Wunderlich <mark.wunderlich@intel.com>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:55 +09:00
Takashi Iwai
8d8a50e20d nvme-fabrics: Use scnprintf() for avoiding potential buffer overflow
Since snprintf() returns the would-be-output size instead of the
actual output size, the succeeding calls may go beyond the given
buffer limit.  Fix it by replacing with scnprintf().

Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:55 +09:00
John Meneghini
764e933209 nvme-multipath: do not reset on unknown status
The nvme multipath error handling defaults to controller reset if the
error is unknown. There are, however, no existing nvme status codes that
indicate a reset should be used, and resetting causes unnecessary
disruption to the rest of IO.

Change nvme's error handling to first check if failover should happen.
If not, let the normal error handling take over rather than reset the
controller.

Based-on-a-patch-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Hannes Reinecke <hare@suse.de>
Signed-off-by: John Meneghini <johnm@netapp.com>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:55 +09:00
Max Gurtovoy
c363f249e7 nvmet-rdma: allocate RW ctxs according to mdts
Current nvmet-rdma code allocates MR pool budget based on queue size,
assuming both host and target use the same "max_pages_per_mr" count.
After limiting the mdts value for RDMA controllers, we know the factor
of maximum MR's per IO operation. Thus, make sure MR pool will be
sufficient for the required IO depth and IO size.

That is, say host's SQ size is 100, then the MR pool budget allocated
currently at target will also be 100 MRs. But 100 IO WRITE Requests
with 256 sg_count(IO size above 1MB) require 200 MRs when target's
"max_pages_per_mr" is 128.

Reported-by: Krishnamraju Eraparaju <krishna2@chelsio.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
2020-03-26 04:51:55 +09:00
Max Gurtovoy
ec6d20e16c nvmet-rdma: Implement get_mdts controller op
Set the maximal data transfer size to be 1MB (currently mdts is
unlimited). This will allow calculating the amount of MR's that
one ctrl should allocate to fulfill it's capabilities.

Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
2020-03-26 04:51:55 +09:00
Max Gurtovoy
02cb00e233 nvmet: Add get_mdts op for controllers
Some transports, such as RDMA, would like to set the Maximum Data
Transfer Size (MDTS) according to device/port/ctrl characteristics.
This will enable the transport to set the optimal MDTS according to
controller needs and device capabilities. Add a new nvmet transport
op that is called during ctrl identification. This will not effect
transports that don't implement this option. The return value of the new
op is according to the NVMe spec definition for MDTS.

Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
Signed-off-by: Israel Rukshin <israelr@mellanox.com>
2020-03-26 04:51:54 +09:00
Max Gurtovoy
2db24e4a22 nvme-pci: properly print controller address
Align PCI address print with fabrics address that is printed with
newline character.

Before:
[root@server40 linux]# cat /sys/class/nvme/nvme2/address
0000:0b:00.0[root@server40 linux]#

After:
[root@server40 linux]# cat /sys/class/nvme/nvme2/address
0000:0b:00.0
[root@server40 linux]#

Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Max Gurtovoy <maxg@mellanox.com>
2020-03-26 04:51:54 +09:00
Sagi Grimberg
761ad26c45 nvme-tcp: break from io_work loop if recv failed
If we failed to receive data from the socket, don't try
to further process it, we will for sure be handling a queue
error at this point. While no issue was seen with the
current behavior thus far, its safer to cease socket processing
if we detected an error.

Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:51:45 +09:00
Sagi Grimberg
5ff4e11264 nvme-tcp: move send failure to nvme_tcp_try_send
Consolidate the request failure handling code to where
it is being fetched (nvme_tcp_try_send).

Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:50:21 +09:00
Sagi Grimberg
9cda34e374 nvmet-tcp: fix maxh2cdata icresp parameter
MAXH2CDATA is not zero based. Also no reason to limit ourselves to
1M transfers as we can do more easily. Make this an arbitrary limit
of 16M.

Reported-by: Wenhua Liu <liuw@vmware.com>
Cc: stable@vger.kernel.org # v5.0+
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:49:35 +09:00
Arnd Bergmann
af839cb0b3 Renesas ARM SoC updates for v5.7
- Enable ARM global timer on Cortex-A9 MPCore SoCs,
   - A minor cleanup.
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Merge tag 'renesas-arm-soc-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc

Renesas ARM SoC updates for v5.7

  - Enable ARM global timer on Cortex-A9 MPCore SoCs,
  - A minor cleanup.

* tag 'renesas-arm-soc-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: shmobile: Replace <linux/clk-provider.h> by <linux/of_clk.h>
  ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs

Link: https://lore.kernel.org/r/20200226110221.19288-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-25 20:49:02 +01:00
Sagi Grimberg
40510a639e nvme-tcp: optimize queue io_cpu assignment for multiple queue maps
Currently, queue io_cpu assignment is done sequentially for default,
read and poll queues based on queue id. This causes miss-alignment between
context of CPU initiating I/O and the I/O worker thread processing
queued requests or completions.

Change to modify queue io_cpu assignment to take into account queue
maps offset. Each queue io_cpu will start at zero for each queue map.
This essentially aligns read/poll queues to start over the same range as
default queues.

Testing performed by Mark with:
- ram device (nvmet)
- single CPU core (pinned)
- 100% 4k reads
- engine io_uring (not using sq_thread option)
- hipri flag set

Micro-benchmark results show a net gain of:
- increase of 18%-29% in IOPs
- reduction of 16%-22% in average latency
- reduction of 7%-23% in 99.99% latency

Baseline:
========
QDepth/Batch	| IOPs [k]	| Avg. Lat [us]	| 99.99% Lat [us]
-----------------------------------------------------------------
1/1 		| 32.4		| 30.11		| 50.94
32/8		| 179		| 168.20	| 371

CPU alignment:
=============
QDepth/Batch	| IOPs [k]	| Avg. Lat [us]	| 99.99% Lat [us]
-----------------------------------------------------------------
1/1 		| 38.5		|   25.18	| 39.16
32/8		| 231		|   130.75	| 343

Reported-by: Mark Wunderlich <mark.wunderlich@intel.com>
Signed-off-by: Sagi Grimberg <sagi@grimberg.me>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:48:06 +09:00
Keith Busch
fa059b856a nvme-pci: Simplify nvme_poll_irqdisable
The timeout handler can use the existing nvme_poll() if it needs to
check a polled queue, allowing nvme_poll_irqdisable() to handle only
irq driven queues for the remaining callers.

Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:48:06 +09:00
Keith Busch
324b494c28 nvme-pci: Remove two-pass completions
Completion handling had been done in two steps: find all new completions
under a lock, then handle those completions outside the lock. This was
done to make the locked section as short as possible so that other
threads using the same lock wait less time.

The driver no longer shares locks during completion, and is in fact
lockless for interrupt driven queues, so the optimization no longer
serves its original purpose. Replace the two-pass completion queue
handler with a single pass that completes entries immediately.

Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:48:06 +09:00
Keith Busch
bf392a5dc0 nvme-pci: Remove tag from process cq
The only user for tagged completion was for timeout handling. That user,
though, really only cares if the timed out command is completed, which
we can safely check within the timeout handler.

Remove the tag check to simplify completion handling.

Reviewed-by: Sagi Grimberg <sagi@grimberg.me>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-03-26 04:48:06 +09:00