The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on.
Also, notice that, dynamic memory allocations won't be affected by
this change:
"Flexible array members have incomplete type, and so the sizeof operator
may not be applied. As a quirk of the original implementation of
zero-length arrays, sizeof evaluates to zero."[1]
This issue was found with the help of Coccinelle.
[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Link: https://lore.kernel.org/r/20200217185437.GA20901@embeddedor
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add support for digital volume control. There is no dedicated register
for volume control but instead there are 4. The values of the registers
are determined with exponential floating point math.
So a table was created with register values for 2dB step increments
from -110dB to 0dB.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Link: https://lore.kernel.org/r/20200221124151.8774-1-dmurphy@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Use newly added GPIO defines GPIO_LINE_DIRECTION_IN and
GPIO_LINE_DIRECTION_OUT instead of using hard-coded 1 and 0.
Main benefit is to make it easier to see which values mean IN and which
OUT. As a side effect this helps GPIO framework to change the direction
defines to something else if ever needed.
Please note that return value from get_direction call on
pinctrl-axp209 driver was changed. Previously pinctrl-axp209 might have
returned value 2 for direction INPUT.
Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Reported-by: kbuild test robot <lkp@intel.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20200214135712.GA14557@localhost.localdomain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pin controller hardware does not distinguish IRQs intended for
wakeup from other IRQs, so we must mask non-wakeup IRQs in software to
prevent inadvertent wakeups. This is accomplished at the irqchip level
via the IRQCHIP_MASK_ON_SUSPEND flag.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200117213340.47714-2-samuel@sholland.org
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The pinctrl irqchip may be connected to an irqchip that implements the
.irq_set_wake callback, such as the R_INTC on A31 and newer sunxi SoCs.
In order for GPIOs to be able to trigger wakeup, the IRQ from the
pinctrl to the upper irqchip must also be enabled for wakeup. Since the
kernel's IRQ core already manages the "wake_depth" of each IRQ, no
additional accounting is needed in the pinctrl driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20200117213340.47714-1-samuel@sholland.org
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
All the irq related callbacks are called with the (raw) spinlock
desc->lock being held. So the lock here must be raw as well. Also irqs
were already disabled by the caller for the irq chip callbacks, so the
non-irq variants of spin_lock must be used there.
Fixes: be8c8facc7 ("gpio: new driver to work with a 8x12 siox")
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Link: https://lore.kernel.org/r/20200211135121.15752-1-uwe@kleine-koenig.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Commit f3186dd876 ("spi: Optionally use GPIO descriptors for CS GPIOs")
amended of_spi_parse_dt() to always set SPI_CS_HIGH for SPI slaves whose
Chip Select is defined by a "cs-gpios" devicetree property.
This change broke userspace applications which issue an SPI_IOC_WR_MODE
ioctl() to an spidev: Chip Select polarity will be incorrect unless the
application is changed to set SPI_CS_HIGH. And once changed, it will be
incompatible with kernels not containing the commit.
Fix by setting SPI_CS_HIGH in spidev_ioctl() (under the same conditions
as in of_spi_parse_dt()).
Fixes: f3186dd876 ("spi: Optionally use GPIO descriptors for CS GPIOs")
Reported-by: Simon Han <z.han@kunbus.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/fca3ba7cdc930cd36854666ceac4fbcf01b89028.1582027457.git.lukas@wunner.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org # v5.1+
spi_qup_suspend() will cause synchronous external abort when
runtime suspend is enabled and applied, as it tries to
access SPI controller register while clock is already disabled
in spi_qup_pm_suspend_runtime().
Signed-off-by: Yuji sasaki <sasakiy@chromium.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200214074340.2286170-1-vkoul@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This field is not used anywhere in the driver, so remove it.
Fixes: 36c684936f ("ASoC: Add sun8i digital audio codec")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20200217064250.15516-5-samuel@sholland.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Add reset control properties to the device nodes for the Display Units
on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a
single reset for each pair of DU channels.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-5-geert+renesas@glider.be
Add reset control properties to the device nodes for the Display Units
on all supported R-Car Gen3 SoCs. Note that on these SoCs, there is
only a single reset for each pair of DU channels.
The display nodes on R-Car V3M and V3H already had "resets" properties,
but lacked the corresponding "reset-names" properties.
Join the clocks lines while at it, to increase uniformity.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-4-geert+renesas@glider.be
CONFIG_ARCH_R8A7795 was split in CONFIG_ARCH_R8A77950 and
CONFIG_ARCH_R8A77951 in commit b925adfceb ("soc: renesas: Add
ARCH_R8A7795[01] for existing R-Car H3"), so its users can be removed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200218112414.5591-1-geert+renesas@glider.be
Replace the final user of CONFIG_ARCH_R8A7795 by CONFIG_ARCH_R8A77950 ||
CONFIG_ARCH_R8A77951, and remove the now unused CONFIG_ARCH_R8A7795
symbol definition.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200218112449.5723-1-geert+renesas@glider.be
The AIU audio controller on the Meson8 and Meson8b SoC families is
compatible with the one found in the later GXBB family. Add compatible
strings for these two older SoC families so the driver can be loaded for
them.
Instead of using the I2S divider from the AIU_CLK_CTRL_MORE register we
need to use the I2S divider from the AIU_CLK_CTRL register. This older
register is less flexible because it only supports four divider settings
(1, 2, 4, 8) compared to the AIU_CLK_CTRL_MORE register (which supports
dividers in the range 0..64).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20200220205711.77953-4-martin.blumenstingl@googlemail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Introduce a struct aiu_platform_data to make the driver aware of
platform specific information. Convert the existing check for the
internal stereo audio codec (only available on GXL) to this new struct.
Support for the 32-bit SoCs will need this as well because the
AIU_CLK_CTRL_MORE register doesn't have the I2S divider bits (and we
need to use the I2S divider from AIU_CLK_CTRL instead).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20200220205711.77953-3-martin.blumenstingl@googlemail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The AIU audio output controller on the Meson8 and Meson8b SoC families
is compatible with the one found in the GXBB family. Document the
compatible string for these two older SoCs.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20200220205711.77953-2-martin.blumenstingl@googlemail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
CONFIG_ARCH_R8A7795 was split in CONFIG_ARCH_R8A77950 and
CONFIG_ARCH_R8A77951 in commit b925adfceb ("soc: renesas: Add
ARCH_R8A7795[01] for existing R-Car H3"), so its users can be removed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200218112525.5834-1-geert+renesas@glider.be
CONFIG_ARCH_R8A7795 was split in CONFIG_ARCH_R8A77950 and
CONFIG_ARCH_R8A77951 in commit b925adfceb ("soc: renesas: Add
ARCH_R8A7795[01] for existing R-Car H3"), so its users can be removed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200218112557.5924-1-geert+renesas@glider.be
As of commit 4adeabd042 ("pinctrl: sh-pfc: Remove hardcoded IRQ
numbers"), only a single operation needs to be performed after finding
the wanted pin. Hence decrease the needed attention span of the casual
reader by replacing the goto by a direct return.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200212090200.11106-1-geert+renesas@glider.be
Add checks for legacy function GPIO descriptors:
1. Function GPIOs must have a name,
2. Names must be unique,
3. Enum ID values must be unique.
This exposes bugs like those fixed in
- commit 884caadad1 ("pinctrl: sh-pfc: sh7734: Fix duplicate
TCLK1_B"),
- commit 55b1cb1f03 ("pinctrl: sh-pfc: sh7264: Fix CAN function
GPIOs"),
- commit 02aeb2f215 ("pinctrl: sh-pfc: sh7269: Fix CAN function
GPIOs"),
- commit db9c07272c ("sh: sh7264: Remove bogus SSU GPIO function
definitions"),
- commit b4fba344a2 ("sh: sh7269: Remove bogus SSU GPIO function
definitions").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-14-geert+renesas@glider.be
Add checks for data register descriptors:
1. Register addresses must be unique.
2. Enum ID values must be unique.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-13-geert+renesas@glider.be
Add checks for drive strength register descriptors:
1. Register addresses must be unique,
2. Register fields must be non-overlapping,
3. Referred pins must exist.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-10-geert+renesas@glider.be
Improve the checks for pin group descriptors:
1. Introduce a local variable for the current group, to make the
checks easier to read,
2. Pin group names must be unique.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-9-geert+renesas@glider.be
Improve the checks for pin function descriptors:
1. Merge declaration and assignment of the local variable for the
current pin function,
2. Pin function names must be unique.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-8-geert+renesas@glider.be
Improve the checks for pin descriptors:
1. Introduce local variables for the current pin, to make the checks
easier to read,
2. Pins must have a name,
3. Fix double printing of identical pin names.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-7-geert+renesas@glider.be
Add a helper to verify that enum IDs are unique, and use it to validate
the enum ID arrays in config register descriptors.
This exposes bugs like those fixed in:
- commit 805f635703 ("pinctrl: sh-pfc: r8a7778: Fix duplicate
SDSELF_B and SD1_CLK_B"),
- commit 884caadad1 ("pinctrl: sh-pfc: sh7734: Fix duplicate
TCLK1_B"),
- commit 2a069a9281 ("pinctrl: sh-pfc: sh7264: Fix Port K I/O
Register 0 definition").
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-6-geert+renesas@glider.be
Add a helper to verify that register addresses are unique, and use it to
validate config register descriptors.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-5-geert+renesas@glider.be
Add a helper to check if two strings are identical, skipping NULL
pointers. This simplifies callers.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-4-geert+renesas@glider.be
Add helpers to report errors and warnings, and to increase the
corresponding counters. This simplifies callers.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200110131927.1029-3-geert+renesas@glider.be
Add device nodes for the CryptoCell instances on the various Renesas
R-Car Gen3 SoCs that do not have support for them yet in their device
trees (M3-W, M3-W+, M3-N, E3, D3).
The R-Car H3 device tree already supports this device.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20200124133330.16121-1-geert+renesas@glider.be
The Renesas-specific "vsps" property lacks a vendor prefix.
Add a "renesas," prefix to comply with DT best practises.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20191105183504.21447-4-geert+renesas@glider.be
The r8a77970 was added with a compatible string for a different device
rather than adding the correct compatible to the driver.
Remove the unnecessary compatible which is for a different platform.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/20190912103734.1879-1-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
of_get_regulator() will unconditionally add "-supply" to form the
property name. This is documented in commit 69511a452e ("map consumer
regulator based on device tree"). Remove the suffix from the requests.
Signed-off-by: Torsten Duwe <duwe@lst.de>
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20200218155440.BEFB968C65@verein.lst.de
At the moment, reading from in_magn_*_raw in sysfs tends to return
large values around 65000, even though the output of ak8974 is actually
limited to ±32768. This happens because the value is never converted
to the signed 16-bit integer variant.
Add an explicit cast to s16 to fix this.
Fixes: 7c94a8b2ee ("iio: magn: add a driver for AK8974")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Linus Waleij <linus.walleij@linaro.org>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Check the Header Type and exit from the host driver initialization if
it is not in host mode.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk>
There are some 8-bit and 16-bit registers in PCIe configuration
space, so add these accessors accordingly.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk>
Allow the mobiveil_host_init() function to be used to re-init
host controller's PAB and GPEX CSR register block, since the NXP
integrated Mobiveil IP has to reset and then re-init the PAB
and GPEX CSR registers upon hot-reset.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Reviewed-by: Andrew Murray <amurray@thegoodpenguin.co.uk>
