Commit graph

982,081 commits

Author SHA1 Message Date
Luca Weiss
6aa71bb876 ARM: dts: msm8974-FP2: Introduce the wcnss remoteproc node
Enable the remoteproc node and add the necessary pinctrl states.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20191104212302.105469-2-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:43:18 -08:00
Bjorn Andersson
c7c0edecfb ARM: dts: msm8974: Introduce the wcnss remoteproc node
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20191104212302.105469-1-luca@z3ntu.xyz
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:43:17 -08:00
Brian Masney
98073faf9f ARM: dts: qcom: msm8974: add interconnect nodes
Add interconnect nodes that's needed to support bus scaling.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20191024103140.10077-5-masneyb@onstation.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:43:17 -08:00
Brian Masney
a2cc991ed6 ARM: dts: qcom: msm8974: add ocmem node
Add ocmem node that is needed in order to support the GPU upstream.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20191024103140.10077-4-masneyb@onstation.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:43:17 -08:00
Brian Masney
dd973b89eb ARM: qcom_defconfig: add anx78xx HDMI bridge support
Add the Analogix anx78xx driver so that the external display over HDMI
can be used on Nexus 5 phones.

Reviewed-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20191024103140.10077-3-masneyb@onstation.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:50 -08:00
Brian Masney
ff9f2ad403 ARM: qcom_defconfig: add msm8974 interconnect support
Add interconnect support for msm8974-based SoCs in order to support the
GPU on this platform.

Reviewed-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Brian Masney <masneyb@onstation.org>
Link: https://lore.kernel.org/r/20191024103140.10077-2-masneyb@onstation.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:50 -08:00
Lina Iyer
aeae948f6a arm64: dts: qcom: setup PDC as the wakeup parent for TLMM on SDM845
PDC always-on interrupt controller can detect certain GPIOs even when
the TLMM interrupt controller is powered off. Link the PDC as TLMM's
wakeup parent.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-12-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:01 -08:00
Lina Iyer
72b67ebf9d arm64: dts: qcom: add PDC interrupt controller for SDM845
Add PDC interrupt controller device bindings for SDM845.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-11-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:01 -08:00
Jeffrey Hugo
05caa5bf9c arm64: dts: qcom: msm8998: Fix tcsr syscon size
The tcsr syscon region is really 0x40000 in size.  We need access to the
full region so that we can access the axi resets when managing the
modem subsystem.

Fixes: c783394956 ("arm64: dts: qcom: msm8998: Add smem related nodes")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107045948.4341-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:00 -08:00
Jeffrey Hugo
19b7caaa93 arm64: dts: qcom: msm8998: Add wifi node
Add the wifi node and required reserved memory to enable the wlan
hardware.  Enable the wifi node in both the mtp and clamshell platforms
after adding the relevant regulators for each platform.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107043313.4055-3-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:42:00 -08:00
Jeffrey Hugo
a21c954821 arm64: dts: qcom: msm8998: Add anoc2 smmu node
While there are several peripherals on the anoc2, most are not behind the
smmu.  However, the SoC integrated wlan block is behind the smmu, so we'll
need to control the smmu inorder to enable wifi.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Link: https://lore.kernel.org/r/20191107043313.4055-2-jeffrey.l.hugo@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:59 -08:00
Roja Rani Yarubandi
ba3fc64963 arm64: dts: sc7180: Add qupv3_0 and qupv3_1
Add QUP SE instances configuration for sc7180.

Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-14-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:59 -08:00
Taniya Das
0def3f14c5 arm64: dts: qcom: SC7180: Add node for rpmhcc clock driver
Add node for rpmhcc clock driver.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-13-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:59 -08:00
Kiran Gunda
b62e108da5 arm64: dts: qcom: sc7180-idp: Add RPMh regulators
Add the rpmh regulators for the sc7180 idp platform. This platform
consists of PMIC PM6150 and PM6150l

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/20191108092824.9773-12-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:58 -08:00
Kiran Gunda
a727ec1232 arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals
Add PM6150/PM6150L peripherals such as PON, GPIOs, ADC and other
PMIC infra modules.

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-11-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:58 -08:00
Kiran Gunda
0f9dc5f09f arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device
Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-10-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:58 -08:00
Maulik Shah
22f185ee81 arm64: dts: qcom: sc7180: Add pdc interrupt controller
Add pdc interrupt controller for sc7180

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-9-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:57 -08:00
Maulik Shah
fec6359c28 arm64: dts: qcom: sc7180: Add rpmh-rsc node
Add device bindings for the application processor's rsc. The rsc
contains the TCS that are used for communicating with the hardened
resource accelerators on Qualcomm Technologies, Inc. (QTI) SoCs.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-6-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:57 -08:00
Maulik Shah
e0abc5eb52 arm64: dts: qcom: sc7180: Add cmd_db reserved area
Command_db provides mapping for resource key and address managed
by remote processor. Add cmd_db reserved memory area.

Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-5-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:56 -08:00
Vivek Gautam
d66df6248a arm64: dts: sc7180: Add device node for apps_smmu
Adding device node for APPS SMMU that is connected to
devices such as display, video, usb, mmc, etc. on SC7180
chipset.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-4-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:56 -08:00
Rajendra Nayak
90db71e480 arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc
Add skeletal sc7180 SoC dtsi and idp board dts files.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Co-developed-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Link: https://lore.kernel.org/r/20191108092824.9773-3-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:55 -08:00
Rajendra Nayak
f1cbee2d87 dt-bindings: qcom: Add SC7180 bindings
Add a SoC string 'sc7180' for the qualcomm SC7180 SoC.
Also add a new board type 'idp'

While at it, also sort the SoC and board names in
alphabetical order, and also fix the weird space
and tab combinations found in the file.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-2-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:55 -08:00
Amit Kucheria
e68ca6b6fd arm64: dts: sdm845: thermal: Add critical interrupt support
Register critical interrupts for each of the two tsens controllers

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/c536e9cdb448bbad3441f6580fa57f1f921fb580.1573499020.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:41:55 -08:00
Lina Iyer
c7b20ce5b4 arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845
Enable PDC interrupt controller for SDM845 devices. The interrupt
controller can detect wakeup capable interrupts when the SoC is in a low
power state.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1573855915-9841-13-git-send-email-ilina@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:40 -08:00
Bjorn Andersson
f27dbbda59 arm64: defconfig: Enable Qualcomm watchdog driver
Enable the driver for the watchdog found in the application processor
subsystem on most modern Qualcomm platforms.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:21 -08:00
Bjorn Andersson
2774e55815 arm64: defconfig: Enable Qualcomm pseudo rng
Most Qualcomm platforms contain a pseudo random number generator
hardware block. Enable the driver for this block and also enable the
interface for exposing this to userspace.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:20 -08:00
Jeffrey Hugo
4ac0379f9c arm64: defconfig: Enable SN65DSI86 display bridge
This enables display on the Lenovo Yoga C630 by connecting the DSI output
from the SoC to the eDP input of the panel.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:20 -08:00
Jeffrey Hugo
df614ece27 arm64: defconfig: Enable QCA Bluetooth over UART
This enables Bluetooth on the Lenovo Yoga C630.

Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:20 -08:00
Bjorn Andersson
a0238c8432 arm64: defconfig: Enable Qualcomm CPUfreq HW driver
The Qualcomm CPUfreq HW provides CPU voltage and frequency scaling on
many modern Qualcomm SoCs. Enable the driver for this hardware block to
enable this functionality on the SDM845 platform.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:20 -08:00
Bjorn Andersson
e0ff7f9fc3 arm64: defconfig: Enable Qualcomm socinfo driver
The Qualcomm socinfo driver provides SoC information to userspace using
the standard soc interface as well as a number of debugfs entries.

Enable this to allow certain user space tools to acquire this
information, as well as getting developers access to the information in
debugfs that is useful when reporting bugs.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:20 -08:00
Bjorn Andersson
603ca8dc62 arm64: defconfig: Enable Qualcomm SPI and QSPI controller
Enable the drivers for GENI SPI and QSPI controllers found on the
Qualcomm SDM845 platform, among others.

Tested-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:19 -08:00
Bjorn Andersson
6fc73e3f7f arm64: defconfig: Enable Qualcomm remoteproc dependencies
Enable the the power domains, reset controllers and remote block device
memory access drivers necessary to boot the Audio, Compute and Modem
DSPs on Qualcomm SDM845.

None of the power domains are system critical, but needs to be builtin
as the driver core prohibits probe deferal past late initcall.

Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Alex Elder <elder@linaro.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-12-10 09:35:19 -08:00
Takashi Iwai
88452da92b ALSA: hda: Use standard waitqueue for RIRB wakeup
The HD-audio CORB/RIRB communication was programmed in a way that was
documented in the reference in decades ago, which is essentially a
polling in the waiter side.  It's working fine but costs CPU cycles on
some platforms that support only slow communications.  Also, for some
platforms that had unreliable communications, we put longer wait time
(2 ms), which accumulate quite long time if you execute many verbs in
a shot (e.g. at the initialization or resume phase).

This patch attempts to improve the situation by introducing the
standard waitqueue in the RIRB waiter side instead of polling.  The
test results on my machine show significant improvements.  The time
spent for "cat /proc/asound/card*/codec#*" were changed like:

* Intel SKL + Realtek codec
  before the patch:
   0.00user 0.04system 0:00.10elapsed 40.0%CPU
  after the patch:
   0.00user 0.01system 0:00.10elapsed 10.0%CPU

* Nvidia GP107GL + Nvidia HDMI codec
  before the patch:
   0.00user 0.00system 0:02.76elapsed 0.0%CPU
  after the patch:
   0.00user 0.00system 0:00.01elapsed 17.0%CPU

So, for Intel chips, the total time is same, while the total time is
greatly reduced (from 2.76 to 0.01s) for Nvidia chips.
The only negative data here is the increase of CPU time for Nvidia,
but this is the unavoidable cost for faster wakeups, supposedly.

Link: https://lore.kernel.org/r/20191210145727.22054-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2019-12-10 18:22:46 +01:00
Takashi Iwai
d269b2e0ba Merge branch 'for-linus' into for-next
Back-merge the 5.5-devel branch for fixing FireWire bugs.
The upcoming PCM API update patchset relies on these.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2019-12-10 18:22:23 +01:00
Lukas Wunner
6e8aeda224 ALSA: hda/hdmi - Fix duplicate unref of pci_dev
Nicholas Johnson reports a null pointer deref as well as a refcount
underflow upon hot-removal of a Thunderbolt-attached AMD eGPU.
He's bisected the issue down to commit 586bc4aab8 ("ALSA: hda/hdmi -
fix vgaswitcheroo detection for AMD").

The commit iterates over PCI devices using pci_get_class() and
unreferences each device found, even though pci_get_class()
subsequently unreferences the device as well.  Fix it.

Fixes: 586bc4aab8 ("ALSA: hda/hdmi - fix vgaswitcheroo detection for AMD")
Link: https://lore.kernel.org/r/PSXP216MB0438BFEAA0617283A834E11580580@PSXP216MB0438.KORP216.PROD.OUTLOOK.COM/
Reported-and-tested-by: Nicholas Johnson <nicholas.johnson-opensource@outlook.com.au>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Alexander Deucher <alexander.deucher@amd.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>
Link: https://lore.kernel.org/r/77aa6c01aefe1ebc4004e87b0bc714f2759f15c4.1575985006.git.lukas@wunner.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2019-12-10 18:20:31 +01:00
Mihail Atanassov
3cc1430cdb drm/bridge: panel: export drm_panel_bridge_connector
The function was unexported and was causing link failures for pl111 (and
probably the other user tve200) in a module build.

Fixes: d383fb5f8a ("drm: get drm_bridge_panel connector via helper")
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Linux Walleij <linux.walleij@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mihail Atanassov <mihail.atanassov@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191210144834.27491-1-mihail.atanassov@arm.com
2019-12-10 17:19:40 +00:00
Linus Walleij
3b52093dc9 rtc: ds1343: Do not hardcode SPI mode flags
The current use of mode flags to us SPI_MODE_3 and
SPI_CS_HIGH is fragile: it overwrites anything already
assigned by the SPI core. Change it thusly:

- Just |= the SPI_MODE_3 so we keep other flags
- Assign ^= SPI_CS_HIGH since we might be active high
  already, and that is usually the case with GPIOs used
  for chip select, even if they are in practice active low.

Add a comment clarifying why ^= SPI_CS_HIGH is the right
choice here.

Reported-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191204225731.20306-1-linus.walleij@linaro.org
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10 17:47:16 +01:00
Matt Roper
3fa01d642f drm/i915/tgl: Program BW_BUDDY registers during display init
Gen12 can improve bandwidth efficiency by pairing up memory requests
with similar addresses.  We need to program the BW_BUDDY1 and BW_BUDDY2
registers according to the memory configuration during display
initialization to take advantage of this capability.

The magic numbers we program here feel like something that could
definitely change on future platforms, so let's use a table-based
programming scheme to make this easy to extend in the future.

v2:
 - Add separate table for Wa_1409767108.  (Stan)
 - Reorder structure reduce size by a word.  Page mask can still be up
   to 28 bits (even though current values are small) so we should keep
   it as a u32, but just using a u8 for DRAM type instead of the actual
   enum type saves space.  (Lucas, Ville)
 - Rename function to tgl_bw_buddy_init() to be more precise about what
   it does.  (Lucas)

Bspec: 49189
Bspec: 49218
Bspec: 52890
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191205224848.76712-1-matthew.d.roper@intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
2019-12-10 08:09:25 -08:00
Jean-Francois Dagenais
519d63702d rtc: zynqmp: re-use rtc_time64_to_tm operation
This allows a subsequent commit to spin_unlock sooner.

Signed-off-by: Jean-Francois Dagenais <jeff.dagenais@gmail.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20191128015613.10003-1-jeff.dagenais@gmail.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10 16:49:20 +01:00
Alexandre Belloni
94a2507130 mailmap: Update email address for Alexandre Belloni
Free Electrons is now Bootlin.

Link: https://lore.kernel.org/r/20191210134653.2995661-1-alexandre.belloni@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2019-12-10 16:40:28 +01:00
Tony Lindgren
e00b59d305 ARM: omap2plus_defconfig: Add back DEBUG_FS
Commit 0e4a459f56 ("tracing: Remove unnecessary DEBUG_FS dependency")
removed select for DEBUG_FS but we still need it at least for enabling
deeper idle states for the SoCs.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-10 07:18:22 -08:00
Grygorii Strashko
90d79edc57 ARM: omap2plus_defconfig: enable NET_SWITCHDEV
The TI_CPSW_SWITCHDEV definition in Kconfig was changed from "select
NET_SWITCHDEV" to "depends on NET_SWITCHDEV", and therefore it is required
to explicitelly enable NET_SWITCHDEV config option in omap2plus_defconfig.

Fixes: 3727d259dd ("arm: omap2plus_defconfig: enable new cpsw switchdev driver")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-10 07:18:22 -08:00
Mans Rullgard
c842b8c4ff ARM: dts: am335x-sancloud-bbe: fix phy mode
The phy mode should be rgmii-id.  For some reason, it used to work with
rgmii-txid but doesn't any more.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-10 07:18:21 -08:00
Tony Lindgren
93c60483b5 bus: ti-sysc: Fix missing force mstandby quirk handling
Commit 03856e928b ("bus: ti-sysc: Handle mstandby quirk and use it for
musb") added quirk handling for mstandby quirk but did not consider that
we also need a quirk variant for SYSC_QUIRK_FORCE_MSTANDBY.

We need to use forced idle mode for both SYSC_QUIRK_SWSUP_MSTANDBY and
SYSC_QUIRK_FORCE_MSTANDBY, but SYSC_QUIRK_SWSUP_MSTANDBY also need to
additionally also configure no-idle mode when enabled.

Fixes: 03856e928b ("bus: ti-sysc: Handle mstandby quirk and use it for musb")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-10 07:18:21 -08:00
Eric Biggers
7fc979f820 docs: dm-integrity: remove reference to ARC4
ARC4 is no longer considered secure, so it shouldn't be used, even as
just an example.

Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Mike Snitzer <snitzer@redhat.com>
2019-12-10 10:02:43 -05:00
Amir Goldstein
35c6cb4168 docs: filesystems: overlayfs: Fix restview warnings
Fix only the obvious problems

[SzM: add SPDX license line]

Signed-off-by: Amir Goldstein <amir73il@gmail.com>
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
2019-12-10 16:00:55 +01:00
Amir Goldstein
5356ab0644 docs: filesystems: overlayfs: Rename overlayfs.txt to .rst
It is already formatted as RST.

Signed-off-by: Amir Goldstein <amir73il@gmail.com>
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
2019-12-10 16:00:55 +01:00
Amir Goldstein
6889ee5a53 ovl: relax WARN_ON() on rename to self
In ovl_rename(), if new upper is hardlinked to old upper underneath
overlayfs before upper dirs are locked, user will get an ESTALE error
and a WARN_ON will be printed.

Changes to underlying layers while overlayfs is mounted may result in
unexpected behavior, but it shouldn't crash the kernel and it shouldn't
trigger WARN_ON() either, so relax this WARN_ON().

Reported-by: syzbot+bb1836a212e69f8e201a@syzkaller.appspotmail.com
Fixes: 804032fabb ("ovl: don't check rename to self")
Cc: <stable@vger.kernel.org> # v4.9+
Signed-off-by: Amir Goldstein <amir73il@gmail.com>
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
2019-12-10 16:00:55 +01:00
Amir Goldstein
9c6d8f13e9 ovl: fix corner case of non-unique st_dev;st_ino
On non-samefs overlay without xino, non pure upper inodes should use a
pseudo_dev assigned to each unique lower fs and pure upper inodes use the
real upper st_dev.

It is fine for an overlay pure upper inode to use the same st_dev;st_ino
values as the real upper inode, because the content of those two different
filesystem objects is always the same.

In this case, however:
 - two filesystems, A and B
 - upper layer is on A
 - lower layer 1 is also on A
 - lower layer 2 is on B

Non pure upper overlay inode, whose origin is in layer 1 will have the same
st_dev;st_ino values as the real lower inode. This may result with a false
positive results of 'diff' between the real lower and copied up overlay
inode.

Fix this by using the upper st_dev;st_ino values in this case.  This breaks
the property of constant st_dev;st_ino across copy up of this case. This
breakage will be fixed by a later patch.

Fixes: 5148626b80 ("ovl: allocate anon bdev per unique lower fs")
Cc: stable@vger.kernel.org # v4.17+
Signed-off-by: Amir Goldstein <amir73il@gmail.com>
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
2019-12-10 16:00:55 +01:00
Amir Goldstein
ec7bbb53d3 ovl: don't use a temp buf for encoding real fh
We can allocate maximum fh size and encode into it directly.

Suggested-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Amir Goldstein <amir73il@gmail.com>
Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
2019-12-10 16:00:55 +01:00