Commit graph

982,081 commits

Author SHA1 Message Date
Seevalamuthu Mariappan
78fb5b541b mac80211: Fix dropping broadcast packets in 802.11 encap
Broadcast pkts like arp are getting dropped in 'ieee80211_8023_xmit'.
Fix this by replacing is_valid_ether_addr api with is_zero_ether_addr.

Fixes: 50ff477a86 ("mac80211: add 802.11 encapsulation offloading support")
Signed-off-by: Seevalamuthu Mariappan <seevalam@codeaurora.org>
Link: https://lore.kernel.org/r/1591697754-4975-1-git-send-email-seevalam@codeaurora.org
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2020-06-25 10:54:35 +02:00
Pavel Machek
01da2e059d mac80211: simplify mesh code
Doing mod_timer() conditionaly is easier than conditionally unlocking
and jumping around...

Signed-off-by: Pavel Machek (CIP) <pavel@denx.de>
Acked-by: Linus Lüssing <ll@simonwunderlich.de>
Link: https://lore.kernel.org/r/20200604214157.GA9737@amd
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2020-06-25 10:54:09 +02:00
Markus Theil
86a1b9d7c2 mac80211: fix control port tx status check
The initial control port tx status patch assumed, that
we have IEEE 802.11 frames, but actually ethernet frames
are stored in the ack skb. Fix this by checking for the
correct ethertype and skb protocol 802.3.

Also allow tx status reports for ETH_P_PREAUTH, as preauth
frames can also be send over the nl80211 control port.

Fixes: a7528198ad ("mac80211: support control port TX status reporting")
Reported-by: Jouni Malinen <j@w1.fi>
Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20200622123542.173695-1-markus.theil@tu-ilmenau.de
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2020-06-25 10:48:09 +02:00
Veerendranath Jakkam
0c1a7f13c9 ieee80211: Add missing and new AKM suite selector definitions
Add the definitions for missing AKM selectors defined in
IEEE P802.11-REVmd/D3.0, table 9-151. These definitions will
be used by various drivers that support these new AKM suites.

Signed-off-by: Veerendranath Jakkam <vjakkam@codeaurora.org>
Link: https://lore.kernel.org/r/20200617113132.13477-1-vjakkam@codeaurora.org
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2020-06-25 10:46:24 +02:00
Kiran K
5ea7c81a4f Bluetooth: btusb: Refactor of firmware download flow for Intel conrollers
Address the scalability to support new generation Intel controller with
respect to readability and enhancement to new firmware download sequence

Signed-off-by: Kiran K <kiran.k@intel.com>
Reviewed-by: Chethan T N <chethan.tumkur.narayan@intel.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2020-06-25 10:43:38 +02:00
Borislav Petkov
a7e1f67ed2 x86/msr: Filter MSR writes
Add functionality to disable writing to MSRs from userspace. Writes can
still be allowed by supplying the allow_writes=on module parameter. The
kernel will be tainted so that it shows in oopses.

Having unfettered access to all MSRs on a system is and has always been
a disaster waiting to happen. Think performance counter MSRs, MSRs with
sticky or locked bits, MSRs making major system changes like loading
microcode, MTRRs, PAT configuration, TSC counter, security mitigations
MSRs, you name it.

This also destroys all the kernel's caching of MSR values for
performance, as the recent case with MSR_AMD64_LS_CFG showed.

Another example is writing MSRs by mistake by simply typing the wrong
MSR address. System freezes have been experienced that way.

In general, poking at MSRs under the kernel's feet is a bad bad idea.

So log writing to MSRs by default. Longer term, such writes will be
disabled by default.

If userspace still wants to do that, then proper interfaces should be
defined which are under the kernel's control and accesses to those MSRs
can be synchronized and sanitized properly.

[ Fix sparse warnings. ]
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Tested-by: Sean Christopherson <sean.j.christopherson@intel.com>
Link: https://lkml.kernel.org/r/20200612105026.GA22660@zn.tnic
2020-06-25 10:39:02 +02:00
Alexander Lobakin
ff711d67b1 MIPS: checksum: fix sparse flooding on asm/checksum.h
csum_fold() in MIPS' asm/checksum.h is another source of sparse flooding
when building different networking source code.
The thing is that only half of __wsum <--> u32 casts inside the function
is forced, which is insufficient.
Add all necessary forced typecasting to stop floods and simplify actual
bug hunting.

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-25 10:37:23 +02:00
Alexander Lobakin
7b5f96949d MIPS: io: fix sparse flood on asm/io.h
MIPS MMIO macros for byteswapping from/to hardware endianness are a bit
tricky because they use cpu_to_le{16,32,64}() in both directions.
This generates a lot of questions from sparse as __le{16,32,64} types
are 'restricted' and direct cast is forbidden in order to prevent messing
up the byteorder.
As MMIO ops are used in almost every single driver, this leads to console
flooding and complicates bug hunting.

We could fix it in a more proper way, i.e. separate from device /
to device byteswap macros and expand __BUILD_MEMORY_*(), but this seems
redundant and will produce code duplication.
Instead, just expand the existing *ioswab*() macros with forced
typecasting to stop floods.

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-25 10:36:39 +02:00
Alexander Lobakin
3612485bf4 MIPS: generic/ip32: io: fix __mem_ioswabq()
*readq() family operates with u64 arguments, so they need 64-bit
byteswaps.
Correct macros for Generic MIPS and IP-32 to match other machines'
implementations.

Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-25 10:34:45 +02:00
Prashant Malani
5b30bd35aa platform/chrome: cros_ec_typec: Add TBT compat support
Add mux control support for Thunderbolt compatibility mode.

Suggested-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Co-developed-by: Azhar Shaikh <azhar.shaikh@intel.com>
Co-developed-by: Casey Bowman <casey.g.bowman@intel.com>
Signed-off-by: Prashant Malani <pmalani@chromium.org>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
2020-06-25 10:18:33 +02:00
Prashant Malani
5e48a03bb9 platform/chrome: cros_ec: Add TBT pd_ctrl fields
To support Thunderbolt compatibility mode, synchronize
ec_response_usb_pd_control_v2 with the Chrome EC version, so that
we get the Thunderbolt related control fields and macros.

Signed-off-by: Prashant Malani <pmalani@chromium.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
2020-06-25 10:18:27 +02:00
João H. Spies
9fbbb7ddd9 MIPS: ingenic: gcw0: Fix HP detection GPIO.
Previously marked as active high, but is in reality active low.

Cc: stable@vger.kernel.org
Fixes: b1bfdb6605 ("MIPS: ingenic: DTS: Update GCW0 support")
Signed-off-by: João H. Spies <jhlspies@gmail.com>
Tested-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-06-25 10:18:22 +02:00
Maxime Ripard
63e58f2bb9 ARM: dts: bcm2711: Add firmware clocks node
Now that we have a clock driver for the clocks exposed by the firmware,
let's add the device tree nodes for it.

Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/9a6f113140b3115150bfb18ecb248a48d58562cf.1592210452.git-series.maxime@cerno.tech
2020-06-25 10:16:08 +02:00
Angelo Ribeiro
ebf9301509 drm/bridge: dw-mipi-dsi.c: remove unused header file
dw-mipi-dsi does not use any definition from drm_probe_helper.

Coverity output:
Event unnecessary_header:
Including .../include/drm/drm_probe_helper.h does not provide any
needed symbols.

Reviewed-by: Yannick Fertre <yannick.fertre@st.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Joao Pinto <jpinto@synopsys.com>
Cc: Jose Abreu <jose.abreu@synopsys.com>
Signed-off-by: Angelo Ribeiro <angelo.ribeiro@synopsys.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/171ff1fb3918664a570dc8f2f34b446612505f76.1585832665.git.angelo.ribeiro@synopsys.com
2020-06-25 09:53:11 +02:00
Thierry Reding
f3de06b4fa ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
The SDHCI on Tegra30 is in fact not backwards-compatible with the
instantiation found on earlier SoCs. Drop the misleading compatible
string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:46 +02:00
Thierry Reding
06227e3a0b ARM: tegra: The Tegra30 DC is not backwards-compatible
The display controller on Tegra30 is in fact not backwards-compatible
with the instantiation found on earlier SoCs. Drop the misleading
compatible string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:46 +02:00
Thierry Reding
2f49988154 ARM: tegra: Remove spurious comma from node name
This was probably left there by mistake or perhaps was a typo in the
first place. Remove it.

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:46 +02:00
Thierry Reding
eb6563a681 ARM: tegra: Add parent clock to DSI output
The DSI output needs to specify a parent clock that will be used to
drive both the output and the display controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:46 +02:00
Thierry Reding
7fb099528b ARM: tegra: Use standard names for SRAM nodes
SRAM nodes should be named sram@<unit-address> to match the bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:45 +02:00
Thierry Reding
cea37ffc82 ARM: tegra: seaboard: Use standard battery bindings
Seaboard uses a non-existing, possibly obsoleted, binding for the
battery. Move to the standard binding which seems to be a super-
set of the odl binding.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:45 +02:00
Thierry Reding
eb711490c4 ARM: tegra: Use standard names for LED nodes
LED nodes should be named led-* to match the bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:45 +02:00
Thierry Reding
86b224beea ARM: tegra: Use numeric unit-addresses
Unit-addresses should be numeric. This fixes a validation failure seen
using the json-schema tooling.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:45 +02:00
Thierry Reding
90b1307ac5 ARM: tegra: medcom-wide: Remove extra panel power supply
Simple panels can only have a single power supply. The second listed
supply is not needed because it is also the input supply of the first
supply and therefore will always be on at the same time.

In retrospect the panel probably doesn't qualify as simple since it
apparently does need both of these supplies, even if in the case of the
Medcom Wide it isn't necessary to explicitly hook them up.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:44 +02:00
Thierry Reding
417668bcb0 ARM: tegra: Use proper unit-addresses for OPPs
Use commas rather than underscores to separate the various parts of the
unit-address in CPU OPPs to make them properly validate under the json-
schema bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:44 +02:00
Thierry Reding
f538588bdb ARM: tegra: Add missing clock-names for SDHCI controllers
The Tegra SDHCI controllers need to have a clock-names property
according to the bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:44 +02:00
Thierry Reding
5b66a2b43f ARM: tegra: Fix order of XUSB controller clocks
This is purely to make the json-schema validation tools happy because
they cannot deal with string arrays that may be in arbitrary order.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:44 +02:00
Thierry Reding
571c3d37ee ARM: tegra: Add #reset-cells to Tegra124 memory controller
The memory controller exposes a set of memory client resets and needs to
specify the #reset-cells property in order to advertise the number of
cells needed to describe each of the resets.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:43 +02:00
Thierry Reding
9061a80566 ARM: tegra: Add missing panel power supplies
Both Nyan boards as well as Venice2 are missing panel power supplies.
Add them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:43 +02:00
Thierry Reding
839d9bda2f ARM: tegra: Add micro-USB A/B port on Jetson TK1
Run the micro-USB A/B port on Jetson TK1 in host mode by default.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:43 +02:00
Thierry Reding
9482a17008 ARM: tegra: Use proper tuple notation
Tuple boundaries should be marked by < and > to make it clear which
cells are part of the same tuple. This also helps the json-schema based
validation tooling to properly parse this data.

While at it, also remove the "immovable" bit from PCI addresses. All of
these addresses are in fact "movable".

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:43 +02:00
Thierry Reding
cc761754f4 ARM: tegra: Use standard name for Ethernet devices
Ethernet device should be named "ethernet@<unit-address>".

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:43 +02:00
Thierry Reding
1bc5af2b36 ARM: tegra: Add missing #sound-dai-cells property to codecs
Audio codecs need a #sound-dai-cells property, so add one to the audio
codecs on various Tegra-based boards that don't have one.

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:42 +02:00
Thierry Reding
4c0bb8caad ARM: tegra: Add missing #phy-cells property to USB PHYs
USB PHYs must have a #phy-cells property, so add one to the Tegra USB
PHYs which don't have one.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:42 +02:00
Thierry Reding
704818a1ac ARM: tegra: Tegra114 SDHCI is not backwards-compatible
The SDHCI controller instantiated on Tegra114 is not backwards-
compatible with the version on Tegra30, so remove the corresponding
compatible string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:42 +02:00
Thierry Reding
32c096c227 ARM: tegra: Rename sdhci nodes to mmc
The new json-schema based validation tools require SD/MMC controller
nodes to be named mmc. Rename all references to them.

Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:29:41 +02:00
Thierry Reding
afd92390fc ARM: tegra: Drop display controller parent clocks on Tegra124
The parent clocks are determined by the output that will be used, not by
the display controller that drives the output. On previous generations a
simple RGB output used to be part of the display controller and hence an
explicit parent clock needed to be assigned to the display controller to
drive the RGB output. Starting with Tegra124, that RGB output has been
dropped and the parent clock can therefore be removed from the display
controller device tree nodes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25 09:26:14 +02:00
Benjamin Gaignard
e8da9ed039 dt-bindings: mfd: Convert stmfx bindings to json-schema
Convert stmfx bindings to json-schema.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2020-06-25 07:44:20 +01:00
Chunyan Zhang
c61e165822 mfd: sprd: Populate sub-devices defined in DT
SC27XX-SPI added subdevices according to a pre-defined mfd_cell array,
no matter these devices were really included on board. In this patch,
switch to use devm_of_platform_populate() for adding sub-devices which
are defined in devicetree.

Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2020-06-25 07:44:20 +01:00
Neil Armstrong
bf9367a156 MAINTAINERS: Add myself as maintainer for Khadas MCU drivers
Add the Thermal driver along the MFD drivers and header as Maintained
by myself.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2020-06-25 07:44:20 +01:00
Neil Armstrong
5772717e59 thermal: Add support for the MCU controlled FAN on Khadas boards
The new Khadas VIM2 and VIM3 boards controls the cooling fan via the
on-board microcontroller.

This implements the FAN control as thermal devices and as cell of the Khadas
MCU MFD driver.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2020-06-25 07:44:20 +01:00
Po Liu
d621d7703d net: enetc add tc flower offload flow metering policing action
Flow metering entries in IEEE 802.1Qci is an optional function for a
flow filtering module. Flow metering is two rates two buckets and three
color marker to policing the frames. This patch only enable one rate one
bucket and in color blind mode. Flow metering instance are as
specified in the algorithm in MEF 10.3 and in Bandwidth Profile
Parameters. They are:

a) Flow meter instance identifier. An integer value identifying the flow
meter instance. The patch use the police 'index' as thin value.
b) Committed Information Rate (CIR), in bits per second. This patch use
the 'rate_bytes_ps' represent this value.
c) Committed Burst Size (CBS), in octets. This patch use the 'burst'
represent this value.
d) Excess Information Rate (EIR), in bits per second.
e) Excess Burst Size per Bandwidth Profile Flow (EBS), in octets.
And plus some other parameters. This patch set EIR/EBS default disable
and color blind mode.

v1->v2 changes:
- Use div_u64() as division replace the '/' report:

All errors (new ones prefixed by >>):

   ld: drivers/net/ethernet/freescale/enetc/enetc_qos.o: in function `enetc_flowmeter_hw_set':
>> enetc_qos.c:(.text+0x66): undefined reference to `__udivdi3'

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Po Liu <Po.Liu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24 22:05:01 -07:00
Po Liu
627e39b139 net: qos: police action add index for tc flower offloading
Hardware device may include more than one police entry. Specifying the
action's index make it possible for several tc filters to share the same
police action when installing the filters.

Propagate this index to device drivers through the flow offload
intermediate representation, so that drivers could share a single
hardware policer between multiple filters.

v1->v2 changes:
- Update the commit message suggest by Ido Schimmel <idosch@idosch.org>

Signed-off-by: Po Liu <Po.Liu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24 22:04:26 -07:00
Po Liu
89d1f09669 net: enetc: add support max frame size for tc flower offload
Base on the tc flower offload police action add max frame size by the
parameter 'mtu'. Tc flower device driver working by the IEEE 802.1Qci
stream filter can implement the max frame size filtering. Add it to the
current hardware tc flower stearm filter driver.

Signed-off-by: Po Liu <Po.Liu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24 22:04:26 -07:00
Po Liu
19e528dc9a net: qos: add tc police offloading action with max frame size limit
Current police offloading support the 'burst'' and 'rate_bytes_ps'. Some
hardware own the capability to limit the frame size. If the frame size
larger than the setting, the frame would be dropped. For the police
action itself already accept the 'mtu' parameter in tc command. But not
extend to tc flower offloading. So extend 'mtu' to tc flower offloading.

Signed-off-by: Po Liu <Po.Liu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24 22:04:26 -07:00
Rajendra Nayak
1a9e489e61 spi: spi-geni-qcom: Use OPP API to set clk/perf state
geni spi needs to express a perforamnce state requirement on CX
depending on the frequency of the clock rates. Use OPP table from
DT to register with OPP framework and use dev_pm_opp_set_rate() to
set the clk/perf state.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Mark Brown <broonie@kernel.org>
Cc: Alok Chauhan <alokc@codeaurora.org>
Cc: Akash Asthana <akashast@codeaurora.org>
Cc: linux-spi@vger.kernel.org
Link: https://lore.kernel.org/r/1592222564-13556-3-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24 22:03:19 -07:00
Rajendra Nayak
a5819b548a tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state
geni serial needs to express a perforamnce state requirement on CX
powerdomain depending on the frequency of the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Akash Asthana <akashast@codeaurora.org>
Cc: linux-serial@vger.kernel.org
Link: https://lore.kernel.org/r/1592222564-13556-2-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24 22:03:08 -07:00
Akash Asthana
e867f429e6 arm64: dts: sc7180: Add interconnect for QUP and QSPI
Add interconnect ports for GENI QUPs and QSPI to set bus capabilities.

Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Link: https://lore.kernel.org/r/1592908737-7068-9-git-send-email-akashast@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24 21:51:31 -07:00
Dave Airlie
5b83c25457 Merge tag 'amd-drm-fixes-5.8-2020-06-24' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
amd-drm-fixes-5.8-2020-06-24:

amdgpu:
- Fix missed mutex unlock in DC error path
- Fix firmware leak for sdma5
- DC bpc property fixes

amdkfd:
- Fix memleak in an error path

radeon:
- Fix copy paste typo in NI DPM spll validation

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200624221207.17773-1-alexander.deucher@amd.com
2020-06-25 14:51:14 +10:00
Akash Asthana
cff80645d6 spi: spi-qcom-qspi: Add interconnect support
Get the interconnect paths for QSPI device and vote according to the
current bus speed of the driver.

Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1592908737-7068-8-git-send-email-akashast@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-24 21:51:07 -07:00
David S. Miller
eb2932b00f Merge branch 'net-bcmgenet-use-hardware-padding-of-runt-frames'
Doug Berger says:

====================
net: bcmgenet: use hardware padding of runt frames

Now that scatter-gather and tx-checksumming are enabled by default
it revealed a packet corruption issue that can occur for very short
fragmented packets.

When padding these frames to the minimum length it is possible for
the non-linear (fragment) data to be added to the end of the linear
header in an SKB. Since the number of fragments is read before the
padding and used afterward without reloading, the fragment that
should have been consumed can be tacked on in place of part of the
padding.

The third commit in this set corrects this by removing the software
padding and allowing the hardware to add the pad bytes if necessary.

The first two commits resolve warnings observed by the kbuild test
robot and are included here for simplicity of application.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-24 21:51:03 -07:00