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1,399,042 commits

Author SHA1 Message Date
Armin Wolf
e6169a8ffe ACPICA: Fix memory leak if acpi_ps_get_next_field() fails
ACPICA commit 1280045754264841b119a5ede96cd005bc09b5a7

If acpi_ps_get_next_field() fails, the previously created field list
needs to be properly disposed before returning the status code.

Link: 12800457
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
[ rjw: Rename local variable to avoid compiler confusion ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 19:03:14 +02:00
Artur Paszkiewicz
6f039cc42f md/raid5: rename wait_for_overlap to wait_for_reshape
The only remaining uses of wait_for_overlap are related to reshape so
rename it accordingly.

Signed-off-by: Artur Paszkiewicz <artur.paszkiewicz@intel.com>
Link: https://lore.kernel.org/r/20240827153536.6743-4-artur.paszkiewicz@intel.com
Signed-off-by: Song Liu <song@kernel.org>
2024-08-29 09:37:10 -07:00
Artur Paszkiewicz
0e4aac7366 md/raid5: only add to wq if reshape is in progress
Now that actual overlaps are not handled on the wait_for_overlap wq
anymore, the remaining cases when we wait on this wq are limited to
reshape. If reshape is not in progress, don't add to the wq in
raid5_make_request() because add_wait_queue() / remove_wait_queue()
operations take a spinlock and cause noticeable contention when multiple
threads are submitting requests to the mddev.

Signed-off-by: Artur Paszkiewicz <artur.paszkiewicz@intel.com>
Link: https://lore.kernel.org/r/20240827153536.6743-3-artur.paszkiewicz@intel.com
Signed-off-by: Song Liu <song@kernel.org>
2024-08-29 09:37:10 -07:00
Artur Paszkiewicz
e6a03207b9 md/raid5: use wait_on_bit() for R5_Overlap
Convert uses of wait_for_overlap wait queue with R5_Overlap bit to
wait_on_bit() / wake_up_bit().

Signed-off-by: Artur Paszkiewicz <artur.paszkiewicz@intel.com>
Link: https://lore.kernel.org/r/20240827153536.6743-2-artur.paszkiewicz@intel.com
Signed-off-by: Song Liu <song@kernel.org>
2024-08-29 09:37:10 -07:00
Simon Trimmer
2186fe21e5 ALSA: hda/realtek: Autodetect Cirrus Logic companion amplifier bindings
We do not need model specific HDA quirks to construct the component
binding details of Cirrus Logic companion amplifiers as this information
is already present in the ACPI.

Quirks are then only required for special workarounds not described in
the ACPI such as internal configuration of the Realtek codecs.

The codec pointer is now initialized in hda_component_manager_init() so
that we can detect when companion amplifiers are found in the ACPI but
the SSID invokes a quirk that also attempts to create the component
binding.

Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com>
Link: https://patch.msgid.link/20240829161114.140938-1-simont@opensource.cirrus.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2024-08-29 18:17:08 +02:00
Takashi Iwai
dfe5b1fe04 Merge branch 'for-linus' into for-next
Pull 6.11 devel branch for applying further updates for Cirrus codecs

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2024-08-29 18:16:24 +02:00
Krzysztof Kozlowski
6b99dc62d9
ASoC: codecs: wsa884x: Implement temperature reading and hwmon
Read temperature of the speaker and expose it via hwmon interface, which
will be later used during calibration of speaker protection algorithms.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20240809110122.137761-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-08-29 17:04:46 +01:00
Armin Wolf
5accb265f7 ACPICA: Fix memory leak if acpi_ps_get_next_namepath() fails
ACPICA commit 2802af722bbde7bf1a7ac68df68e179e2555d361

If acpi_ps_get_next_namepath() fails, the previously allocated
union acpi_parse_object needs to be freed before returning the
status code.

The issue was first being reported on the Linux ACPI mailing list:

Link: https://lore.kernel.org/linux-acpi/56f94776-484f-48c0-8855-dba8e6a7793b@yandex.ru/T/
Link: 2802af72
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:56:06 +02:00
Adam Young
cff8a9f66a ACPICA: Allow PCC Data Type in MCTP resource.
ACPICA commit f0776a465cc2c20393bec534c16bdee4a78f7bb7

explicitly allow QWord address space description type
to be 0xA to indicate it refers to a Platform
Communication channel
IAW  ACPI_ECR_PCC_DESCRIPTORS_CF_V2

https://bugzilla.tianocore.org/show_bug.cgi?id=4594

An entity in a DSDT or in SSDTs that requires
a platform communication channel table (PCCT) entry
to communicate with a remote service will have a single
value that is the index of the entry in the PCCT.
This data type with have a resource_type value of 0xA.

This value indicates that the type shares the same
footprint as a Dword_space section.

Link: f0776a46
Signed-off-by: Adam Young <ayoung@amperecomputing.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:55:16 +02:00
Vasily Khoruzhick
c82c507126 ACPICA: executer/exsystem: Don't nag user about every Stall() violating the spec
ACPICA commit 129b75516fc49fe1fd6b8c5798f86c13854630b3

Stop nagging user about every Stall() that violates the spec

On my Dell XPS 15 7590 I get hundreds of these warnings after few hours of
uptime:

$ dmesg | grep "fix the firmware" | wc -l
261

I cannot fix the firmware and I doubt that Dell cares about 4 year old
laptop either

Fixes: ace8f1c54a ("ACPICA: executer/exsystem: Inform users about ACPI spec violation")
Link: 129b7551
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:53:50 +02:00
Vasily Khoruzhick
632b746b10 ACPICA: Implement ACPI_WARNING_ONCE and ACPI_ERROR_ONCE
ACPICA commit 2ad4e6e7c4118f4cdfcad321c930b836cec77406

In some cases it is not practical nor useful to nag user about some
firmware errors that they cannot fix. Add a macro that will print a
warning or error only once to be used in these cases.

Link: 2ad4e6e7
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:51:24 +02:00
Punit Agrawal
cf94e10a03 ACPICA: MPAM: Correct the typo in struct acpi_mpam_msc_node member
ACPICA commit 3da3f7d776d17e9bfbb15de88317de8d7397ce38

A member of the struct acpi_mpam_msc_node that represents a Memory System
Controller node structure - num_resource_nodes has a typo. Fix the typo

No functional change.

Link: 3da3f7d7
Signed-off-by: Punit Agrawal <punit.agrawal@bytedance.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:48:53 +02:00
Andrii Nakryiko
c634d6f4e1 libbpf: Fix bpf_object__open_skeleton()'s mishandling of options
We do an ugly copying of options in bpf_object__open_skeleton() just to
be able to set object name from skeleton's recorded name (while still
allowing user to override it through opts->object_name).

This is not just ugly, but it also is broken due to memcpy() that
doesn't take into account potential skel_opts' and user-provided opts'
sizes differences due to backward and forward compatibility. This leads
to copying over extra bytes and then failing to validate options
properly. It could, technically, lead also to SIGSEGV, if we are unlucky.

So just get rid of that memory copy completely and instead pass
default object name into bpf_object_open() directly, simplifying all
this significantly. The rule now is that obj_name should be non-NULL for
bpf_object_open() when called with in-memory buffer, so validate that
explicitly as well.

We adopt bpf_object__open_mem() to this as well and generate default
name (based on buffer memory address and size) outside of bpf_object_open().

Fixes: d66562fba1 ("libbpf: Add BPF object skeleton support")
Reported-by: Daniel Müller <deso@posteo.net>
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Reviewed-by: Daniel Müller <deso@posteo.net>
Acked-by: Eduard Zingerman <eddyz87@gmail.com>
Link: https://lore.kernel.org/bpf/20240827203721.1145494-1-andrii@kernel.org
2024-08-29 17:47:27 +02:00
Jinjie Ruan
4d57a84056 soc/tegra: pmc: Simplify with scoped for each OF child loop
Use scoped for_each_child_of_node_scoped() when iterating over device
nodes to make code a bit simpler.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:43:43 +02:00
Jon Hunter
12803ded10 arm64: defconfig: Enable Tegra194 PCIe Endpoint
Build the Tegra194 PCIe Endpoint driver as a module by default for
ARM64.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:41:58 +02:00
Jose Marinho
703c730794 ACPICA: Implement the Dword_PCC Resource Descriptor Macro
ACPICA commit 1209ecf682e03d9ef0c22f4986a2e53b03bd2985

The Dword_pcc (alongside word_pcc and Qword_pcc) were accepted to ACPI
inclusion via a code-first process.

This patch implements support in iASL for Dword_pcc.

Link: https://bugzilla.tianocore.org/show_bug.cgi?id=4594
Link: 1209ecf6
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:41:49 +02:00
Dara Stotland
93ff968622 arm64: tegra: Add thermal nodes to AGX Orin SKU8
One of the key differences between p3701-0000 and p3701-0008 is the
temperature range. Add this info for p3701-0008.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
1f190117a1 arm64: tegra: Move BPMP nodes to AGX Orin module
All SKUs of the p3701 module contain a temp sensor connected to the
BPMP I2C. Move the associated nodes from tegra234-p3701-0008.dtsi
to tegra234-p3701.dtsi. Add missing compatible.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
7662fe9639 arm64: tegra: Move padctl supply nodes to AGX Orin module
Some padctl supply nodes currently reside in board file, when they
should reside on module level. The nodes are part of module,
not board. Move these nodes to the correct AGX Orin
module file.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
d075995c11 arm64: tegra: Move AGX Orin nodes to correct location
Some of the nodes inside the AGX Orin module file are in the
wrong location. In particular, the SD card interface and
two of the PCIe regulators in the module file should instead
reside in the board file. These components are not part of the
module. They are part of the carrier board. Move these
nodes to the correct location.

Fixes: cd42b26a52 ("arm64: tegra: Add regulators required for PCIe")
Fixes: d71b893a11 ("arm64: tegra: Add Tegra234 SDMMC1 device tree node")
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
a034db9e4d arm64: tegra: Combine IGX Orin board files
Current IGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
7a3f6cb1de arm64: tegra: Combine AGX Orin board files
The current AGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:34 +02:00
Dara Stotland
ab9cd79d41 arm64: tegra: Add common nodes to AGX Orin module
The AGX Orin module boards contain common nodes that can
be moved to the included module dtsi. This eliminates
redundancy within the files and reduces lines of code.
Data from tegra234-p3701-0000 and tegra234-p3701-0008 that
is common is now in tegra234-p3701.dtsi.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:13 +02:00
Tomasz Maciej Nowak
8f4c834d89 ARM: tegra: Wire up two front panel LEDs on TrimSlice
Pins responsible for controlling these LEDs need to have tristate
control removed if we want them as GPIOs. This change aligns with
pinmux configuration of "dte" pin group in downstream kernel[1].
These LEDs had no function assigned on vendor kernel and there is no
label on the case, the only markings are on PCB which are part of node
names (ds1 marking is on power LED controlled by PMIC), so generic term
is assigned as the function.

1. https://github.com/compulab/trimslice-android-kernel/blob/upstream/arch/arm/mach-tegra/board-trimslice-pinmux.c#L45

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:36:39 +02:00
Sia Jee Heng
4aca2bef90 ACPICA: Headers: Add RISC-V SBI Subtype to DBG2
ACPICA commit 6f4c900bcf9ca065129353f17a83773aa58095aa

Include the RISC-V SBI debugging subtype as documented in DBG2
dated April 10, 2023 [1].

Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table # [1]
Link: 6f4c900b
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:36:31 +02:00
Tomasz Maciej Nowak
a50d5dcd28 arm64: tegra: Wire up WiFi on Jetson TX1 module
P2180 modules have WiFi in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary calibration
file can be obtained from Jetson Linux Archive. nvram.txt file is
located in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive. The rest of necessary blobs can be obtained from official
Linux Firmware repository or (newer ones) from Infineon
ifx-linux-firmware repository (look in older releases).

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:35:11 +02:00
Tomasz Maciej Nowak
6eba6471bb arm64: tegra: Wire up Bluetooth on Jetson TX1 module
P2180 modules have Bluetooth in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary firmware
can be obtained from Jetson Linux Archive. bcm4354.hcd file is located
in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:34:57 +02:00
James Clark
57880a7966 perf: cs-etm: Allocate queues for all CPUs
Make cs_etm__setup_queue() setup a queue even if it's empty, and
pre-allocate queues based on the max CPU that was recorded. In per-CPU
mode aux queues are indexed based on CPU ID even if all CPUs aren't
recorded, sparse queue arrays aren't used.

This will allow HW_IDs to be saved even if no aux data was received in
that queue without having to call cs_etm__setup_queue() from two
different places.

Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: James Clark <james.clark@arm.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Suzuki Poulouse <suzuki.poulose@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20240722101202.26915-3-james.clark@linaro.org
Signed-off-by: James Clark <james.clark@linaro.org>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2024-08-29 12:34:55 -03:00
Tomasz Maciej Nowak
3ed4e09860 arm64: tegra: Wire up power sensors on Jetson TX1 DevKit
One INA3221 sensor is located on P2180 module and the other two are on
P2597 base board.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:34:48 +02:00
Sia Jee Heng
7741e3c5f8 ACPICA: SPCR: Update the SPCR table to version 4
ACPICA commit 1eeff52124a45d5cd887ba5687bbad0116e4d211

The Microsoft Serial Port Console Redirection (SPCR) specification
revision 1.09 comprises additional fields [1]. The newly added fields
are:
- RISC-V SBI
- Precise Baud Rate
- namespace_string_length
- namespace_string_offset
- namespace_string

Additionaly, this code will support up to SPCR revision 1.10, as it
includes only minor wording changes.

Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table # [1]
Link: 1eeff521
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:34:36 +02:00
James Clark
b6aa0de9a5 perf cs-etm: Create decoders after both AUX and HW_ID search passes
Both of these passes gather information about how to create the
decoders. AUX records determine formatted/unformatted, and the HW_IDs
determine the traceID/metadata mappings.

Therefore it makes sense to cache the information and wait until both
passes are over until creating the decoders, rather than creating them
at the first HW_ID found.

This will allow a simplification of the creation process where
cs_etm_queue->traceid_list will exclusively used to create the decoders,
rather than the current two methods depending on whether the trace is
formatted or not.

Previously the sample CPU from the AUX record was used to initialize
the decoder CPU, but actually sample CPU == AUX queue index in per-CPU
mode, so saving the sample CPU isn't required.

Similarly formatted/unformatted was used upfront to create the decoders,
but now it's cached until later.

Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: James Clark <james.clark@arm.com>
Signed-off-by: James Clark <james.clark@linaro.org>
Tested-by: Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
Tested-by: Leo Yan <leo.yan@arm.com>
Acked-by: Suzuki Poulouse <suzuki.poulose@arm.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20240722101202.26915-2-james.clark@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2024-08-29 12:33:02 -03:00
Vedant Deshpande
6e1a196425 arm64: tegra: Add p3767 PCIe C4 EP details
Add implementation details for Orin NX/Nano PCIe EP on C4.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:32:16 +02:00
Vedant Deshpande
0580286d0d arm64: tegra: Add Tegra234 PCIe C4 EP definition
Add PCIe C4 EP controller definition in device tree for Tegra234
devices.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:32:01 +02:00
Zhang Rui
ff418f34ba ACPICA: Complete CXL 3.0 CXIMS structures
ACPICA commit eb2a2ff303416fb3f6c425d519dbcd6988dbd91f

Commit 2d8dc0383d3c9 ("Add CXL 3.0 structures (CXIMS & RDPAS) to the
CEDT table") introduces basic support for CXL XOR Interleave Math
Structure (CXIMS).

Complete the CXIMS structures.

No functional change.

Link: eb2a2ff3
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:31:25 +02:00
Diogo Ivo
ebe899563a arm64: tegra: Add wp-gpio for P2597's external card slot
Add the definition for the wp-gpio of the P2597's external card slot,
enabling this functionality.

Tested on a P2597 board.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:29:13 +02:00
Diogo Ivo
46a26db827 arm64: tegra: Fix gpio for P2597 vmmc regulator
The current declaration is off-by-one and actually corresponds to the
wp-gpio of the external slot.

Tested on a P2597 board.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:29:13 +02:00
Adrien Destugues
7afea7bc49 ACPICA: haiku: Fix invalid value used for semaphores
ACPICA commit 49fe4f25483feec2f685b204ef19e28d92979e95

In Haiku, semaphores are represented by integers, not pointers.
So, we can't use NULL as the invalid/destroyed value, the correct value
is -1. Introduce a platform overridable define to allow this.

Fixes #162 (which was closed after coming to the conclusion that this
should be done, but the change was never done).

Link: 49fe4f25
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-08-29 17:26:51 +02:00
David Heidelberg
c20ebc7fbd dt-bindings: arm: tegra: Document Nyan, all revisions in kernel tree
Avoid firing useless warnings when running make dtbs_check

Signed-off-by: David Heidelberg <david@ixit.cz>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:24:49 +02:00
Svyatoslav Ryhel
c6d17e1a42 ARM: tegra: tf701t: Configure USB
Fixes issue when resuming after suspend made USB in peripheral
mode inaccessible.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:28 +02:00
Svyatoslav Ryhel
8c80f44126 ARM: tegra: tf701t: Use dedicated backlight regulator
Downstream kernel states that backlight has no actual enable GPIO
and uses fixed regulator.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:28 +02:00
Svyatoslav Ryhel
003b99aa30 ARM: tegra: tf701t: Re-group GPIO keys
Group GPIO keys into keys and switches.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:28 +02:00
Svyatoslav Ryhel
1731cbba9f ARM: tegra: tf701t: Bind WIFI SDIO and EMMC
Add MMC nodes configuration along with WIFI binding to ASUS TF701T
device-tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:28 +02:00
Svyatoslav Ryhel
e4cee35431 ARM: tegra: tf701t: Complete sound bindings
With these changes sound works, only UCM configs are needed for
complete support.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:28 +02:00
Svyatoslav Ryhel
c79e35e606 ARM: tegra: tf701t: Adjust sensors nodes
Complete and adjust magnetometer, thermal sensor, motion tracker,
power and light sensors according to available sources.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:28 +02:00
Svyatoslav Ryhel
6ca426a095 ARM: tegra: tf701t: Add Bluetooth node
Add serial node along with bluetooth node to ASUS TF701T device-tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:28 +02:00
Svyatoslav Ryhel
fceb6acd5d ARM: tegra: tf701t: Add HDMI bindings
Add HDMI nodes to ASUS TF701T device-tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:28 +02:00
Svyatoslav Ryhel
1f02c9fb3a ARM: tegra: tf701t: Correct and complete PMIC and PMC bindings
Add missing parts of PMIC complex, extend PMC binding and add missing
fixed regulators. Additionally, refresh naming to better reflect
regulator purpose.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:28 +02:00
Svyatoslav Ryhel
984d444a10 ARM: tegra: tf701t: Bind VDE device
Add Video Decoder Engine node to ASUS TF701T device-tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:28 +02:00
Svyatoslav Ryhel
b457e191a7 ARM: tegra: tf701t: Use unimomentary pinmux setup
Mimic original downstream board behavior to set up all pinmux at once.
Per-device pinmux is good but we have no complete board schematics
to allow such luxury.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:16:23 +02:00
Hongbo Li
ce4a60592e lsm: Use IS_ERR_OR_NULL() helper function
Use the IS_ERR_OR_NULL() helper instead of open-coding a
NULL and an error pointer checks to simplify the code and
improve readability.

Signed-off-by: Hongbo Li <lihongbo22@huawei.com>
Signed-off-by: Paul Moore <paul@paul-moore.com>
2024-08-29 11:12:13 -04:00