The pxa_defconfig file defines CONFIG_USB_GPIO_VBUS twice, first as
built-in ('y') and then as a module ('m'). The kconfig system correctly
uses the last definition, but the duplication is confusing.
Remove the obsolete configuration to resolve the ambiguity and clean
up the configuration.
Fixes: 2002f39687 ("ARM: refresh defconfig files")
Signed-off-by: Jihed Chaibi <jihed.chaibi.dev@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit a7352c8494 ("dt-bindings: npu: rockchip,rknn: Add bindings") adds
the device-tree binding rockchip,rk3588-rknn-core.yaml, whereas the commit
ed98261b41 ("accel/rocket: Add a new driver for Rockchip's NPU") adds the
section DRM ACCEL DRIVER FOR ROCKCHIP NPU in MAINTAINERS with a file entry
referring to rockchip,rknn-core.yaml. Note that the file entry is missing
the part rk3588, compared to the added file above, which it intends to
refer to.
Adjust the file entry to the intended file name.
Fixes: ed98261b41 ("accel/rocket: Add a new driver for Rockchip's NPU")
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@redhat.com>
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Link: https://lore.kernel.org/r/20250826063248.32153-1-lukas.bulwahn@redhat.com
- Enable support for the Renesas RZ/T2H serial driver and the
RZ/V2H(P) RSPI driver in the ARM64 defconfig.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaLGQlQAKCRCKwlD9ZEnx
cB5SAP0SGMXzkc53TvvY6OtGBE7alJqloqN8qmwq8kPT+omfGwD/bWgbtDytscYP
2uHuIvKSuAAxiQOLjDXGf2mOuI3QMAQ=
=Wrka
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmi1cVAACgkQmmx57+YA
GNmH/w//RCYStV1s7T9PYvVgkjZoTvieRTIe8eVpRrBeYFDCmwf5OerDItwCfREq
xxNvk4RaehUk3pczzYszgFLi4BeRzXLLfpC8ZYo3EUBxijTc5flIGyW4yRnLa0DG
OqbxJpVIsAF6p11cjGD5781y6yaW+k4SpBfU5tCQREaVKiPlhYIRLYMLNkV7lTiK
gg8xQR2NQMy19n4NIfMVqusJk9YrA2HbAFkSwAxckVcaw7dYoFti8SQ+A+qZmRaZ
gRatIZXxITfHzqgZI7Z//bMJwxMi6r0dAiHi5uhJFFVhkpGFgSqXg+SfJCW57k+U
4RX+xa1DBkd4BEcVT8WcRfI/CGCazvCU+ntdWE6MDvEAE+Z/8xk+iSpi3KWzudDN
Y1czFBxRZ0NgJ9p9fvE8Pbl9LT8SLtMOdpQruv670DIlAVfg3czPdT/8/pyDg2ak
q0hoyIQ7VRyPxQQ7JI/mD5jivnXy8GsudNrO51DRLxonZqVs8mo+eZjc/q8iqL4P
yKpQYdb05MHK00RC6ix8CNZdY42vW9pXf7JMIenRkssxd2gmDBk3GDxY+QFs07Ry
1SACBCUniMODkn3JI/oYeXEbyaouri8V5SQeSChC7V3CJmnXAUN/8/c+8jF9+N9c
RNgcKJSQoYJPH/IkdJsDInNKKRI6oVBoRTjJkQvQNxoFprzzF28=
=vIpR
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-defconfig-for-v6.18-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/defconfig
Renesas ARM defconfig updates for v6.18
- Enable support for the Renesas RZ/T2H serial driver and the
RZ/V2H(P) RSPI driver in the ARM64 defconfig.
* tag 'renesas-arm-defconfig-for-v6.18-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: defconfig: Enable the RZ/V2H(P) RSPI driver
arm64: defconfig: Enable Renesas RZ/T2H serial SCI
Link: https://lore.kernel.org/r/cover.1756468043.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The problem is that pm_runtime_get_sync() can return 1 on success so
checking for zero doesn't work. Use the pm_runtime_resume_and_get()
function instead. The pm_runtime_resume_and_get() function does
additional cleanup as well so that's a bonus as well.
Fixes: 0810d5ad88 ("accel/rocket: Add job submission IOCTL")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Link: https://lore.kernel.org/r/aKcRW6fsRP_o5C_y@stanley.mountain
Right now, the code checks the DMA_READ_ERROR state 2 times, while
I guess it was supposed to warn about both read and write errors.
Change the 2nd check to look at the write-error flag.
Fixes: 0810d5ad88 ("accel/rocket: Add job submission IOCTL")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Link: https://lore.kernel.org/r/20250818185658.2585696-1-heiko@sntech.de
Replace usages of kfree() with kvfree() for pointers which were
allocated using kvmalloc(), as required by the kernel memory management
API.
Use sizeof() on the type that a pointer references instead of the
pointer itself. In this case, scheds and *scheds both happen to be
pointers, so sizeof() will expand to the same value in either case, but
using *scheds is more technically correct since scheds is an array of
drm_gpu_scheduler *.
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Julia Lawall <julia.lawall@inria.fr>
Closes: https://lore.kernel.org/r/202508120730.PLbjlKbI-lkp@intel.com/
Signed-off-by: Brigham Campbell <me@brighamcampbell.com>
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Link: https://lore.kernel.org/r/20250813-rocket-free-fix-v1-1-51f00a7a1271@brighamcampbell.com
Fixes: 0810d5ad88 ("accel/rocket: Add job submission IOCTL")
With the current dependency on only DRM, a config of
CONFIG_DRM_ACCEL_ROCKET=y
is possible, but of course wrong, because without DRM_ACCEL the build-
system will never even enter drivers/accel/* .
So depend on DRM_ACCEL instead of just DRM.
Fixes: ed98261b41 ("accel/rocket: Add a new driver for Rockchip's NPU")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Link: https://lore.kernel.org/r/20250814113519.1551855-3-heiko@sntech.de
The general indentation for the Kconfig lines is one tab, so adapt the
lines accordingly.
The description is correctly indented (1 tab + 2 spaces) so doesn't need
changes.
Fixes: ed98261b41 ("accel/rocket: Add a new driver for Rockchip's NPU")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Link: https://lore.kernel.org/r/20250814113519.1551855-2-heiko@sntech.de
Two small changes, the most interesting being the addition of the silicon IDs
for ASPEED's AST2700 SoC family.
-----BEGIN PGP SIGNATURE-----
iJIEABYIADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaKu87RwcYW5kcmV3QGNv
ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmxAoBAIWvFqHDVHh4qzcnmNeM
g1a5wEbNo/wS0DcEAX39tr9+AP45dJRQdIyj1lFbp0oyGvoyMK1zzr/cUQUGgdTQ
5OPgBQ==
=rg00
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmi1cLoACgkQmmx57+YA
GNkv+xAAm3l42yMRz7GbMNTRbBOh+On9XlvViXHbOjk4KFaBqEtiIYdbaoM8iIeI
Pp0wv4yX8Dn7qDd4THTKJ1xnnoe+wGwsYAi5lwR/miJv4U4ZyfWoDKhsNzvbCrL7
j25FyKMcXMmV1U+fufNUGOAwcjOawP26ud8Fb2xT2yEnaZl0em30hbMaYUu7Uj+0
/jBtTUf0nrHC7TRFgnM1oKRW41WjZgsD8Tdc/gTW2eWS68bG9XBBSPqWVxH4JcG9
JwP4yZ2RLRZb8YknVJhT3ue8FvtNklRcyo5O9iZCbDfIYJGsvZJZ3vuHvPlFkB+9
v/eQ4qDaWoJCJsAdzv1Jqp2Gcb4hTiwsTckwGGjVBe7vgjHYBkFlOPmlp2cqpi0D
vCLP+4SHlsz8koGRtPgC9sDJO+RvY32il2Kp6eMfWHEQ67h/8ncYQyW663uWJAek
hpdt6mFhj7k55YusKPH43KKdy12dtO7pnNja0Iio/GQ2cFrXzX1Tr3xdsaZS1L8K
Ipmjj0zGdJV21aEOCxtWDK4302702+nMKNh9zCgZYC7L8OtL23Pm3gIEqegcVrKV
IHvQRWnCg8Z0R4C00doDpVZyC38hAU/DigEIDVzbXK/UQZpTfMb8v817Il/5bUXZ
ONM/i60qW7aLchItfnuy9yNCZEgPtI4+CsJqztBCGDUHjVDnfHQ=
=mCh9
-----END PGP SIGNATURE-----
Merge tag 'aspeed-6.18-drivers-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/drivers
Early ASPEED driver updates for 6.18
Two small changes, the most interesting being the addition of the silicon IDs
for ASPEED's AST2700 SoC family.
* tag 'aspeed-6.18-drivers-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux:
soc: aspeed: socinfo: Add AST27xx silicon IDs
soc: aspeed: Use of_reserved_mem_region_to_resource() for "memory-region"
Link: https://lore.kernel.org/r/2d122b5c4a19261148993b66e4b98371a684ba74.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Patches for the arm64 defconfig are supposed to be sent to the
SoC maintainers (e.g. a change in the generic arm64 defconfig
required for Rockchip devices should be send to Heiko Stübner
as he is listed as maintainer for "ARM/Rockchip SoC support")
and not the ARM64 PORT maintainers.
While we cannot easily describe this in MAINTAINERS, we can at
least stop it from giving false information and make it behave
the same way as for the MAINTAINERS file itself (which basically
has the same rules), so that it just outputs the LKML for the
ARM64 defconfig.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Will Deacon <will@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20250818-arm64-defconfig-v1-1-f589553c3d72@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Remove fixed PPI lane count setup. The R-Car DSI host is capable
of operating in 1..4 DSI lane mode. Remove the hard-coded 4-lane
configuration from PPI register settings and instead configure
the PPI lane count according to lane count information already
obtained by this driver instance.
Configure TXSETR register to match PPI lane count. The R-Car V4H
Reference Manual R19UH0186EJ0121 Rev.1.21 section 67.2.2.3 Tx Set
Register (TXSETR), field LANECNT description indicates that the
TXSETR register LANECNT bitfield lane count must be configured
such, that it matches lane count configuration in PPISETR register
DLEN bitfield. Make sure the LANECNT and DLEN bitfields are
configured to match.
Fixes: 155358310f ("drm: rcar-du: Add R-Car DSI driver")
Cc: stable@vger.kernel.org
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20250813210840.97621-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Correct 'leave' to 'leaf' in memory bitmaps description comment.
Signed-off-by: Li Jun <lijun01@kylinos.cn>
Link: https://patch.msgid.link/20250819104038.1596952-1-lijun01@kylinos.cn
[ rjw: Subject and changelog edits ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Remove array_size() calls and replace vmalloc() and vzalloc() with
vmalloc_array() and vcalloc() respectively to simplify the code in
save_compressed_image() and load_compressed_image().
vmalloc_array() is also optimized better, resulting in less
instructions being used, and vmalloc_array() handling overhead is
lower [1].
Link: https://lore.kernel.org/lkml/abc66ec5-85a4-47e1-9759-2f60ab111971@vivo.com/ [1]
Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com>
Link: https://patch.msgid.link/20250817083636.53872-1-rongqianfeng@vivo.com
[ rjw: Changelog edits ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
So far we have just the one fix from Krzysztof that switches some nodes to use
generic names, as recommended by the spec.
-----BEGIN PGP SIGNATURE-----
iJEEABYIADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaKvAERwcYW5kcmV3QGNv
ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmHv4A9RM2+JUNZWMKvDPcTjFt
H2R8zB/cFEbPOMtoSkB+oUwA/0JGI7QRVZw7RqBQqfuxysNGfWhLZEZHleBUlM8S
J+oK
=y1U6
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmi1bSUACgkQmmx57+YA
GNnGIhAAozYx97G+M3hNTEXoXSpvGGkdGdlmSdnxmbaWsC7k5cxGyGBVARnfrkxp
MHvFLZLxMH7jitv2IEoDhQLH+rYtbejIAZk8Ogad/QLH37Y8JPbkL4toyUN6CTzH
YAS/OThLjJyjZgwCG9nc1oSZJE5IZMqBSS//iHnRdRZNQWZwAByU2ZMFWSEptj8l
XlvHQK6DtkzncNAzTmrh30VjqXeeIn+roCNC1n18CPUVFdkRsmYOFk2lEAUK0z+k
tQDcr3CjztnSyKm16X85GyJZvgbT8jQkAwZt9POv+MvfTTXKQ++AiacWd717D/U9
ZsXBC0z7PMN+gdwfJ0FyPmcBgoEFNdjt1mxt/G79/ppW8NtubV2ygXxDlmB5A3um
yPbDk8ygRQKNIIxmrZaZdWxvf8PrSHEJeDHlT0QBRJZ+1hUE2bPMR46GHxZIYD6P
ZBmtmb4jDQ+ShdHy4IuyzlIzx4tWbpaKQ25pcczkbuqdyfzf1m933A/DLZfMdT3u
xampos7/nbuWB2ho2R1mzqHOTDHzWtzODw/atGX2Df2aCwK+eEbpZOCJmy/OZsWr
o0qpW5kAg56FvaK8NDkonEiNR/ysy0kb5HTpbOALO2Uiq8X5WaIZ2p2zFtiGb/+e
qrU21koqnsBZivUDKOXgkz8US62icL27jwMNzuoOf59nrbk0cTE=
=xitu
-----END PGP SIGNATURE-----
Merge tag 'nuvoton-arm-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt
Early Nuvoton ARM devicetree updates for 6.18
So far we have just the one fix from Krzysztof that switches some nodes to use
generic names, as recommended by the spec.
* tag 'nuvoton-arm-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux:
ARM: dts: nuvoton: Use generic "ethernet" as node name
Link: https://lore.kernel.org/r/5e7e5d2cedb3bb232420ad720c857b95d8c02f21.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Notable changes:
- Meta's Wedge400 and Fuji boards have had parallel devicetrees added for a
transition to a new static flash layout. The original layout is deprecated and
I anticipate removing related devicetrees in future releases.
New platforms:
- Darwin (Meta)
Darwin is Meta's rack switch platform with an AST2600 BMC integrated for
health monitoring purpose.
Updates and fixes:
- GB200NVL (Nvidia): Networking, I2C, regulators, GPIOs
- Wedge400, Fuji (Meta): Fix warnings from devicetree bindings
- Use fixed-layout for NVMEM on Asrock platforms
- Various: minor fixes for warnings from FSI devicetree bindings
-----BEGIN PGP SIGNATURE-----
iJIEABYIADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaKu5BRwcYW5kcmV3QGNv
ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmFJwBALWNxxcJBLFMPaJW0bJq
kPoqByiQOR3r1TujWQZ2aUWRAP0cam51AXTTDuSg6qvtAAOcT0i1o/bfT4OU15me
k34+Bw==
=mqVf
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmi1bMYACgkQmmx57+YA
GNnGnRAAto2h0rI8Ra4zqmCZ1hH9VMXBUCeufq6IWt1K2R7ApHHboZMvZFSb9o6J
Afz9I4S0iH+hHe5dvbDy3qqpSGLbz8dUdo8ZuGEQ0K/7KTUkrd/IJoVgsNd7+I02
1rkYySVsE/11vjmmt2BaYL89zachh5aWAihk159sGJmZy/8bNc2B8oIsGj2CQ/vJ
Ex6iafvIEpSLcbYISa/6vjlmxXrQrJLH1W5Kj4rRHvi+pgZF8vajtKJXuaC/+JY0
KdFQurnfhBOpeWbLp3xz2OPHVjuwLyA2jS3aQZ6gxdqsixEu6ARPFQhhQZ7zlYYn
a+K68Tgu2gVeis2lTPCBiBoq1xNT8t1ZO8E2KLRcgfTRsROpM02zHFi/u7348rSe
JOEgV7sJZmmI/pGUdrfL4y5BzAcUDyxDZm15/PJzc+AELre3GdZOQBp2n65TQicH
Wa5PUQBUPNE7Yr306JwIIhttALChy4DhF+u1kcDiwWAyrM4xPTIBW7Pj19w3budC
2RXHrfqLipbMcwQywJ5KowGQPxvCz7HIr2wgL2jyH+1it+0bhy2uPJBbiaDcahWC
zOXUnskrGev+zlAvo8p33vZN/28Jdj0KqS3q85h7sAYoNyUyoqIMp89OfuLbnP4C
GhKwRI6en5Tc1tQObNPNR6cBdl7NCPVmrdlsbnA2Cfo90aIOLAE=
=A4kl
-----END PGP SIGNATURE-----
Merge tag 'aspeed-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt
Early ASPEED devicetree updates for 6.18
Notable changes:
- Meta's Wedge400 and Fuji boards have had parallel devicetrees added for a
transition to a new static flash layout. The original layout is deprecated and
I anticipate removing related devicetrees in future releases.
New platforms:
- Darwin (Meta)
Darwin is Meta's rack switch platform with an AST2600 BMC integrated for
health monitoring purpose.
Updates and fixes:
- GB200NVL (Nvidia): Networking, I2C, regulators, GPIOs
- Wedge400, Fuji (Meta): Fix warnings from devicetree bindings
- Use fixed-layout for NVMEM on Asrock platforms
- Various: minor fixes for warnings from FSI devicetree bindings
* tag 'aspeed-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: (24 commits)
ARM: dts: aspeed: x570d4u: convert NVMEM content to layout syntax
ARM: dts: aspeed: romed8hm3: convert NVMEM content to layout syntax
ARM: dts: aspeed: e3c256d4i: convert NVMEM content to layout syntax
ARM: dts: aspeed: e3c246d4i: convert NVMEM content to layout syntax
ARM: dts: aspeed: Add missing "ibm,spi-fsi" compatibles
ARM: dts: aspeed: Drop "fsi-master" compatibles
ARM: dts: aspeed: Drop "no-gpio-delays"
ARM: dts: aspeed: Add Facebook Darwin (AST2600) BMC
dt-bindings: arm: aspeed: add Facebook Darwin board
ARM: dts: aspeed: facebook-fuji: Include facebook-fuji-data64.dts
ARM: dts: aspeed: Add Facebook Fuji-data64 (AST2600) Board
dt-bindings: arm: aspeed: add Facebook Fuji-data64 board
ARM: dts: aspeed: wedge400: Include wedge400-data64.dts
ARM: dts: aspeed: Add Facebook Wedge400-data64 (AST2500) BMC
dt-bindings: arm: aspeed: add Facebook Wedge400-data64 board
ARM: dts: aspeed: Add facebook-bmc-flash-layout-128-data64.dtsi
ARM: dts: aspeed: Move eMMC out of ast2600-facebook-netbmc-common.dtsi
ARM: dts: aspeed: Fix DTB warnings in ast2600-facebook-netbmc-common.dtsi
ARM: dts: aspeed: fuji: Fix DTB warnings
ARM: dts: aspeed: wedge400: Fix DTB warnings
...
Link: https://lore.kernel.org/r/cb634cffaf0db9d25fb3062f0eee41e03955321f.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Added SMC nodes for M1 and M2 including the PMU GPIO controller and
reboot sub-nodes. This now allows to reboot these systems and is
required to later enable the power GPIO line for the WiFi board.
- Added i2c nodes for A7 - A11 SoCs
Signed-off-by: Sven Peter <sven@kernel.org>
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQS3vz815OHsEaWy0u9EEX0kKnUe6QUCaKC7WAAKCRBEEX0kKnUe
6XTnAQCBSrZBW++uglkj0KTao6FRboBkLIWhjzWcn2+4UukhEgEAm7WuBtkLk8tY
CFzV2NYQK/GpJOUiO3EBRAc20h3c5AQ=
=jlVZ
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmi1bIsACgkQmmx57+YA
GNlGiw/+KGCfZXaW2fW04PKG3UjqQJaNQ9v7I4xB9xsoRnWOWiRNCXRkJbqRcYcw
ouVKQzrvnzlRr9aNNIgHRGGhhBZ7oB3w/M26dbmaTLkmOdNYWEc32Spe/kIK2pDg
sNDW3ywYRQ3eioRkjWy4NwYsvSjA7yGpuc0q1x9vsB7jfUsEryGwv1ljFznzXWaG
U8WS4c2JqQVuzdbSlP0m0c/aagsJBltcKy2OPTy/9dUVkNaTGyCO+ninj6qGh9/e
5pvwCxpGA3x1OwY51AkM+NoPghyUQw/mL31W3BU7+3vUCpPBuiUwp5iPe5OXdBkI
fDNquczlxhCda2T2YrQXe9p/+yhbHstZafHtJQOlF5XqZf7HHwg11Opp59qINUkx
TYxdJVey2O7MaQ7IjMBSM5+7FfVe6eTRkW9O+rVvYqWwyzSUFEbMjGWk6D7y40L3
QzJemNxBhiX/5aQoFJNKvQyA/KcLvf2XXFas4327CRSIiuwvyGvwpuQ+C1W5XSce
KG7WrdH+VWQdTPfS+uDRz5mCcsWc+YFOyn6tkASNrgv++JtqQnLI62a1R8HKfSN1
GZMx8XDC8F3ZvBaZBJ5i7agro51e1DsUJDMBg3omsdbp6q3G9sgU9MxAk4xNhjDP
zAo1c4RiOdqPcZNBFF9U/A8E+kE7bd1TsMeO0m25gO/dUAlKnA4=
=KcZo
-----END PGP SIGNATURE-----
Merge tag 'apple-soc-dt-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/dt
Apple SoC device tree changes for v6.18, part 1
- Added SMC nodes for M1 and M2 including the PMU GPIO controller and
reboot sub-nodes. This now allows to reboot these systems and is
required to later enable the power GPIO line for the WiFi board.
- Added i2c nodes for A7 - A11 SoCs
Signed-off-by: Sven Peter <sven@kernel.org>
* tag 'apple-soc-dt-6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux:
arm64: dts: apple: t600x: Add SMC node
arm64: dts: apple: t8112: Add SMC node
arm64: dts: apple: t8103: Add SMC node
arm64: dts: apple: t8015: Add I2C nodes
arm64: dts: apple: t8011: Add I2C nodes
arm64: dts: apple: t8010: Add I2C nodes
arm64: dts: apple: s8001: Add I2C nodes
arm64: dts: apple: s800-0-3: Add I2C nodes
arm64: dts: apple: t7001: Add I2C nodes
arm64: dts: apple: t7000: Add I2C nodes
arm64: dts: apple: s5l8960x: Add I2C nodes
Link: https://lore.kernel.org/r/20250816171501.31944-1-sven@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Devicetree is a data structure and it is a bit generic term, because
some treat Devicetree bindings as Devicetree. What the SoC maintainers
profile is mentioning in ABI stability are the Devicetree sources, so
DTS files. It is also more common during reviews to refer to these as
per "DTS" instead "devicetree".
Clarify that by using "DTS" name in few more places.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20250812104154.42289-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Axiado AX3000 EVK has total of 4 UART ports. Add missing alias for uart0,
uart1, uart2.
This fixes the probe failures on the remaining UARTs.
Fixes: 1f70557790 ("arm64: dts: axiado: Add initial support for AX3000 SoC and eval board")
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The kernel test robot reported that sparse gives the following warnings:
make C=2 M=drivers/gpu/drm/sitronix/
CC [M] st7571-i2c.o
CHECK st7571-i2c.c
st7571-i2c.c:1027:26: warning: symbol 'st7567_config' was not declared. Should it be static?
st7571-i2c.c:1039:26: warning: symbol 'st7571_config' was not declared. Should it be static?
MODPOST Module.symvers
LD [M] st7571-i2c.ko
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202507180503.nfyD9uRv-lkp@intel.com
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250718152534.729770-1-javierm@redhat.com
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
set_track_prepare() can incur lock recursion.
The issue is that it is called from hrtimer_start_range_ns
holding the per_cpu(hrtimer_bases)[n].lock, but when enabled
CONFIG_DEBUG_OBJECTS_TIMERS, may wake up kswapd in set_track_prepare,
and try to hold the per_cpu(hrtimer_bases)[n].lock.
Avoid deadlock caused by implicitly waking up kswapd by passing in
allocation flags, which do not contain __GFP_KSWAPD_RECLAIM in the
debug_objects_fill_pool() case. Inside stack depot they are processed by
gfp_nested_mask().
Since ___slab_alloc() has preemption disabled, we mask out
__GFP_DIRECT_RECLAIM from the flags there.
The oops looks something like:
BUG: spinlock recursion on CPU#3, swapper/3/0
lock: 0xffffff8a4bf29c80, .magic: dead4ead, .owner: swapper/3/0, .owner_cpu: 3
Hardware name: Qualcomm Technologies, Inc. Popsicle based on SM8850 (DT)
Call trace:
spin_bug+0x0
_raw_spin_lock_irqsave+0x80
hrtimer_try_to_cancel+0x94
task_contending+0x10c
enqueue_dl_entity+0x2a4
dl_server_start+0x74
enqueue_task_fair+0x568
enqueue_task+0xac
do_activate_task+0x14c
ttwu_do_activate+0xcc
try_to_wake_up+0x6c8
default_wake_function+0x20
autoremove_wake_function+0x1c
__wake_up+0xac
wakeup_kswapd+0x19c
wake_all_kswapds+0x78
__alloc_pages_slowpath+0x1ac
__alloc_pages_noprof+0x298
stack_depot_save_flags+0x6b0
stack_depot_save+0x14
set_track_prepare+0x5c
___slab_alloc+0xccc
__kmalloc_cache_noprof+0x470
__set_page_owner+0x2bc
post_alloc_hook[jt]+0x1b8
prep_new_page+0x28
get_page_from_freelist+0x1edc
__alloc_pages_noprof+0x13c
alloc_slab_page+0x244
allocate_slab+0x7c
___slab_alloc+0x8e8
kmem_cache_alloc_noprof+0x450
debug_objects_fill_pool+0x22c
debug_object_activate+0x40
enqueue_hrtimer[jt]+0xdc
hrtimer_start_range_ns+0x5f8
...
Signed-off-by: yangshiguang <yangshiguang@xiaomi.com>
Fixes: 5cf909c553 ("mm/slub: use stackdepot to save stack trace in objects")
Cc: stable@vger.kernel.org
Signed-off-by: Vlastimil Babka <vbabka@suse.cz>
If built on architectures with CONFIG_ARCH_DMA_ADDR_T_64BIT=y nova-core
produces that following build failures:
error[E0308]: mismatched types
--> drivers/gpu/nova-core/fb.rs:49:59
|
49 | hal::fb_hal(chipset).write_sysmem_flush_page(bar, page.dma_handle())?;
| ----------------------- ^^^^^^^^^^^^^^^^^ expected `u64`, found `u32`
| |
| arguments to this method are incorrect
|
note: method defined here
--> drivers/gpu/nova-core/fb/hal.rs:19:8
|
19 | fn write_sysmem_flush_page(&self, bar: &Bar0, addr: u64) -> Result;
| ^^^^^^^^^^^^^^^^^^^^^^^
help: you can convert a `u32` to a `u64`
|
49 | hal::fb_hal(chipset).write_sysmem_flush_page(bar, page.dma_handle().into())?;
| +++++++
error[E0308]: mismatched types
--> drivers/gpu/nova-core/fb.rs:65:47
|
65 | if hal.read_sysmem_flush_page(bar) == self.page.dma_handle() {
| ------------------------------- ^^^^^^^^^^^^^^^^^^^^^^ expected `u64`, found `u32`
| |
| expected because this is `u64`
|
help: you can convert a `u32` to a `u64`
|
65 | if hal.read_sysmem_flush_page(bar) == self.page.dma_handle().into() {
| +++++++
error: this arithmetic operation will overflow
--> drivers/gpu/nova-core/falcon.rs:469:23
|
469 | .set_base((dma_start >> 40) as u16)
| ^^^^^^^^^^^^^^^^^ attempt to shift right by `40_i32`, which would overflow
|
= note: `#[deny(arithmetic_overflow)]` on by default
This is due to the code making assumptions on the width of dma_addr_t to
be 64 bit.
While this could technically be handled, it is rather painful to deal
with, as the following example illustrates:
pub(super) fn read_sysmem_flush_page_ga100(bar: &Bar0) -> DmaAddress {
let addr = u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08())
<< FLUSH_SYSMEM_ADDR_SHIFT
| u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::read(bar).adr_63_40())
<< FLUSH_SYSMEM_ADDR_SHIFT_HI;
addr.try_into().unwrap_or_else(|_| {
kernel::warn_on!(true);
0
})
}
At the same time there's not much value for nova-core to support 32-bit,
given that the supported GPU architectures are Turing and later, hence
depend on CONFIG_64BIT.
Cc: John Hubbard <jhubbard@nvidia.com>
Reported-by: Miguel Ojeda <ojeda@kernel.org>
Closes: https://lore.kernel.org/lkml/20250828160247.37492-1-ojeda@kernel.org/
Fixes: 6554ad65b5 ("gpu: nova-core: register sysmem flush page")
Fixes: 69f5cd67ce ("gpu: nova-core: add falcon register definitions and base code")
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: John Hubbard <jhubbard@nvidia.com>
Link: https://lore.kernel.org/r/20250828223954.351348-1-dakr@kernel.org
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
Same issue as G1619-04 in commit 805c74eac8 ("gpiolib: acpi: Ignore
touchpad wakeup on GPD G1619-04"), Strix Point lineup uses 05.
Signed-off-by: Antheas Kapenekakis <lkml@antheas.dev>
Reviewed-by: Mika Westerberg <westeri@kernel.org>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
The company's email address has been changed, so update my email
address in MAINTAINERS and .mailmap files.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.x90@mail.toshiba>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Extend the existing Tegra186 GPIO controller driver with support for the
GPIO controller found on Tegra256. While the programming model remains
the same, the number of pins has slightly changed.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Link: https://lore.kernel.org/r/20250823055420.24664-2-pshete@nvidia.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Extend the existing Tegra186 GPIO controller device tree bindings with
support for the GPIO controller found on Tegra256. The number of pins is
slightly different, but the programming model remains the same
Add a new header, include/dt-bindings/gpio/tegra256-gpio.h,
that defines port IDs as well as the TEGRA256_MAIN_GPIO() helper,
both of which are used in conjunction to create a unique specifier
for each pin. The OS can reconstruct the port ID and pin from
these values to determine the register region for the corresponding
GPIO. However, the OS does not use the macro definitions in this file.
The symbolic names help associate these GPIO specifiers with the names
used in the technical documentation available for the chip.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250823055420.24664-1-pshete@nvidia.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
A malicious user could pass an arbitrarily bad value
to memdup_user_nul(), potentially causing kernel crash.
This follows the same pattern as commit ee76746387
("netdevsim: prevent bad user input in nsim_dev_health_break_write()")
Fixes: b6c7e873da ("xtensa: ISS: add host file-based simulated disk")
Fixes: 16e5c1fc36 ("convert a bunch of open-coded instances of memdup_user_nul()")
Cc: stable@vger.kernel.org
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Message-Id: <20250829083015.1992751-1-linmq006@gmail.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
In the upstream commit 214c0eea43
("kbuild: add $(objtree)/ prefix to some in-kernel build artifacts")
artifacts required for building out-of-tree kernel modules had
$(objtree) prepended to them to prepare for building in other
directories.
When building external modules for powerpc,
arch/powerpc/lib/crtsavres.o is required for certain
configurations. This artifact is missing the prepended $(objtree).
Fixes: 13b25489b6 ("kbuild: change working directory to external module directory with M=")
Acked-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Nicolas Schier <n.schier@avm.de>
Tested-by: Nicolas Schier <n.schier@avm.de>
Signed-off-by: Kienan Stewart <kstewart@efficios.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20250218-buildfix-extmod-powerpc-v2-1-1e78fcf12b56@efficios.com
The calculations for operand/opcode/macro numbers are done in an
identical manner to the already existing ARRAY_SIZE macro in
linux/array_size.h
This patch replaces the sizeof calculations with the macro to make the
code cleaner and more immediately obvious what it is doing.
Signed-off-by: Ruben Wauters <rubenru09@aol.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20250719225225.2132-2-rubenru09@aol.com
pnv_irq_domain_alloc() allocates interrupts at parent's interrupt
domain. If it fails in the progress, all allocated interrupts are
freed.
The number of successfully allocated interrupts so far is stored
"i". However, "i - 1" interrupts are freed. This is broken:
- One interrupt is not be freed
- If "i" is zero, "i - 1" wraps around
Correct the number of freed interrupts to "i".
Fixes: 0fcfe2247e ("powerpc/powernv/pci: Add MSI domains")
Signed-off-by: Nam Cao <namcao@linutronix.de>
Cc: stable@vger.kernel.org
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/70f8debe8688e0b467367db769b71c20146a836d.1754300646.git.namcao@linutronix.de
pseries_irq_domain_alloc() allocates interrupts at parent's interrupt
domain. If it fails in the progress, all allocated interrupts are
freed.
The number of successfully allocated interrupts so far is stored
"i". However, "i - 1" interrupts are freed. This is broken:
- One interrupt is not be freed
- If "i" is zero, "i - 1" wraps around
Correct the number of freed interrupts to 'i'.
Fixes: a5f3d2c17b ("powerpc/pseries/pci: Add MSI domains")
Signed-off-by: Nam Cao <namcao@linutronix.de>
Cc: stable@vger.kernel.org
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/a980067f2b256bf716b4cd713bc1095966eed8cd.1754300646.git.namcao@linutronix.de
The recently extended sanity checks for the Qualcomm firmware files
turned out to be too restrictive, preventing a variety of firmware
images from being loaded. Adjust the checks to allow section header
sizes of 0 when sections aren't used.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmiaBEIVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FEzMQAL1fo13UqDYeVOUGZzw0M3nMMYgT
DRW/GjtklIKHLvwwmTBEhgM3lPoNmpUVqV3hC/mMxQRkGaG+RmiUbD9+IgKqIgyp
5o6LXmRIvuhIPY+7GA4iXf+VgPTpps1AzdkvXBQgBbJZ6RTzGrB1WGrAf746hprA
A8RQVfQFM7DHiLNt5dbqrbqdu2/vn9Q5SU3F1MFq22EA9VU6UYHFBZ03Ar+lkpVT
CHoUhUdV139xvjXNph+pRkS6ykJyCo9RONXG19ssC+LUkg4YevCJV20q/qFWBOrq
rUpqhQUKWtQNdGWEg8sjvdu1s4/NYIBNFz3V9Ys2OVfg3RqnGOcpZThjbzTuHJV0
AaCzBmEgGCuHasyzNxhhzVfn7PGJ6Fhb0cOKev1z0ilXMUeTpbW/xQLr8OK6mdwN
NR4d0P7aDSLzaUEmbm557vz9vkuBaGod2LaKPcXN1trFt/p0Ie467aLeY2gFu4TC
aNP/bo1z3XdUWrW8noU3zJSVjk45pO/sAik2aaDk/dD6A41UHup/GvuXw59nmFU0
E/LxRc9Ig8s/kS8wpU1dCCvOrCD72ljU58DUVciIGdxdJpo0VuxaxRBPHoTvDkh9
ywDlTYPcTJCBOfNNCq7lA8UHRaUJ4XYaOkhV5isjZJDGbNjUOPFBRy4g4e5p3XFl
GdZB5hA5P4obN33y
=UVX0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmi1VI0ACgkQmmx57+YA
GNmh5Q/+MqfYPlBhnFsyFa/418pcU/C7qnODlWKSw1Q9ia0coRwQofMoo5yeERQc
3pPY9bnyS+Owfk8n26iMLkNht6IaAYNepfST0nVEklveywszJiz1x1u73+1Ngknd
ajkgAugH8+iduqbRzIpGodLiwTnGJikfLJ3wgMQ9yyK0SwLIZ3/a8/2P9LWN2+d1
WLV62XpvP5+1kGeO76gekbnzpU4F9bquaoYSR9pwnQ8AKkZNWOgSWuZWPW4muCpD
0c6bX9JFHJ2iITPIPlKxMijP9/dHXqO8E8hGCVYqLZOhbBgPwtx77US5c51txOPK
V6WFduaTjAGNLcJz7WGJuYyBT2Sva037hRo6Z0GTp2jRoNLPkfdJZcJ7GhHO+fjz
VVckN+51sts6ESAZBEpnQy7C0hIDIwha2vBeKt6nxYCR0DB7dT4ey+FwysuwurBL
6A1j+1qI7q0JKOA7LQkS6ofHHHbZUuOvgjyUBG3eDkg5BApbcfa3x0rLeq9cZvDr
xtlFd5P+hctF5qeCQ6VL7MjHG7Yks6pUC2Bwaxm2h2Rbz1NtYkrri/NUk31wnU73
Nv/RKEMWTZmwBaAV6Whuz7/M9zehGmzDkEJGhv1ikbWC5zm8YUkYwckKShun41bV
DwB6At01DI7QbTsAS5ZlOKQyS3a7rc0XEyI+bACCp2I0Urnom7k=
=zaMo
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-fixes-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm driver fixes for v6.17-rc1
The recently extended sanity checks for the Qualcomm firmware files
turned out to be too restrictive, preventing a variety of firmware
images from being loaded. Adjust the checks to allow section header
sizes of 0 when sections aren't used.
* tag 'qcom-drivers-fixes-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: mdt_loader: Deal with zero e_shentsize
Link: https://lore.kernel.org/r/20250811145613.120917-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a lock contention tracepoint in the queued spinlock slowpath.
Also add the __lockfunc annotation so that in_lock_functions()
works as expected.
Signed-off-by: Nysal Jan K.A. <nysal@linux.ibm.com>
Reviewed-by: Shrikanth Hegde <sshegde@linux.ibm.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20250731061856.1858898-1-nysal@linux.ibm.com
While the GCC and Clang compilers already define __ASSEMBLER__
automatically when compiling assembler code, __ASSEMBLY__ is a
macro that only gets defined by the Makefiles in the kernel.
This is bad since macros starting with two underscores are names
that are reserved by the C language. It can also be very confusing
for the developers when switching between userspace and kernelspace
coding, or when dealing with uapi headers that rather should use
__ASSEMBLER__ instead. So let's standardize now on the __ASSEMBLER__
macro that is provided by the compilers.
This is almost a completely mechanical patch (done with a simple
"sed -i" statement), apart from tweaking two comments manually in
arch/powerpc/include/asm/bug.h and arch/powerpc/include/asm/kasan.h
(which did not have proper underscores at the end) and fixing a
checkpatch error about spaces in arch/powerpc/include/asm/spu_csa.h.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20250801082007.32904-3-thuth@redhat.com
__ASSEMBLY__ is only defined by the Makefile of the kernel, so
this is not really useful for uapi headers (unless the userspace
Makefile defines it, too). Let's switch to __ASSEMBLER__ which
gets set automatically by the compiler when compiling assembler
code.
This is a completely mechanical patch (done with a simple "sed -i"
statement).
Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/20250801082007.32904-2-thuth@redhat.com
Now that we have all the accessors taking masks, we can create defines
for them and reuse them as needed.
It makes the driver easier to read, less prone to consistency issues,
and allows to reuse defines when needed.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-14-7689b664cc63@kernel.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
The OVR_REG_FLD_MOD function takes the start and end bits as parameter
and will generate a mask out of them.
This makes it difficult to share the masks between callers, since we now
need two arguments and to keep them consistent.
Let's change OVR_REG_FLD_MOD to take the mask as an argument instead,
and let the caller create the mask. Eventually, this mask will be moved
to a define.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-13-7689b664cc63@kernel.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
The VP_REG_FLD_MOD function takes the start and end bits as parameter
and will generate a mask out of them.
This makes it difficult to share the masks between callers, since we now
need two arguments and to keep them consistent.
Let's change VP_REG_FLD_MOD to take the mask as an argument instead, and
let the caller create the mask. Eventually, this mask will be moved to a
define.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-12-7689b664cc63@kernel.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
The VP_REG_GET function takes the start and end bits as parameter and
will generate a mask out of them.
This makes it difficult to share the masks between callers, since we now
need two arguments and to keep them consistent.
Let's change VP_REG_GET to take the mask as an argument instead, and let
the caller create the mask. Eventually, this mask will be moved to a
define.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-11-7689b664cc63@kernel.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
The VID_REG_FLD_MOD function takes the start and end bits as parameter
and will generate a mask out of them.
This makes it difficult to share the masks between callers, since we now
need two arguments and to keep them consistent.
Let's change VID_REG_FLD_MOD to take the mask as an argument instead,
and let the caller create the mask. Eventually, this mask will be moved
to a define.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-10-7689b664cc63@kernel.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
The VID_REG_GET function takes the start and end bits as parameter and
will generate a mask out of them.
This makes it difficult to share the masks between callers, since we now
need two arguments and to keep them consistent.
Let's change VID_REG_GET to take the mask as an argument instead, and
let the caller create the mask. Eventually, this mask will be moved to a
define.
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20250827-drm-tidss-field-api-v3-9-7689b664cc63@kernel.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
