Commit graph

1,185,212 commits

Author SHA1 Message Date
Veerasenareddy Burru
f25e596755 octeon_ep: include function id in mailbox commands
Extend control command structure to include vfid and
update APIs to accept VF ID.

Signed-off-by: Abhijit Ayarekar <aayarekar@marvell.com>
Signed-off-by: Veerasenareddy Burru <vburru@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:37:54 +01:00
Veerasenareddy Burru
577f0d1b1c octeon_ep: add separate mailbox command and response queues
Enhance control mailbox protocol to support following
 - separate command and response queues
    * command queue to send control commands to firmware.
    * response queue to receive responses and notifications from
      firmware.
 - variable size messages using scatter/gather

Signed-off-by: Abhijit Ayarekar <aayarekar@marvell.com>
Signed-off-by: Veerasenareddy Burru <vburru@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:37:54 +01:00
Veerasenareddy Burru
7c05d3d06c octeon_ep: control mailbox for multiple PFs
Add control mailbox support for multiple PFs.
Update control mbox base address calculation based on PF function link.

Signed-off-by: Veerasenareddy Burru <vburru@marvell.com>
Signed-off-by: Abhijit Ayarekar <aayarekar@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:37:54 +01:00
Veerasenareddy Burru
24d4333233 octeon_ep: poll for control messages
Poll for control messages until interrupts are enabled.
All the interrupts are enabled in ndo_open().
Add ability to listen for notifications from firmware before ndo_open().
Once interrupts are enabled, this polling is disabled and all the
messages are processed by bottom half of interrupt handler.

Signed-off-by: Veerasenareddy Burru <vburru@marvell.com>
Signed-off-by: Abhijit Ayarekar <aayarekar@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:37:54 +01:00
Veerasenareddy Burru
10c073e404 octeon_ep: defer probe if firmware not ready
Defer probe if firmware is not ready for device usage.

Signed-off-by: Veerasenareddy Burru <vburru@marvell.com>
Signed-off-by: Abhijit Ayarekar <aayarekar@marvell.com>
Signed-off-by: Satananda Burla <sburla@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:37:54 +01:00
Rob Herring
2ee1bdd311 bus: ti-sysc: Use of_property_present() for testing DT property presence
It is preferred to use typed property access functions (i.e.
of_property_read_<type> functions) rather than low-level
of_get_property/of_find_property functions for reading properties. As
part of this, convert of_get_property/of_find_property calls to the
recently added of_property_present() helper when we just want to test
for presence of a property and nothing more.

Signed-off-by: Rob Herring <robh@kernel.org>
Message-Id: <20230310144734.1546656-1-robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-03-27 10:32:17 +03:00
Michael Kelley
812b0597fb x86/hyperv: Change vTOM handling to use standard coco mechanisms
Hyper-V guests on AMD SEV-SNP hardware have the option of using the
"virtual Top Of Memory" (vTOM) feature specified by the SEV-SNP
architecture. With vTOM, shared vs. private memory accesses are
controlled by splitting the guest physical address space into two
halves.

vTOM is the dividing line where the uppermost bit of the physical
address space is set; e.g., with 47 bits of guest physical address
space, vTOM is 0x400000000000 (bit 46 is set).  Guest physical memory is
accessible at two parallel physical addresses -- one below vTOM and one
above vTOM.  Accesses below vTOM are private (encrypted) while accesses
above vTOM are shared (decrypted). In this sense, vTOM is like the
GPA.SHARED bit in Intel TDX.

Support for Hyper-V guests using vTOM was added to the Linux kernel in
two patch sets[1][2]. This support treats the vTOM bit as part of
the physical address. For accessing shared (decrypted) memory, these
patch sets create a second kernel virtual mapping that maps to physical
addresses above vTOM.

A better approach is to treat the vTOM bit as a protection flag, not
as part of the physical address. This new approach is like the approach
for the GPA.SHARED bit in Intel TDX. Rather than creating a second kernel
virtual mapping, the existing mapping is updated using recently added
coco mechanisms.

When memory is changed between private and shared using
set_memory_decrypted() and set_memory_encrypted(), the PTEs for the
existing kernel mapping are changed to add or remove the vTOM bit in the
guest physical address, just as with TDX. The hypercalls to change the
memory status on the host side are made using the existing callback
mechanism. Everything just works, with a minor tweak to map the IO-APIC
to use private accesses.

To accomplish the switch in approach, the following must be done:

* Update Hyper-V initialization to set the cc_mask based on vTOM
  and do other coco initialization.

* Update physical_mask so the vTOM bit is no longer treated as part
  of the physical address

* Remove CC_VENDOR_HYPERV and merge the associated vTOM functionality
  under CC_VENDOR_AMD. Update cc_mkenc() and cc_mkdec() to set/clear
  the vTOM bit as a protection flag.

* Code already exists to make hypercalls to inform Hyper-V about pages
  changing between shared and private.  Update this code to run as a
  callback from __set_memory_enc_pgtable().

* Remove the Hyper-V special case from __set_memory_enc_dec()

* Remove the Hyper-V specific call to swiotlb_update_mem_attributes()
  since mem_encrypt_init() will now do it.

* Add a Hyper-V specific implementation of the is_private_mmio()
  callback that returns true for the IO-APIC and vTPM MMIO addresses

  [1] https://lore.kernel.org/all/20211025122116.264793-1-ltykernel@gmail.com/
  [2] https://lore.kernel.org/all/20211213071407.314309-1-ltykernel@gmail.com/

  [ bp: Touchups. ]

Signed-off-by: Michael Kelley <mikelley@microsoft.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/1679838727-87310-7-git-send-email-mikelley@microsoft.com
2023-03-27 09:31:43 +02:00
Álvaro Fernández Rojas
45977e58ce net: dsa: b53: mmap: add phy ops
Implement phy_read16() and phy_write16() ops for B53 MMAP to avoid accessing
B53_PORT_MII_PAGE registers which hangs the device.
This access should be done through the MDIO Mux bus controller.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:31:34 +01:00
David S. Miller
fbf8ba5666 Merge branch 'bcm53134-support'
Álvaro Fernández Rojas says:

====================
net: dsa: b53: mdio: add support for BCM53134

This is based on the initial work from Paul Geurts that was sent to the
incorrect linux development lists and recipients.
I've modified it by removing BCM53134_DEVICE_ID from is531x5() and therefore
adding is53134() where needed.
I also added a separate RGMII handling block for is53134() since according to
Paul, BCM53134 doesn't support RGMII_CTRL_TIMING_SEL as opposed to is531x5().
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:29:54 +01:00
Paul Geurts
f927e8ef1e net: dsa: b53: mdio: add support for BCM53134
Add support for the BCM53134 Ethernet switch in the existing b53 dsa driver.
BCM53134 is very similar to the BCM58XX series.

Signed-off-by: Paul Geurts <paul.geurts@prodrive-technologies.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:29:54 +01:00
Álvaro Fernández Rojas
a20869b3a7 dt-bindings: net: dsa: b53: add BCM53134 support
BCM53134 are B53 switches connected by MDIO.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:29:54 +01:00
Greg Kroah-Hartman
97318d6427 Merge 6.3-rc4 into usb-next
We need the USB fixes here, and the USB gadget update for future
development patches to be based on.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-03-27 09:27:01 +02:00
Michael Kelley
e45e761b77 init: Call mem_encrypt_init() after Hyper-V hypercall init is done
Full Hyper-V initialization, including support for hypercalls, is done
as an apic_post_init callback via late_time_init().  mem_encrypt_init()
needs to make hypercalls when it marks swiotlb memory as decrypted.
But mem_encrypt_init() is currently called a few lines before
late_time_init(), so the hypercalls don't work.

Fix this by moving mem_encrypt_init() after late_time_init() and
related clock initializations. The intervening initializations don't
do any I/O that requires the swiotlb, so moving mem_encrypt_init()
slightly later has no impact.

Signed-off-by: Michael Kelley <mikelley@microsoft.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://lore.kernel.org/r/1678329614-3482-6-git-send-email-mikelley@microsoft.com
2023-03-27 09:24:01 +02:00
Michael Kelley
c7b5254bd8 x86/mm: Handle decryption/re-encryption of bss_decrypted consistently
sme_postprocess_startup() decrypts the bss_decrypted section when
sme_me_mask is non-zero.

mem_encrypt_free_decrypted_mem() re-encrypts the unused portion based
on CC_ATTR_MEM_ENCRYPT.

In a Hyper-V guest VM using vTOM, these conditions are not equivalent
as sme_me_mask is always zero when using vTOM. Consequently,
mem_encrypt_free_decrypted_mem() attempts to re-encrypt memory that was
never decrypted.

So check sme_me_mask in mem_encrypt_free_decrypted_mem() too.

Hyper-V guests using vTOM don't need the bss_decrypted section to be
decrypted, so skipping the decryption/re-encryption doesn't cause a
problem.

Signed-off-by: Michael Kelley <mikelley@microsoft.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://lore.kernel.org/r/1678329614-3482-5-git-send-email-mikelley@microsoft.com
2023-03-27 09:23:21 +02:00
Oleksij Rempel
f2e9d083f7 net: phy: micrel: correct KSZ9131RNX EEE capabilities and advertisement
The KSZ9131RNX incorrectly shows EEE capabilities in its registers.
Although the "EEE control and capability 1" (Register 3.20) is set to 0,
indicating no EEE support, the "EEE advertisement 1" (Register 7.60) is
set to 0x6, advertising EEE support for 1000BaseT/Full and
100BaseT/Full.
This inconsistency causes PHYlib to assume there is no EEE support,
preventing control over EEE advertisement, which is enabled by default.

This patch resolves the issue by utilizing the ksz9477_get_features()
function to correctly set the EEE capabilities for the KSZ9131RNX. This
adjustment allows proper control over EEE advertisement and ensures
accurate representation of the device's capabilities.

Fixes: 8b68710a31 ("net: phy: start using genphy_c45_ethtool_get/set_eee()")
Reported-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:15:52 +01:00
Rob Herring
41e4f807f8 bus: ti-sysc: Remove open coded "ranges" parsing
"ranges" is a standard property and we have common helper functions for
parsing it, so let's use them.

Signed-off-by: Rob Herring <robh@kernel.org>
Message-Id: <20230201220002.246907-1-robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-03-27 10:14:45 +03:00
Stefano Garzarella
b465518dc2 vsock/loopback: use only sk_buff_head.lock to protect the packet queue
pkt_list_lock was used before commit 71dc9ec9ac ("virtio/vsock:
replace virtio_vsock_pkt with sk_buff") to protect the packet queue.
After that commit we switched to sk_buff and we are using
sk_buff_head.lock in almost every place to protect the packet queue
except in vsock_loopback_work() when we call skb_queue_splice_init().

As reported by syzbot, this caused unlocked concurrent access to the
packet queue between vsock_loopback_work() and
vsock_loopback_cancel_pkt() since it is not holding pkt_list_lock.

With the introduction of sk_buff_head, pkt_list_lock is redundant and
can cause confusion, so let's remove it and use sk_buff_head.lock
everywhere to protect the packet queue access.

Fixes: 71dc9ec9ac ("virtio/vsock: replace virtio_vsock_pkt with sk_buff")
Cc: bobby.eshleman@bytedance.com
Reported-and-tested-by: syzbot+befff0a9536049e7902e@syzkaller.appspotmail.com
Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Bobby Eshleman <bobby.eshleman@bytedance.com>
Reviewed-by: Arseniy Krasnov <AVKrasnov@sberdevices.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:14:39 +01:00
David S. Miller
622035847f Merge branch 'constify-sfp-phy-nodes'
Russell King says:

====================
Constify a few sfp/phy fwnodes

This series constifies a bunch of fwnode_handle pointers that are only
used to refer to but not modify the contents of the fwnode structures.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:12:01 +01:00
Russell King (Oracle)
4a0faa02d4 net: phy: constify fwnode_get_phy_node() fwnode argument
fwnode_get_phy_node() does not motify the fwnode structure, so make
the argument const,

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:12:01 +01:00
Russell King (Oracle)
850a8d2dc7 net: sfp: constify sfp-bus internal fwnode uses
Constify sfp-bus internal fwnode uses, since we do not modify the
fwnode structures.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:12:01 +01:00
Russell King (Oracle)
a90ac762d3 net: sfp: make sfp_bus_find_fwnode() take a const fwnode
sfp_bus_find_fwnode() does not write to the fwnode, so let's make it
const.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:12:01 +01:00
Jinpeng Cui
c29313d58c ARM: omap1: remove redundant variables err
Return value directly from platform_device_register()
instead of getting value from redundant variable err.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Jinpeng Cui <cui.jinpeng2@zte.com.cn>
Message-Id: <20220830142136.299373-1-cui.jinpeng2@zte.com.cn>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-03-27 10:10:37 +03:00
Faicker Mo
e3cbdcb0fb net/net_failover: fix txq exceeding warning
The failover txq is inited as 16 queues.
when a packet is transmitted from the failover device firstly,
the failover device will select the queue which is returned from
the primary device if the primary device is UP and running.
If the primary device txq is bigger than the default 16,
it can lead to the following warning:
eth0 selects TX queue 18, but real number of TX queues is 16

The warning backtrace is:
[   32.146376] CPU: 18 PID: 9134 Comm: chronyd Tainted: G            E      6.2.8-1.el7.centos.x86_64 #1
[   32.147175] Hardware name: Red Hat KVM, BIOS 1.10.2-3.el7_4.1 04/01/2014
[   32.147730] Call Trace:
[   32.147971]  <TASK>
[   32.148183]  dump_stack_lvl+0x48/0x70
[   32.148514]  dump_stack+0x10/0x20
[   32.148820]  netdev_core_pick_tx+0xb1/0xe0
[   32.149180]  __dev_queue_xmit+0x529/0xcf0
[   32.149533]  ? __check_object_size.part.0+0x21c/0x2c0
[   32.149967]  ip_finish_output2+0x278/0x560
[   32.150327]  __ip_finish_output+0x1fe/0x2f0
[   32.150690]  ip_finish_output+0x2a/0xd0
[   32.151032]  ip_output+0x7a/0x110
[   32.151337]  ? __pfx_ip_finish_output+0x10/0x10
[   32.151733]  ip_local_out+0x5e/0x70
[   32.152054]  ip_send_skb+0x19/0x50
[   32.152366]  udp_send_skb.isra.0+0x163/0x3a0
[   32.152736]  udp_sendmsg+0xba8/0xec0
[   32.153060]  ? __folio_memcg_unlock+0x25/0x60
[   32.153445]  ? __pfx_ip_generic_getfrag+0x10/0x10
[   32.153854]  ? sock_has_perm+0x85/0xa0
[   32.154190]  inet_sendmsg+0x6d/0x80
[   32.154508]  ? inet_sendmsg+0x6d/0x80
[   32.154838]  sock_sendmsg+0x62/0x70
[   32.155152]  ____sys_sendmsg+0x134/0x290
[   32.155499]  ___sys_sendmsg+0x81/0xc0
[   32.155828]  ? _get_random_bytes.part.0+0x79/0x1a0
[   32.156240]  ? ip4_datagram_release_cb+0x5f/0x1e0
[   32.156649]  ? get_random_u16+0x69/0xf0
[   32.156989]  ? __fget_light+0xcf/0x110
[   32.157326]  __sys_sendmmsg+0xc4/0x210
[   32.157657]  ? __sys_connect+0xb7/0xe0
[   32.157995]  ? __audit_syscall_entry+0xce/0x140
[   32.158388]  ? syscall_trace_enter.isra.0+0x12c/0x1a0
[   32.158820]  __x64_sys_sendmmsg+0x24/0x30
[   32.159171]  do_syscall_64+0x38/0x90
[   32.159493]  entry_SYSCALL_64_after_hwframe+0x72/0xdc

Fix that by reducing txq number as the non-existent primary-dev does.

Fixes: cfc80d9a11 ("net: Introduce net_failover driver")
Signed-off-by: Faicker Mo <faicker.mo@ucloud.cn>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:08:57 +01:00
Juerg Haefliger
3ea0b91d9b ARM: omap1: Kconfig: Fix indentation
The convention for indentation seems to be a single tab. Help text is
further indented by an additional two whitespaces. Fix the lines that
violate these rules.

Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com>

Message-Id: <20230315091152.132443-1-juerg.haefliger@canonical.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-03-27 09:54:33 +03:00
Michael Kelley
d33ddc92db Drivers: hv: Explicitly request decrypted in vmap_pfn() calls
Update vmap_pfn() calls to explicitly request that the mapping
be for decrypted access to the memory.  There's no change in
functionality since the PFNs passed to vmap_pfn() are above the
shared_gpa_boundary, implicitly producing a decrypted mapping.
But explicitly requesting "decrypted" allows the code to work
before and after changes that cause vmap_pfn() to mask the
PFNs to being below the shared_gpa_boundary.

Signed-off-by: Michael Kelley <mikelley@microsoft.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tianyu Lan <Tianyu.Lan@microsoft.com>
Link: https://lore.kernel.org/r/1679838727-87310-4-git-send-email-mikelley@microsoft.com
2023-03-27 08:46:43 +02:00
Michael Kelley
71290be18f x86/hyperv: Reorder code to facilitate future work
Reorder some code to facilitate future work. No functional
change.

Signed-off-by: Michael Kelley <mikelley@microsoft.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tianyu Lan <Tianyu.Lan@microsoft.com>
Link: https://lore.kernel.org/r/1679838727-87310-3-git-send-email-mikelley@microsoft.com
2023-03-27 07:56:40 +02:00
Fabio Estevam
91fa45bd8f ARM: imx_v6_v7_defconfig: Select CONFIG_DRM_I2C_NXP_TDA998X
Select CONFIG_DRM_I2C_NXP_TDA998X so that HDMI output can work by
default on a imx6sx-udoo-neo board.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 13:10:10 +08:00
Marek Vasut
9320fad102 dt-bindings: soc: imx-blk-ctrl: Drop leading label in blk-ctrl in examples
Drop the leading label in block controller examples, it is unused.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:50:54 +08:00
Marek Vasut
706b511f0c dt-bindings: soc: imx8m-blk-ctrl: Rename blk_ctrl to blk-ctrl in examples
Rename blk_ctrl@ to blk-ctrl (with dash instead of underscore) in examples
so that they would match the imx8m[mn].dtsi in current Linux kernel.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:50:43 +08:00
Marek Vasut
44eeddd6bd arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM and PDK3
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK3 carrier board.
Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD,
SPI NOR, CAN, M.2 E-Key or M.2 M-Key PCIe, USB .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:48:22 +08:00
Marek Vasut
d757845451 dt-bindings: arm: Add DH electronics i.MX8M Plus DHCOM on PDK3
Add DT compatible string for DH electronics i.MX8M Plus DHCOM on PDK3
evaluation board into YAML DT binding document. This setup is a general
purpose SoM evaluation board.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:47:53 +08:00
Andreas Kemnade
f491698935 ARM: dts: imx: Add devicetree for Tolino Vison
Add a devicetree for the Tolino Vision Ebook reader. It is based
on boards marked with "37NB-E60Q30+4A3". It is equipped with an i.MX6SL
SoC.

Expected to work:
 - Buttons
 - Wifi
 - LEDs
 - uSD
 - eMMC
 - USB
 - RTC
 - Touchscreen
 - Backlight

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:44:15 +08:00
Andreas Kemnade
d37c36001e dt-bindings: arm: fsl: add compatible string for Tolino Vision
Add a compatible string for the Tolino Vision eBook reader.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:43:13 +08:00
Eric Van Hensbergen
1543b4c507
fs/9p: remove writeback fid and fix per-file modes
This patch removes the creating of an additional writeback_fid
for opened files.  The patch addresses problems when files
were opened write-only or getattr on files with dirty caches.

This patch also incorporates information about cache behavior
in the fid for every file.  This allows us to reflect cache
behavior from mount flags, open mode, and information from
the server to inform readahead and writeback behavior.

This includes adding support for a 9p semantic that qid.version==0
is used to mark a file as non-cachable which is important for
synthetic files.  This may have a side-effect of not supporting
caching on certain legacy file servers that do not properly set
qid.version.  There is also now a mount flag which can disable
the qid.version behavior.

Signed-off-by: Eric Van Hensbergen <ericvh@kernel.org>
2023-03-27 02:33:48 +00:00
Eric Van Hensbergen
6deffc8924
fs/9p: Add new mount modes
Add some additional mount modes for cache management including
specifying directio as a mount option and an option for ignore
qid.version for determining whether or not a file is cacheable.

Signed-off-by: Eric Van Hensbergen <ericvh@kernel.org>
2023-03-27 02:33:48 +00:00
Eric Van Hensbergen
46c30cb8f5
9p: Add additional debug flags and open modes
Add some additional debug flags to assist with debugging
cache changes.  Also add some additional open modes so we
can track cache state in fids more directly.

Signed-off-by: Eric Van Hensbergen <ericvh@kernel.org>
2023-03-27 02:33:48 +00:00
Eric Van Hensbergen
8142db4f27
fs/9p: allow disable of xattr support on mount
xattr creates a lot of additional messages for 9p in
the current implementation.  This allows users to
conditionalize xattr support on 9p mount if they
are on a connection with bad latency.  Using this
flag is also useful when debugging other aspects
of 9p as it reduces the noise in the trace files.

Signed-off-by: Eric Van Hensbergen <ericvh@kernel.org>
Reviewed-by: Dominique Martinet <asmadeus@codewreck.org>
2023-03-27 02:33:48 +00:00
Eric Van Hensbergen
740b8bf873
fs/9p: Remove unnecessary superblock flags
These flags just add unnecessary extra operations.
When 9p is run without cache, it inherently implements
these options so we don't need them in the superblock
(which ends up sending extraneous fsyncs, etc.).  User
can still request these options on mount, but we don't
need to set them as default.

Signed-off-by: Eric Van Hensbergen <ericvh@kernel.org>
2023-03-27 02:33:47 +00:00
Eric Van Hensbergen
d9bc0d11e3
fs/9p: Consolidate file operations and add readahead and writeback
We had 3 different sets of file operations across 2 different protocol
variants differentiated by cache which really only changed 3
functions.  But the real problem is that certain file modes, mount
options, and other factors weren't being considered when we
decided whether or not to use caches.

This consolidates all the operations and switches
to conditionals within a common set to decide whether or not
to do different aspects of caching.

Signed-off-by: Eric Van Hensbergen <ericvh@kernel.org>
Reviewed-by: Dominique Martinet <asmadeus@codewreck.org>
2023-03-27 02:33:39 +00:00
Michal Vokáč
7da4734751 ARM: dts: imx6dl-yapp43: Add support for new HW revision of the IOTA board
The PCB used for all the current boards (Ursa, Draco, Hydra, Orion, Crux)
was slightly redesigned and delivers some new features while some unused
components were removed.

- External RTC chip with supercap added.
- Secure element added.
- LCD display power supply enable/disable signal added.
- Touch keyboard reset and interrupt signals added.
- Factory reset GPIO button added.
- Audio codec LM49350 (EoL) removed and replaced by PWM audio output.
- QCA8334 switch was replaced by Marvell 88E6141.
- PCIe completely removed.
- uSD card removed and replaced by board-to-board expansion connector.

There are four configuration variants of the new board:

1. Pegasus
The board configuration is based on Orion with the following major changes:

- Quad core SoC
- 4GB of RAM
- RTC with supercap added
- Secure element added

2. Pegasus+
This is the very same board as Pegasus but uses the i.MX6QuadPlus SoC.

3. Lynx
The board configuration is based on Draco with the following major changes:

- DualLite SoC
- 1GB of RAM
- RTC with supercap added
- Secure element added

4. Phoenix
The board configuration is based on Ursa with the following major changes:

- DualLite Soc
- 1GB of RAM
- RTC with supercap added
- Secure element added
- LCD display support removed
- UART2 removed
- Factory reset GPIO button added

Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:26:47 +08:00
Michal Vokáč
0593e164bb ARM: dts: imx6dl-yapp4: Remove unneeded status "okay"
Explicit status = "okay" is not needed as it is the default.

Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:26:45 +08:00
Michal Vokáč
f87c9b04c6 ARM: dts: imx6dl-yapp4: Move status to the end of property list
The status property should always be last in the list.

Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:26:41 +08:00
Michal Vokáč
7da7b84fee ARM: dts: imx6dl-yapp4: Move phy reset into switch node
Drop the phy-reset-duration and phy-reset-gpios deprecated properties and
move reset-gpios under the switch node.

Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:26:29 +08:00
Michal Vokáč
5c984deeda dt-bindings: arm: fsl: Add Y Soft IOTA Phoenix, Lynx, Pegasus and Pegasus+
These i.MX6 boards are based on a facelifted PCB from the previous designs.
Routing for some unused parts was completely removed (uSD card, PCIe, audio
codec) and some new parts were added (supercap backed RTC, secure element,
PWM audio, GPIO button).

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:25:34 +08:00
Philippe Schenker
1fe5ea7cc2 arm64: dts: colibri-imx8x: Add iris v2 carrier board
Add the Toradex Iris V2 Carrier Board for Colibri iMX8X, small form-factor
production ready board.

Additional details available at:
https://www.toradex.com/products/carrier-boards/iris-carrier-board

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:10:51 +08:00
Philippe Schenker
aefb5e2d97 arm64: dts: colibri-imx8x: Add iris carrier board
Add the Toradex Iris Carrier Board for Colibri iMX8X, small form-factor
production ready board.

Additional details available at:
https://www.toradex.com/products/carrier-boards/iris-carrier-board

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:10:49 +08:00
Philippe Schenker
144f67f68a arm64: dts: colibri-imx8x: Add aster carrier board
Add the Toradex Aster Carrier Board for Colibri iMX8X, small form-factor
with header compatible with Arduino Uno and Raspberry Pi (RPi) maker
boards.

Additional details available at:
https://www.toradex.com/products/carrier-boards/aster-carrier-board

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:10:46 +08:00
Philippe Schenker
f018dfb311 arm64: dts: colibri-imx8x: Add todo comments
Highlight what is still missing.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:10:44 +08:00
Philippe Schenker
cc900d0ffc arm64: dts: colibri-imx8x: Move gpio-keys to som level
SODIMM_45 that is connected to "&lsio_gpio3 10" is defined in the
Colibri standard to be a wakeup pin.
Move this to the SoM level device-tree and keep it disabled by default
but do enable it again on the carrier-board.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:10:41 +08:00
Philippe Schenker
e2c7fa7246 arm64: dts: colibri-imx8x: Set thermal thresholds
Set critical/alert thermal thresholds for all relevant SOC
temperature trips to the IT value (max T_junction 105 degree
Celsius) in accordance with the IT grade of the SOM.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:10:39 +08:00