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Author SHA1 Message Date
Joshua Rogers
d4b69a6186 SUNRPC: svcauth_gss: avoid NULL deref on zero length gss_token in gss_read_proxy_verf
A zero length gss_token results in pages == 0 and in_token->pages[0]
is NULL. The code unconditionally evaluates
page_address(in_token->pages[0]) for the initial memcpy, which can
dereference NULL even when the copy length is 0. Guard the first
memcpy so it only runs when length > 0.

Fixes: 5866efa8cb ("SUNRPC: Fix svcauth_gss_proxy_init()")
Cc: stable@vger.kernel.org
Signed-off-by: Joshua Rogers <linux@joshua.hu>
Signed-off-by: Chuck Lever <chuck.lever@oracle.com>
2025-12-08 10:51:26 -05:00
Dongli Zhang
2976313883 KVM: nVMX: Immediately refresh APICv controls as needed on nested VM-Exit
If an APICv status updated was pended while L2 was active, immediately
refresh vmcs01's controls instead of pending KVM_REQ_APICV_UPDATE as
kvm_vcpu_update_apicv() only calls into vendor code if a change is
necessary.

E.g. if APICv is inhibited, and then activated while L2 is running:

  kvm_vcpu_update_apicv()
  |
  -> __kvm_vcpu_update_apicv()
     |
     -> apic->apicv_active = true
      |
      -> vmx_refresh_apicv_exec_ctrl()
         |
         -> vmx->nested.update_vmcs01_apicv_status = true
          |
          -> return

Then L2 exits to L1:

  __nested_vmx_vmexit()
  |
  -> kvm_make_request(KVM_REQ_APICV_UPDATE)

  vcpu_enter_guest(): KVM_REQ_APICV_UPDATE
  -> kvm_vcpu_update_apicv()
     |
     -> __kvm_vcpu_update_apicv()
        |
        -> return // because if (apic->apicv_active == activate)

Reported-by: Chao Gao <chao.gao@intel.com>
Closes: https://lore.kernel.org/all/aQ2jmnN8wUYVEawF@intel.com
Fixes: 7c69661e22 ("KVM: nVMX: Defer APICv updates while L2 is active until L1 is active")
Cc: stable@vger.kernel.org
Signed-off-by: Dongli Zhang <dongli.zhang@oracle.com>
[sean: write changelog]
Link: https://patch.msgid.link/20251205231913.441872-3-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-12-08 06:56:29 -08:00
Dongli Zhang
b2849bec93 KVM: VMX: Update SVI during runtime APICv activation
The APICv (apic->apicv_active) can be activated or deactivated at runtime,
for instance, because of APICv inhibit reasons. Intel VMX employs different
mechanisms to virtualize LAPIC based on whether APICv is active.

When APICv is activated at runtime, GUEST_INTR_STATUS is used to configure
and report the current pending IRR and ISR states. Unless a specific vector
is explicitly included in EOI_EXIT_BITMAP, its EOI will not be trapped to
KVM. Intel VMX automatically clears the corresponding ISR bit based on the
GUEST_INTR_STATUS.SVI field.

When APICv is deactivated at runtime, the VM_ENTRY_INTR_INFO_FIELD is used
to specify the next interrupt vector to invoke upon VM-entry. The
VMX IDT_VECTORING_INFO_FIELD is used to report un-invoked vectors on
VM-exit. EOIs are always trapped to KVM, so the software can manually clear
pending ISR bits.

There are scenarios where, with APICv activated at runtime, a guest-issued
EOI may not be able to clear the pending ISR bit.

Taking vector 236 as an example, here is one scenario.

1. Suppose APICv is inactive. Vector 236 is pending in the IRR.
2. To handle KVM_REQ_EVENT, KVM moves vector 236 from the IRR to the ISR,
and configures the VM_ENTRY_INTR_INFO_FIELD via vmx_inject_irq().
3. After VM-entry, vector 236 is invoked through the guest IDT. At this
point, the data in VM_ENTRY_INTR_INFO_FIELD is no longer valid. The guest
interrupt handler for vector 236 is invoked.
4. Suppose a VM exit occurs very early in the guest interrupt handler,
before the EOI is issued.
5. Nothing is reported through the IDT_VECTORING_INFO_FIELD because
vector 236 has already been invoked in the guest.
6. Now, suppose APICv is activated. Before the next VM-entry, KVM calls
kvm_vcpu_update_apicv() to activate APICv.
7. Unfortunately, GUEST_INTR_STATUS.SVI is not configured, although
vector 236 is still pending in the ISR.
8. After VM-entry, the guest finally issues the EOI for vector 236.
However, because SVI is not configured, vector 236 is not cleared.
9. ISR is stalled forever on vector 236.

Here is another scenario.

1. Suppose APICv is inactive. Vector 236 is pending in the IRR.
2. To handle KVM_REQ_EVENT, KVM moves vector 236 from the IRR to the ISR,
and configures the VM_ENTRY_INTR_INFO_FIELD via vmx_inject_irq().
3. VM-exit occurs immediately after the next VM-entry. The vector 236 is
not invoked through the guest IDT. Instead, it is saved to the
IDT_VECTORING_INFO_FIELD during the VM-exit.
4. KVM calls kvm_queue_interrupt() to re-queue the un-invoked vector 236
into vcpu->arch.interrupt. A KVM_REQ_EVENT is requested.
5. Now, suppose APICv is activated. Before the next VM-entry, KVM calls
kvm_vcpu_update_apicv() to activate APICv.
6. Although APICv is now active, KVM still uses the legacy
VM_ENTRY_INTR_INFO_FIELD to re-inject vector 236. GUEST_INTR_STATUS.SVI is
not configured.
7. After the next VM-entry, vector 236 is invoked through the guest IDT.
Finally, an EOI occurs. However, due to the lack of GUEST_INTR_STATUS.SVI
configuration, vector 236 is not cleared from the ISR.
8. ISR is stalled forever on vector 236.

Using QEMU as an example, vector 236 is stuck in ISR forever.

(qemu) info lapic 1
dumping local APIC state for CPU 1

LVT0	 0x00010700 active-hi edge  masked                      ExtINT (vec 0)
LVT1	 0x00010400 active-hi edge  masked                      NMI
LVTPC	 0x00000400 active-hi edge                              NMI
LVTERR	 0x000000fe active-hi edge                              Fixed  (vec 254)
LVTTHMR	 0x00010000 active-hi edge  masked                      Fixed  (vec 0)
LVTT	 0x000400ec active-hi edge                 tsc-deadline Fixed  (vec 236)
Timer	 DCR=0x0 (divide by 2) initial_count = 0 current_count = 0
SPIV	 0x000001ff APIC enabled, focus=off, spurious vec 255
ICR	 0x000000fd physical edge de-assert no-shorthand
ICR2	 0x00000000 cpu 0 (X2APIC ID)
ESR	 0x00000000
ISR	 236
IRR	 37(level) 236

The issue isn't applicable to AMD SVM as KVM simply writes vmcb01 directly
irrespective of whether L1 (vmcs01) or L2 (vmcb02) is active (unlike VMX,
there is no need/cost to switch between VMCBs).  In addition,
APICV_INHIBIT_REASON_IRQWIN ensures AMD SVM AVIC is not activated until
the last interrupt is EOI'd.

Fix the bug by configuring Intel VMX GUEST_INTR_STATUS.SVI if APICv is
activated at runtime.

Signed-off-by: Dongli Zhang <dongli.zhang@oracle.com>
Reviewed-by: Chao Gao <chao.gao@intel.com>
Link: https://patch.msgid.link/20251110063212.34902-1-dongli.zhang@oracle.com
[sean: call out that SVM writes vmcb01 directly, tweak comment]
Link: https://patch.msgid.link/20251205231913.441872-2-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-12-08 06:56:29 -08:00
Heiko Carstens
70075e3d0c s390/bug: Add missing alignment
All objects are supposed to have a minimal alignment of two, since a
couple of instructions only work with even addresses. Add the missing
align statement for the file string.

Fixes: 6584ff203a ("bugs/s390: Use 'cond_str' in __EMIT_BUG()")
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2025-12-08 15:42:41 +01:00
Heiko Carstens
1a82d430c5 s390/bug: Add missing CONFIG_BUG ifdef again
Fallback to generic BUG implementation in case CONFIG_BUG is disabled.
This restores the old behaviour before 'cond_str' support was added.

It probably doesn't matter, since nobody should disable CONFIG_BUG, but at
least this is consistent to before.

Fixes: 6584ff203a ("bugs/s390: Use 'cond_str' in __EMIT_BUG()")
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2025-12-08 15:42:36 +01:00
Andres J Rosa
9a97857db0 ALSA: uapi: Fix typo in asound.h comment
Fix 'level-shit' to 'level-shift' in struct snd_cea_861_aud_if comment.

Fixes: 7ba1c40b53 ("ALSA: Add definitions for CEA-861 Audio InfoFrames")
Signed-off-by: Andres J Rosa <andyrosa@gmail.com>
Link: https://patch.msgid.link/20251203162509.1822-1-andyrosa@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2025-12-08 15:27:48 +01:00
Claudio Imbrenda
2f393c228c KVM: s390: Fix gmap_helper_zap_one_page() again
A few checks were missing in gmap_helper_zap_one_page(), which can lead
to memory corruption in the guest under specific circumstances.

Add the missing checks.

Fixes: 5deafa27d9 ("KVM: s390: Fix to clear PTE when discarding a swapped page")
Cc: stable@vger.kernel.org
Reported-by: Marc Hartmayer <mhartmay@linux.ibm.com>
Tested-by: Marc Hartmayer <mhartmay@linux.ibm.com>
Acked-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2025-12-08 13:06:14 +01:00
Luca Weiss
d202341d9b i2c: qcom-cci: Add msm8953 compatible
Add a config for the v1.2.5 CCI found on msm8953 which has different
values in .params compared to others already supported in the driver.

Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
2025-12-08 20:21:31 +09:00
Wolfram Sang
f60d68e697 i2c-host for v6.19
- general cleanups in bcm2835, designware, pcf8584, and stm32
 - amd-mp2: fix device refcount
 - designware: avoid interrupt storms caused by bad firmware
 - i801: fix supported features
 - spacemit: fix device detection failures
 
 New device support:
 - Intel Diamond Rapids
 - Rockchip RK3506
 - Qualcomm Kaanapali, MSM8953
 -----BEGIN PGP SIGNATURE-----
 
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 blvYAQDC7K6YNgpL0F+aH237Q3JtepvtqExSCNXvhMzKhKXfsgD/TVmK2HHBrX93
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Merge tag 'i2c-host-6.19-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow

i2c-host for v6.19

- general cleanups in bcm2835, designware, pcf8584, and stm32
- amd-mp2: fix device refcount
- designware: avoid interrupt storms caused by bad firmware
- i801: fix supported features
- spacemit: fix device detection failures

New device support:
- Intel Diamond Rapids
- Rockchip RK3506
- Qualcomm Kaanapali, MSM8953
2025-12-08 20:01:14 +09:00
Huacai Chen
be77cf43d2 LoongArch: Adjust default config files for 32BIT/64BIT
Add loongson32_defconfig (for 32BIT) and rename loongson3_defconfig to
loongson64_defconfig (for 64BIT).

Also adjust graphics drivers, such as FB_EFI is replaced with EFIDRM.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-12-08 18:09:17 +08:00
Huacai Chen
4cd09f356e LoongArch: Adjust VDSO/VSYSCALL for 32BIT/64BIT
Adjust VDSO/VSYSCALL because read_cpu_id() for 32BIT/64BIT are
different, and LoongArch32 doesn't support GENERIC_GETTIMEOFDAY now
(will be supported in future).

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-12-08 18:09:17 +08:00
Huacai Chen
b15dfdacd9 LoongArch: Adjust misc routines for 32BIT/64BIT
Adjust misc routines for both 32BIT and 64BIT, including: bitops, bswap,
checksum, string, jump label, unaligned access emulator, suspend/wakeup
routines, etc.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-12-08 18:09:17 +08:00
Huacai Chen
48c7294775 LoongArch: Adjust user accessors for 32BIT/64BIT
Adjust user accessors for both 32BIT and 64BIT, including: get_user(),
put_user(), copy_user(), clear_user(), etc.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-12-08 18:09:17 +08:00
Huacai Chen
14338e631a LoongArch: Adjust system call for 32BIT/64BIT
Adjust system call for both 32BIT and 64BIT, including: add the uapi
unistd_{32,64}.h and syscall_table_{32,64}.h inclusion, add sys_mmap2()
definition, change the system call entry routines, etc.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-12-08 18:09:17 +08:00
Huacai Chen
3f63ac8d28 LoongArch: Adjust module loader for 32BIT/64BIT
Adjust module loader for both 32BIT and 64BIT, including: change the s64
type to long, change the u64 type to unsigned long, change the plt entry
definition and handling, etc.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-12-08 18:09:17 +08:00
Huacai Chen
ced7814d3a LoongArch: Adjust time routines for 32BIT/64BIT
Adjust time routines for both 32BIT and 64BIT, including: rdtime_h() /
rdtime_l() definitions for 32BIT and rdtime_d() definition for 64BIT,
get_cycles() and get_cycles64() definitions for 32BIT/64BIT, show time
frequency info ("CPU MHz" and "BogoMIPS") in /proc/cpuinfo, etc.

Use do_div() for division which works on both 32BIT and 64BIT platforms.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-12-08 18:09:17 +08:00
Huacai Chen
4ad04e7c7e LoongArch: Adjust process management for 32BIT/64BIT
Adjust process management for both 32BIT and 64BIT, including: CPU
context switching, FPU loading/restoring, process dumping and process
tracing routines.

Q: Why modify switch.S?
A: LoongArch32 has no ldptr.d/stptr.d instructions, and asm offsets of
   thead_struct members are too large to be filled in the 12b immediate
   field of ld.w/st.w.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-12-08 18:09:17 +08:00
Huacai Chen
dd55dd0d7e LoongArch: Adjust memory management for 32BIT/64BIT
Adjust memory management for both 32BIT and 64BIT, including: address
space definition, DMW CSR definition, page table bits definition, boot
time detection of VA/PA bits, page table init, tlb exception handling,
copy_page/clear_page/dump_tlb libraries, etc.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Yawei Li <liyawei@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-12-08 18:09:17 +08:00
Huacai Chen
7b2afeafaf LoongArch: Adjust boot & setup for 32BIT/64BIT
Adjust boot & setup for both 32BIT and 64BIT, including: efi header
definition, MAX_IO_PICS definition, kernel entry and environment setup
routines, etc.

Add a fallback path in fdt_cpu_clk_init() to avoid 0MHz in /proc/cpuinfo
if there is no valid clock freq from firmware.

Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-12-08 18:09:17 +08:00
Hans de Goede
31b931bebd dma-mapping: Fix DMA_BIT_MASK() macro being broken
After commit a50f7456f8 ("dma-mapping: Allow use of DMA_BIT_MASK(64) in
global scope"), the DMA_BIT_MASK() macro is broken when passed non trivial
statements for the value of 'n'. This is caused by the new version missing
parenthesis around 'n' when evaluating 'n'.

One example of this breakage is the IPU6 driver now crashing due to
it getting DMA-addresses with address bit 32 set even though it has
tried to set a 32 bit DMA mask.

The IPU6 CSI2 engine has a DMA mask of either 31 or 32 bits depending
on if it is in secure mode or not and it sets this masks like this:

        mmu_info->aperture_end =
                (dma_addr_t)DMA_BIT_MASK(isp->secure_mode ?
                                         IPU6_MMU_ADDR_BITS :
                                         IPU6_MMU_ADDR_BITS_NON_SECURE);

So the 'n' argument here is "isp->secure_mode ? IPU6_MMU_ADDR_BITS :
IPU6_MMU_ADDR_BITS_NON_SECURE" which gets expanded into:

isp->secure_mode ? IPU6_MMU_ADDR_BITS : IPU6_MMU_ADDR_BITS_NON_SECURE - 1

With the -1 only being applied in the non secure case, causing
the secure mode mask to be one 1 bit too large.

Fixes: a50f7456f8 ("dma-mapping: Allow use of DMA_BIT_MASK(64) in global scope")
Cc: Sakari Ailus <sakari.ailus@linux.intel.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Hans de Goede <johannes.goede@oss.qualcomm.com>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20251207184756.97904-1-johannes.goede@oss.qualcomm.com
2025-12-08 09:40:57 +01:00
Dave Kleikamp
463d439bec dma/pool: eliminate alloc_pages warning in atomic_pool_expand
atomic_pool_expand iteratively tries the allocation while decrementing
the page order. There is no need to issue a warning if an attempted
allocation fails.

Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Fixes: d7e673ec2c ("dma-pool: Only allocate from CMA when in same memory zone")
[mszyprow: fixed typo]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20251202152810.142370-1-dave.kleikamp@oracle.com
2025-12-08 09:40:57 +01:00
Bard Liao
188d194be2 soundwire: intel_ace2x: handle multi BPT sections
Calculate required PDI buffer and pass the section number to the cdns
BPT helpers.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Tested-by: Shuming Fan <shumingf@realtek.com>
Link: https://patch.msgid.link/20251021094355.132943-4-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:27 +05:30
Bard Liao
fe8a9cf75c soundwire: pass sdw_bpt_section to cdns BPT helpers
We can get start_register, data_size, and buffer data from the new
sdw_bpt_section parameter. Also, handle all register sections in the
cdns BRA helpers. No function changes as section number is 1.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Tested-by: Shuming Fan <shumingf@realtek.com>
Link: https://patch.msgid.link/20251021094355.132943-3-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:27 +05:30
Bard Liao
fdfa1960ee soundwire: introduce BPT section
Currently we send a BRA message with a start address with continuous
registers in a BPT stream. However, a codec may need to write different
register sections shortly. Introduce a register section in struct
sdw_btp_msg which contain register start address, length, and buffer.
This commit uses only 1 section for each BPT message. And we need to add
up all BPT section length and check if it reach maximum BPT bytes.
No function changes.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Tested-by: Shuming Fan <shumingf@realtek.com>
Link: https://patch.msgid.link/20251021094355.132943-2-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:27 +05:30
Bard Liao
8931f5bce4 soundwire: intel_ace2x: add fake frame to BRA read command
Intel DMA buffer size need to be a multiple of data block size.
Find the minimal fake data size and extra buffer size to meet the
requirement.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://patch.msgid.link/20251030070253.1216871-8-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Bard Liao
9468bc0e1b soundwire: cadence_master: add fake_size parameter to sdw_cdns_prepare_read_dma_buffer
We may need to add few fake frames to fit the aligned read dma buffer
size. Add a fake_size parameter to allow the caller to set the fake data
size.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://patch.msgid.link/20251014031450.3781789-7-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Bard Liao
167efc6dfd ASoC: SOF: Intel: export hda_sdw_bpt_get_buf_size_aligment
The dma buffer need to be a multiple of data block size and
the fifo size. Export a function to return the LCM of data
block size and the fifo size.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://patch.msgid.link/20251014031450.3781789-6-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Bard Liao
57b3a7b27e soundwire: cadence: export sdw_cdns_bpt_find_bandwidth
Currently, we calculate the required bandwidth after the PDI buffer size
is calculated. However as we need to add some fake frame to align the
data block size, the final PDI size and the frame number will change.
Besides, we need the required bandwidth to decide the DMA channel number
and the channel number will be used to calculate the data block size.
Therefore, we calculate the required bandwidth and export a helper for
the caller to get the required bandwidth.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://patch.msgid.link/20251014031450.3781789-5-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Bard Liao
5a838e010c soundwire: cadence_master: set data_per_frame as frame capability
data_per_frame will be used for preparing the TX buffer and we may add
some fake frames to ensure the data in the buffer will be flushed.
So that it should indicate the frame capability even if the required
data bytes are less than the frame capability.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://patch.msgid.link/20251014031450.3781789-4-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Bard Liao
43b2a39183 soundwire: only compute BPT stream in sdw_compute_dp0_port_params
DP0 is only for BPT stream. We should not compute and update the port
params of the normal audio streams.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://patch.msgid.link/20251014031450.3781789-3-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Bard Liao
4be4ac36f6 soundwire: cadence_master: make frame index trace more readable
The existing code uses i as the frame index which is 0 based. And
"bad frame %d/%d", i, num_frames where num_frames is 1 based. Change the
frame index to i + 1 to align with num_frames and more readable.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://patch.msgid.link/20251014031450.3781789-2-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Srinivas Kandagatla
b2bfe0fa1f soundwire: qcom: adding support for v3.1.0
Add support for controller version v3.1.0, which has changes in
register layout and some register fields compared to v2.0.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Tested-by: Alexey Klimov <alexey.klimov@linaro.org> # sm8550
Link: https://patch.msgid.link/20250912083225.228778-8-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Srinivas Kandagatla
66eca4b7d2 dt-bindings: soundwire: qcom: Document v3.1.0 version of IP block
Add bindings for Soundwire controllers v3.1.0, which is available on
Qualcomm Glymur SoC.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Alexey Klimov <alexey.klimov@linaro.org> # sm8550
Link: https://patch.msgid.link/20250912083225.228778-7-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Srinivas Kandagatla
6ed85ea1b1 soundwire: qcom: prepare for v3.x
cleanup the register layout structs to prepare for adding new 3.x
controller support.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Tested-by: Alexey Klimov <alexey.klimov@linaro.org> # sm8550
Link: https://patch.msgid.link/20250912083225.228778-6-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Srinivas Kandagatla
9e53a66a2f soundwire: qcom: deprecate qcom,din/out-ports
Number of input and output ports can be dynamically read from the
controller registers, getting this value from Device Tree is redundant
and potentially lead to bugs.

Remove the code parsing this property along with marking this as
deprecated in device tree bindings.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Tested-by: Alexey Klimov <alexey.klimov@linaro.org> # sm8550
Link: https://patch.msgid.link/20250912083225.228778-5-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Srinivas Kandagatla
8114a05cdc dt-bindings: soundwire: qcom: deprecate qcom,din/out-ports
Number of input and output ports can be dynamically read from the
controller registers, getting this value from Device Tree is redundant
and potentially lead to bugs.

Mark these two properties as deprecated in device tree bindings.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Alexey Klimov <alexey.klimov@linaro.org> # sm8550
Link: https://patch.msgid.link/20250912083225.228778-4-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Srinivas Kandagatla
6504fe8cd2 soundwire: qcom: remove unused rd_fifo_depth
remove read fifo depth field parsing logic, as rd_fifo_depth is never
used in the driver. Cleaning this up would benefit when adding new
variant support which includes adding variant fields for rd_fifo_depth.

ex: Glymur has this rd_fifo_depth register fields changed from v2.x

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Alexey Klimov <alexey.klimov@linaro.org> # sm8550
Link: https://patch.msgid.link/20250912083225.228778-3-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Srinivas Kandagatla
18223eecec of: base: Add of_property_read_u8_index
Add support for of_property_read_u8_index(), simillar to others
u16 and u32 variants. Having this helper makes the code more tidy in
isome cases, specially when we are parsing multiple of these into
data structures.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Tested-by: Alexey Klimov <alexey.klimov@linaro.org> # sm8550
Link: https://patch.msgid.link/20250912083225.228778-2-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-12-08 12:37:26 +05:30
Askar Safin
2d967310c4 gpiolib: acpi: Add quirk for Dell Precision 7780
Dell Precision 7780 often wakes up on its own from suspend. Sometimes
wake up happens immediately (i. e. within 7 seconds), sometimes it happens
after, say, 30 minutes.

Fixes: 1796f808e4 ("HID: i2c-hid: acpi: Stop setting wakeup_capable")
Link: https://lore.kernel.org/linux-i2c/197ae95ffd8.dc819e60457077.7692120488609091556@zohomail.com/
Cc: stable@vger.kernel.org
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Askar Safin <safinaskar@gmail.com>
Link: https://lore.kernel.org/r/20251206180414.3183334-2-safinaskar@gmail.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2025-12-08 05:45:56 +01:00
Frank Li
eaa0870387 i3c: master: switch to use new callback .i3c_xfers() from .priv_xfers()
Switch to use the new .i3c_xfers() callback, which supports all I3C
transfer modes (SDR and HDR). Also replace struct i3c_priv_xfer with the
new struct i3c_xfer, as i3c_priv_xfer is now an alias of i3c_xfer.

No functional changes.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Tested-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Link: https://patch.msgid.link/20251203-i3c_xfer_cleanup_master-v2-1-7dd94d04ee2d@nxp.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-12-08 03:34:17 +01:00
Linus Torvalds
c2f2b01b74 I3C for 6.19
Subsystem:
  - Add HDR transfer support
 
 Drivers:
  - dw: fix bus hang on Agilex5
  - mipi-i3c-hci: Intel Nova Lake-S support, IOMMU support
  - svc: HDR support
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Merge tag 'i3c/for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux

Pull i3c updates from Alexandre Belloni:
 "HDR support has finally been added. mipi-i3c-hci has been reworked and
  Intel Nova Lake-S support has been added.

  Subsystem:
   - Add HDR transfer support

  Drivers:
   - dw: fix bus hang on Agilex5
   - mipi-i3c-hci: Intel Nova Lake-S support, IOMMU support
   - svc: HDR support"

* tag 'i3c/for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux: (28 commits)
  regmap: i3c: switch to use i3c_xfer from i3c_priv_xfer
  net: mctp i3c: switch to use i3c_xfer from i3c_priv_xfer
  hwmon: (lm75): switch to use i3c_xfer from i3c_priv_xfer
  i3c: document i3c_xfers
  i3c: fix I3C_SDR bit number
  i3c: master: svc: Add basic HDR mode support
  i3c: master: svc: Replace bool rnw with union for HDR support
  i3c: Switch to use new i3c_xfer from i3c_priv_xfer
  i3c: Add HDR API support
  i3c: master: add WQ_PERCPU to alloc_workqueue users
  i3c: master: Remove i3c_device_free_ibi from i3c_device_remove
  i3c: mipi-i3c-hci-pci: Set d3cold_delay to 0 for Intel controllers
  i3c: mipi-i3c-hci-pci: Add LTR support for Intel controllers
  i3c: mipi-i3c-hci-pci: Add exit callback
  i3c: mipi-i3c-hci-pci: Change callback parameter
  i3c: mipi-i3c-hci-pci: Allocate a structure for mipi_i3c_hci_pci device information
  i3c: mipi-i3c-hci-pci: Factor out intel_reset()
  i3c: mipi-i3c-hci-pci: Factor out private registers ioremapping
  i3c: mipi-i3c-hci-pci: Constify driver data
  i3c: mipi-i3c-hci-pci: Use readl_poll_timeout()
  ...
2025-12-08 11:25:14 +09:00
Troy Mitchell
25faa53646
i2c: spacemit: fix detect issue
This commit addresses two issues causing i2c detect to fail.

The identified issues are:

1. Incorrect error handling for BED (Bus Error No ACK/NAK):
   Before this commit, Both ALD (Arbitration Loss Detected) and
   BED returned -EAGAIN.
2. Missing interrupt status clear after initialization in xfer():
   On the K1 SoC, simply fixing the first issue changed the error
   from -EAGAIN to -ETIMEOUT. Through tracing, it was determined that
   this is likely due to MSD (Master Stop Detected) latency issues.

   That means the MSD bit in the ISR may still be set on the next transfer.
   As a result, the controller won't work — we can see from the scope that
   it doesn't issue any signal.
   (This only occurs during rapid consecutive I2C transfers.
   That explains why the issue only shows up with i2cdetect.)

With these two fixes, i2c device detection now functions correctly on the K1 SoC.

Fixes: 5ea558473f ("i2c: spacemit: add support for SpacemiT K1 SoC")
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Tested-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20251113-fix-k1-detect-failure-v2-1-b02a9a74f65a@linux.spacemit.com
2025-12-08 03:11:57 +01:00
Ma Ke
a6ee6aac66
i2c: amd-mp2: fix reference leak in MP2 PCI device
In i2c_amd_probe(), amd_mp2_find_device() utilizes
driver_find_next_device() which internally calls driver_find_device()
to locate the matching device. driver_find_device() increments the
reference count of the found device by calling get_device(), but
amd_mp2_find_device() fails to call put_device() to decrement the
reference count before returning. This results in a reference count
leak of the PCI device each time i2c_amd_probe() is executed, which
may prevent the device from being properly released and cause a memory
leak.

Found by code review.

Cc: stable@vger.kernel.org
Fixes: 529766e0a0 ("i2c: Add drivers for the AMD PCIe MP2 I2C controller")
Signed-off-by: Ma Ke <make24@iscas.ac.cn>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20251022095402.8846-1-make24@iscas.ac.cn
2025-12-08 03:11:27 +01:00
Linus Torvalds
ba65a4e712 This pull request is entirely SoC clk drivers, not for lack of trying to modify
the core clk framework. The majority diff wise is for the new Rockchip and
 Qualcomm clk drivers which is mostly lines and lines of data structures to
 describe the clk hardware in these SoCs. Beyond those two, Renesas continues to
 incrementally add clks to their SoC drivers, causing them to show up higher in
 the diffstat this time because they added quite a few clks all over the place.
 Overall it is a semi-quiet release that has some new clk drivers and the usual
 fixes for clock data that was wrong or missing and non-critical cleanups that
 plug error paths or fix typos.
 
 New Drivers:
  - Qualcomm IPQ5424 Network Subsystem Clock Controller
  - Qualcomm SM8750 Video Clock Controller
  - Rockchip RV1126B and RK3506 clock drivers
  - i.MX8ULP SIM LPAV clock driver
  - Samsung ACPM (firmware interface) clock driver
  - Altera Agilex5 clock driver
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This is entirely SoC clk drivers.

  The majority diff wise is for the new Rockchip and Qualcomm clk
  drivers which is mostly lines and lines of data structures to describe
  the clk hardware in these SoCs. Beyond those two, Renesas continues to
  incrementally add clks to their SoC drivers, causing them to show up
  higher in the diffstat this time because they added quite a few clks
  all over the place.

  Overall it is a semi-quiet release that has some new clk drivers and
  the usual fixes for clock data that was wrong or missing and
  non-critical cleanups that plug error paths or fix typos.

  New Drivers:
   - Qualcomm IPQ5424 Network Subsystem Clock Controller
   - Qualcomm SM8750 Video Clock Controller
   - Rockchip RV1126B and RK3506 clock drivers
   - i.MX8ULP SIM LPAV clock driver
   - Samsung ACPM (firmware interface) clock driver
   - Altera Agilex5 clock driver"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (117 commits)
  clk: keystone: fix compile testing
  clk: keystone: syscon-clk: fix regmap leak on probe failure
  clk: qcom: Mark camcc_sm7150_hws static
  clk: samsung: exynos-clkout: Assign .num before accessing .hws
  clk: rockchip: Add clock and reset driver for RK3506
  dt-bindings: clock: rockchip: Add RK3506 clock and reset unit
  clk: actions: Fix discarding const qualifier by 'container_of' macro
  clk: spacemit: Set clk_hw_onecell_data::num before using flex array
  clk: visconti: Add VIIF clocks
  dt-bindings: clock: tmpv770x: Add VIIF clocks
  dt-bindings: clock: tmpv770x: Remove definition of number of clocks
  clk: visconti: Do not define number of clocks in bindings
  clk: rockchip: Add clock controller for the RV1126B
  dt-bindings: clock, reset: Add support for rv1126b
  clk: rockchip: Implement rockchip_clk_register_armclk_multi_pll()
  clk: qcom: x1e80100-dispcc: Add USB4 router link resets
  dt-bindings: clock: qcom: x1e80100-dispcc: Add USB4 router link resets
  clk: qcom: videocc-sm8750: Add video clock controller driver for SM8750
  dt-bindings: clock: qcom: Add SM8750 video clock controller
  clk: qcom: branch: Extend invert logic for branch2 mem clocks
  ...
2025-12-08 09:38:52 +09:00
Kathara Sasikumar
08bfcf4ff9 docs: hwmon: fix link to g762 devicetree binding
The devicetree binding for g762 was converted to YAML to match vendor
prefix conventions. Update the reference accordingly.

Signed-off-by: Kathara Sasikumar <katharasasikumar007@gmail.com>
Link: https://lore.kernel.org/r/20251205215835.783273-1-katharasasikumar007@gmail.com
Fixes: 3d8e253724 ("dt-bindings: hwmon: g762: Convert to yaml schema")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-12-07 14:10:18 -08:00
Pei Xiao
4910da6b36 hwmon: (emc2305) fix device node refcount leak in error path
The for_each_child_of_node() macro automatically manages device node
reference counts during normal iteration. However, when breaking out
of the loop early with return, the current iteration's node is not
automatically released, leading to a reference count leak.

Fix this by adding of_node_put(child) before returning from the loop
when emc2305_set_single_tz() fails.

This issue could lead to memory leaks over multiple probe cycles.

Signed-off-by: Pei Xiao <xiaopei01@kylinos.cn>
Link: https://lore.kernel.org/r/tencent_5CDC08544C901D5ECA270573D5AEE3117108@qq.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-12-07 14:10:18 -08:00
Pei Xiao
541dfb49dc hwmon: (emc2305) fix double put in emc2305_probe_childs_from_dt
./drivers/hwmon/emc2305.c:597:4-15: ERROR: probable double put

Device node iterators put the previous value of the index variable, so an
explicit put causes a double put.

Signed-off-by: Pei Xiao <xiaopei01@kylinos.cn>
Link: https://lore.kernel.org/r/tencent_CD373F952BE48697C949E39CB5EB77841D06@qq.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-12-07 14:10:18 -08:00
Armin Wolf
fae00a7186 hwmon: (dell-smm) Fix off-by-one error in dell_smm_is_visible()
The documentation states that on machines supporting only global
fan mode control, the pwmX_enable attributes should only be created
for the first fan channel (pwm1_enable, aka channel 0).

Fix the off-by-one error caused by the fact that fan channels have
a zero-based index.

Cc: stable@vger.kernel.org
Fixes: 1c1658058c ("hwmon: (dell-smm) Add support for automatic fan mode")
Signed-off-by: Armin Wolf <W_Armin@gmx.de>
Link: https://lore.kernel.org/r/20251203202109.331528-1-W_Armin@gmx.de
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-12-07 14:10:18 -08:00
Gui-Dong Han
670d7ef945 hwmon: (w83791d) Convert macros to functions to avoid TOCTOU
The macro FAN_FROM_REG evaluates its arguments multiple times. When used
in lockless contexts involving shared driver data, this leads to
Time-of-Check to Time-of-Use (TOCTOU) race conditions, potentially
causing divide-by-zero errors.

Convert the macro to a static function. This guarantees that arguments
are evaluated only once (pass-by-value), preventing the race
conditions.

Additionally, in store_fan_div, move the calculation of the minimum
limit inside the update lock. This ensures that the read-modify-write
sequence operates on consistent data.

Adhere to the principle of minimal changes by only converting macros
that evaluate arguments multiple times and are used in lockless
contexts.

Link: https://lore.kernel.org/all/CALbr=LYJ_ehtp53HXEVkSpYoub+XYSTU8Rg=o1xxMJ8=5z8B-g@mail.gmail.com/
Fixes: 9873964d6e ("[PATCH] HWMON: w83791d: New hardware monitoring driver for the Winbond W83791D")
Cc: stable@vger.kernel.org
Signed-off-by: Gui-Dong Han <hanguidong02@gmail.com>
Link: https://lore.kernel.org/r/20251202180105.12842-1-hanguidong02@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-12-07 14:10:18 -08:00
ChenXiaoSong
d8f52650b2 smb/client: update some SMB2 status strings
The smb2maperror KUnit tests reported the following errors:

  KTAP version 1
  1..1
      KTAP version 1
      # Subtest: smb2_maperror
      # module: cifs
      1..2
      ok 1 maperror_test_check_sort
      # maperror_test_check_search: EXPECTATION FAILED at fs/smb/client/smb2maperror_test.c:40
      Expected expect->status_string == result->status_string, but
          expect->status_string == "STATUS_ABANDONED_WAIT_0"
          result->status_string == "STATUS_ABANDONED"
      # maperror_test_check_search: EXPECTATION FAILED at fs/smb/client/smb2maperror_test.c:40
      Expected expect->status_string == result->status_string, but
          expect->status_string == "STATUS_FWP_TOO_MANY_CALLOUTS"
          result->status_string == "STATUS_FWP_TOO_MANY_BOOTTIME_FILTERS"
      not ok 2 maperror_test_check_search
  # smb2_maperror: pass:1 fail:1 skip:0 total:2
  # Totals: pass:1 fail:1 skip:0 total:2
  not ok 1 smb2_maperror

These status codes have duplicate values, so update the status strings to
make the log messages more explicit.

Signed-off-by: ChenXiaoSong <chenxiaosong@kylinos.cn>
Signed-off-by: Steve French <stfrench@microsoft.com>
2025-12-07 11:46:19 -06:00