mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/
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1,169,205 commits
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6f6287b8b4 |
AT91 defconfig #1 for 5.17:
- Sama7: addition of QSPI SPI-NOR and the QSPI controller for this product - Addition of the crypto algorithms that are fallbacks for HW engines -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ5TRCVIBiyi/S+BG4fOrpwrNPNDAUCYbzBawAKCRAfOrpwrNPN DJRsAP4qZurUWikvcozb3XDHbzrjGZK/g5m6r/LydWtf0YMqMAEA291YZ7lV6O96 9wSdR1pyuzfY8yoS7vT0bANcH4mTqwM= =cxlf -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAnuEACgkQmmx57+YA GNk2Gg//ft/ME4ridVKJ4ksnWA6BAiPAFBGjzWadO40xIXQCdUDIuQG0uQY5vHEh XQjeSa8gI1vZEO1rYGOjCKDROaV7phKiLIC+clQ6eY8dQbLAIypxNXV5+rRqhfZP fkbr49j8M25T0JLAeekaA8+9Xoz6Aqc1zYkpMoCBC5LrL4Zz9Zsr0DHE/J4fUwqM ljixjealr2til6qT8YkpqjsQhQaxF+jDzKkMDNm4cHRe9OfU2GXytlQ4rF8yBUcL WP+1Y5LV9fEo9okwozrdTzNFKlFIm1B9IQFxWg3jb3lMoch712DzpILssy/YXcD6 45BEcxFjIoiuK19hrc993yM9ugdeEKty6QvEz92Cu77owKyZu25VYg5722NqeG4/ 9YX7PRJVYvQKWbqWdQyfBjmTIHh5sgJv2z1+kElflMN5cx61PkCr/hNJgGKxs+ju CsQE77GH1RhQE6KW1C9spwyhFa8ZvwTv5zmvX/m2hJ8iTFzgUYMRe4i/5aOUhCHN 6h4C1tVvi/zt2KXyJ4SJk1yTZrTWWJ2u0d/sdF9epClVB9zcLEB+V2X7XE4cfpAo YlsJYmydqM4zdzOncpm+SGBuUFUj7hn9XukPzqYT6Lb0MUc0K2wonw3nKjQRo5MD lS8Ke8HHmceru8z7YIDzr1EtUZ3RjA7jwH5TJ9WjwNxfNJIqYbI= =hIav -----END PGP SIGNATURE----- Merge tag 'at91-defconfig-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig AT91 defconfig #1 for 5.17: - Sama7: addition of QSPI SPI-NOR and the QSPI controller for this product - Addition of the crypto algorithms that are fallbacks for HW engines * tag 'at91-defconfig-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: configs: at91: Enable crypto software implementations ARM: configs: at91: sama7: Enable SPI NOR and QSPI controller Link: https://lore.kernel.org/r/20211217165850.29694-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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9ca65b682d |
ARM: tegra: Default configuration changes for v5.17-rc1
These patches enable various drivers used by new and existing boards in both the Tegra default configuration and the multi-v7 configuration. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmG8snATHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTneEACBYzNQ0wCnJoO4RGhSl3K4A8zgQtLt guyeZLbh2PW/wLOa12wy7+YB5nWABCCxsjZflr2teDwOv3E7FkAsCA5WpckqR2gk Xej/QVdFnEpjESHc+JaReSimY2jfwUB2czVUraQRyukplk4YSPG3SCZ0Pw5TYVPy /Ga77d4S0nk9uvP7TbNClaQq3YKUWNvgoE/3EmFnpJpyU31KSUQuc/ChD4taMYvO WbLK9YdVCKVw/NLCqQjNNuv9f1TkeTSjMQQbmX5fpHNNw/YYQShtzS1bhAfFhCW7 rEqmX6HRK+uhiIQn9jnRGw5f08oJPRRKm4qo/l6nVsoaYMTZl+nX56irvHBn8MuU rltc7hiliLwYawpVzNJmUOoPNbRZcCvEttx94RxpF2/7Vy6Sq4+xZmMkzPOA3d72 SOZbFm5L47Fineo4RqaByzhDz/e9ZV10jfN68XIB+Yzq/GpiO+J7+2UeTxoQQnSq 3hXypopKjLd8bo8bcx+2NeOcvLmt84OFQkqv1c5jj/tlx9Dwemfgf1PgNrwtGMqP oCZztrLHWFnS5dtRDGotOTg+pR1GCCpahGZO+0B7lxe8xECbI7pgi6Hszn+HFItX dD8tIgd2vRVDsuX5h45d3OuRg/vgB677iW5iMG104HrjT87jyiQO6+MEG1GXN7wr VPvAuTSGYiKMsA== =199F -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAnogACgkQmmx57+YA GNkPzg/+PH3zEWKZfVzKimNOZufUg9r9ogHfDyvRHLywKTopEX/IxNTocdawCJhy aAJV6F2JNggLbeo1Y5dC4VFN6MuOXVik18VtwbFP05X/mQM2AHqJ2yNa0U2MO+kE D2/yMkutLGkJCOnl8cSsZKa+L7Wy+9mAZEwU8gGA5mMqcnA5RWdXi1KsG2wZr6A6 lFSnCauK0UfTmFq/cqJXhf8fGoaUyirUpBpy3mMTYVxg7Bzz8IsHNSMYymQA6rx/ K1zV1cF61juAU4eJIwPx/IvPXfWUG/rkOiW1fYwnYADKUo4fmPUTb2QMPLPqS34b VigB5r+1Gz+9hl8mQXizYWhGeBCR9+/qNcAp1ceezkexlcZHyolXa0gy9fM7pL96 mw41NJDMxH1e//OP2HrpviQ6v3IC3oKO1wQl8+0luWC9TjYgrF6ykTKj1Gxm2W6k dQ5svJnUe0UnUXVgvCSjMCn5oJGtahUpYwML2x7+aZuxvp4n8dlhoAoDjy9DW4wL i1QKE5injMHNmhhS9km/kIz2LMfqTgvdZ7HSeelfOEf04w9jDj+bRueR0rsswqus CpMqBH51Hze4WKVtlnoW4A09l2AflskZq101t2c4qWk97PdZW8nGqNpVbUPDh7Tx XDeSwt2c0P12dQDg2H2Tvm2tW8OHky1HfgnWC1iykYPz5jiAxtc= =xFt5 -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.17-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig ARM: tegra: Default configuration changes for v5.17-rc1 These patches enable various drivers used by new and existing boards in both the Tegra default configuration and the multi-v7 configuration. * tag 'tegra-for-5.17-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: config: multi v7: Enable NVIDIA Tegra20 APB DMA driver ARM: config: multi v7: Enable NVIDIA Tegra20 S/PDIF driver ARM: tegra_defconfig: Enable S/PDIF driver ARM: config: multi v7: Enable display drivers used by Tegra devices ARM: tegra_defconfig: Enable drivers wanted by Acer Chromebooks and ASUS tablets Link: https://lore.kernel.org/r/20211217162253.1801077-6-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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0fd319105f |
Samsung DTS ARM64 changes for v5.17
1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink
E850-96 board and WinLink vendor prefix.
2. Add pinctrl definitions used for Exynos850.
3. Minor fixes and improvements.
4. Convert serial on ExynosAutov9 to new hierarchy where serial is part
of USI node.
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Merge tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.17
1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink
E850-96 board and WinLink vendor prefix.
2. Add pinctrl definitions used for Exynos850.
3. Minor fixes and improvements.
4. Convert serial on ExynosAutov9 to new hierarchy where serial is part
of USI node.
* tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
dt-bindings: arm: samsung: Document E850-96 board binding
dt-bindings: Add vendor prefix for WinLink
dt-bindings: arm: samsung: document jackpotlte board binding
dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example
arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9
dt-bindings: soc: samsung: Add Exynos USI bindings
arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7
Link: https://lore.kernel.org/r/20211220115530.30961-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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d07156eb8a |
Samsung DTS ARM changes for v5.17
1. Fix Bluetooth GPIO on GT-I9100. 2. Minor improvements and dtschema fixes. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmHAa5YQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1wgPD/412VJl9YmicVLw5/Im52Pn90TrtN+WgHo6 kzQtEX8dz31aQa1rwVoGg+50IbkaTWYSj7jMPmssJMJkZc0KvdGm8egnirOy5GgU /1x8E22sRhivU43GMf6eTuEWUqJQ/3Qn7MR68eFUsVCqo7yyaJO/yH0HF1BbhuMs pD2k6ubvh/ZNqvvBdGLngsLOxbkMaOOtNmPdBd+5VhTOOf+wOA7rGPL/pAoJCK36 FPKx74y+81TVhij/dI2zYxdPDDX8lpaFFq3S0fa5EEb5HBqJVcaPgh6cG6z3/HwT 7Y3yBy2WJtCAHkNVvh/mQDNlsEbXlVmfmvE8xx6aeqmNjjnWt3Xeao9HNQlO2olC 00CP87jt+azIU1UxfSoVZZf77hwjKmeiIsq086wPbJLB5MRFBAeOdqbLMxwW2yPp pfqOjsX9b+/hbwyYGh34crEEqjJUJ+hUd472/gXArCCoehK04QZmuJiQoidJVbP8 ZCSkeIVU0QI0Sl5Y0+zwt7IKMnTvzo8SNxbuJMlhaWacohC2NQo4zEJBeIlR0WgY Cqblz4uvllnQ8ur0cQvp5CKVfy60mzBckDKNh8gH8NOY0EieqQnRh+B4DpNutRxg umwlf/GTkaNKJbx0vWCGPYXcqcNV0eotudb8tDzuR7yeWmVBau7vO2Isgxbcx+ff pj/UEtiJdg== =J83/ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAnWYACgkQmmx57+YA GNkXHxAAo0bkmM4GB0UvfoAPVfchdow8VsBTrwtv3yEnpZVvo/ztdL7LaxQMbSTt znqb3KDHLLH4d/22A1cwCYoWc0EWbGlpn2E1W4Jj+ZRRVxW9IfW5dmB2F24KjSS1 ck+fL60aadmFfgmirFl+7cRtUSuG4YuMB0mPHGaBD+9k7lfsgZC4hn0dbafCeOqW uwt3tBBm7gVRodRapG3VSSzIhCPkz3MstzXNe8ftaUSN6zyAO5nBVWKavC7AGR7x jNTdIPqQ79qN++Q6wV6+n3GF39mjwDjRmkAav2gB8oMpdZOJHw2yRgQwwN1Jpol9 kV7c/q//sbNtejU1L/rdI7ni4W5OWW63RNfWg8b50IlU+oj6DlSvMqtrsY/CZIKQ uyr4r5OkVN5upcDlngJPsiA38dIBFYdMcuMFeVt+zzikGhnGRLl4lrVsB5rSkJQ9 hJ3BJVOweOiKvlVO0g4TZL2oKHVTum4JK0KPqAyOYrQp3UzXRYLHh9OO+WFWUyX+ XJxgTaL9Xrg+RENTtzTBEFLysNizH95abbTVbnmEoMPbQB/0W/pLI/qSsUJblbPv 5A8jPbUho7+J3b2k+STkkwXAu6PeD1rNv4EJBkDvNo354qxoqhzFIUV1SdPDoFyv HvoHTNPu4XgJfepMOgFH28fmAhgdE8Wm+BkZQGK+X4Ew6cT4b98= =duhT -----END PGP SIGNATURE----- Merge tag 'samsung-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM changes for v5.17 1. Fix Bluetooth GPIO on GT-I9100. 2. Minor improvements and dtschema fixes. * tag 'samsung-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: Rename hsi2c nodes to i2c for Exynos5260 ARM: dts: exynos: Use interrupt for BCM4330 host wakeup in I9100 ARM: dts: exynos: Fix BCM4330 Bluetooth reset polarity in I9100 Link: https://lore.kernel.org/r/20211220115530.30961-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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aa7bb116f0 |
- add device tree for Fairphone 1 (mt6589)
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505596c8d3 |
mt8183:
- add Acer Chromebook 314 - evb: add node to read thermisor from AUXIN0 - add several sku's for Lenovo IdeaPad Flex 3 Chromebook and ASUS Chromebook Detachable CM3 - update sensor mapping of the board temperature sensor - add some coresight nodes for CPU debugging - USB Type C connector description to all Chromebooks mt8192, mt8516: - smaller i2c related fixes mt8173: - enable backlight enable pin to all Chromebooks mt7986[a,b]: - add basic support -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmG9nEcXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH6I7RAAgwy4kYud9C9ErjA8T/kpiaI8 DH/P6t47jF2lV4VX/+MFSf+2xQhXLWndgGYtKE4EqgibErXng15snkHh4ZKen2rR YOGwJ7oUjpZaEHA66ciyb9olM0C7uxj4n+SHJRfL6INR2cS1LHCedroJ1lZs510t 5pN0SWpHn7pHocVqY1hX+PpfqdguXGKzvErKfSYDFe/FihHF7MjYXM/a153IgagO UM8dL7pBEAPxI58eKG+1D4RxfzIVps98joCQCPqmuKoV/TZTGvEEpJtSXNSRvx5A DfU9nHTf68QyYZquhPDN+XHB3kJ6RaRBqmPd6LlDlX2h2VxXe1Wcn4GzvY1FCN72 2zAE1Bz97u63G0kcGi4ze0KULSJQxBsQmdb/gSCDVlAiCWF1gnJX+5LNAfFeLj2Q 6HBJJXMqSKSFgEJsAWTMRXUg9ZXocjTcAf49fC+fgiEY8TKpwOZR8m2g04Mwz1h4 s01QZOGYuT60hkZCmXZ2+uCHTnCQTVwdulkOZcf7WXagYrOFRCux5orT+C06fzAG qd1MNSDDr7H8UxZsCeQN9DMcVypaGpqUHM99h9RXB61z0zgT2V+S+iKSx7uuVATd J714IVDqG18OaxurwzGxnE6eFWYlxBENbydUob7I0ESLOGlMjI6Q8Es15h12CZ2O KpR4MfcAJPNFDHgLxLs= =hiX8 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAnGUACgkQmmx57+YA GNmG6RAArYOHQO26cMPHbvsNchu1M/Xl8of9CJ0nMEA6phrl4lp78JfIQUsPYoaB wbzfPqT+f5mIsxfJ3Ham/wu9DoYwgj8bEojUcgfxcmjVHqliffv/R8TGE5/mBFO3 qVDvdZoMLGW59y8cZaVyPpjUBh8m5/NvlAXJgSXs3ux2e8Ni0jowqAsx9/3jYs01 4oaXNLwNYyVyXqikfOjS1EpNxt00H+w3MHCciV7Pezp14tAuzLml0P6nkOGa3/gY iLG3NuPyqzuwNAF6rHbzq1zEijMiTy81HcKAdNBfU7pkScxm/aT1IpJ6+Xf/cclV sCjkl6S++hjBzol5y9vvBebqto/DY4EPVHjVKfFAgVbkh77GUq9AXA5MWMnVOavA hNaJlkjtesMlxs2ZwHRbG930bRW9gJerrIx5Wq2dVzhKFDo/9B8piFlt9ujyKIBo Ky7zbgte0XNiBYVXHmIMV9fOEhBsQnxBMoC620kot9JOCbzRW9r+y09Al7bJ2KId e1fOCUA4DYRCg3rJehOHigBeOHBHvnF4oU58MC9HqOzF1jUfA2a1geyEMDymqPYf +mYvvbMyfEMUjm6balDVf532QIuhJH8JWzbu0naHuOYyB9rQy1NdiKM4wnNHxvsV 29tiERgSRNw9sQlyKl/kZaiZMXvic2eTieyzP0oLbtRBAslH1r0= =aXmv -----END PGP SIGNATURE----- Merge tag 'v5.16-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt mt8183: - add Acer Chromebook 314 - evb: add node to read thermisor from AUXIN0 - add several sku's for Lenovo IdeaPad Flex 3 Chromebook and ASUS Chromebook Detachable CM3 - update sensor mapping of the board temperature sensor - add some coresight nodes for CPU debugging - USB Type C connector description to all Chromebooks mt8192, mt8516: - smaller i2c related fixes mt8173: - enable backlight enable pin to all Chromebooks mt7986[a,b]: - add basic support * tag 'v5.16-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (21 commits) arm64: dts: mediatek: add pinctrl support for mt7986b arm64: dts: mediatek: add pinctrl support for mt7986a arm64: dts: mt8183: kukui: Add Type C node arm64: dts: mediatek: add basic mt7986 support dt-bindings: arm64: dts: mediatek: Add mt7986 series arm64: dts: mt8183: support coresight-cpu-debug for mt8183 arm64: dts: mediatek: mt8173-elm: Add backlight enable pin config arm64: dts: mediatek: mt8173-elm: Move pwm pinctrl to pwm0 node arm64: dts: mt8183-kukui: Update Tboard sensor mapping table arm64: dts: mediatek: mt8173: Add gce-client-reg to display od/ufo dt-bindings: arm64: dts: mediatek: Add sku22 for mt8183 kakadu board dt-bindings: arm64: dts: mediatek: Add more SKUs for mt8183 fennel board dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-cozmo arm64: dts: mt8183: Add kakadu sku22 arm64: dts: mt8183: Add more fennel SKUs arm64: dts: mt8183: Add kukui-jacuzzi-cozmo board arm64: dts: mt8183: jacuzzi: remove unused ddc-i2c-bus arm64: dts: mediatek: mt8183-evb: Add node for thermistor arm64: dts: mediatek: mt8516: remove 2 invalid i2c clocks arm64: dts: mediatek: mt8192: fix i2c node names ... Link: https://lore.kernel.org/r/0d05e8b6-c56f-bad7-00c1-44682cedb38f@suse.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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572006bce3 |
gpio: msc313: Add support for SSD201 and SSD202D
This adds GPIO support for the SSD201 and SSD202D chips. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> |
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33f8b4862a |
i.MX arm64 device tree change for 5.17:
- New SoC support: i.MX8 ULP. - New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2, i.MX8 ULP EVK. - A series from Adam Ford to enable Camera and USB support for imx8mm-beacon device. - Add overlays for various serdes protocols on LS1028A QDS board using different PHY cards. - A series from Biwen Li to update LS1028A devices around RTC, flextimer and PWM support. - A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M devices. - A couple of changes from Lucas Stach to update nitrogen8-som Ethernet PHY and I2C1 pad configuration. - A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3 dtsi for Librem5 devices. - Add cache descriptions for i.MX8 SoCs. - A series from Vladimir Oltean to update ls1028a-rdb device tree in order to share the DTS between Linux and U-Boot. - Random device addtion to various i.MX8 and LX2160A based devices. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9hc4UHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM5tZAf/chwOQUH6gwyc76vb2mzcMlYq4jPN vMxJZ6fJBf+QglOrGfSznl11SHNCGs+NBDvRkJt9JLKj1fHh/jUTZf5HCRnK62lH YB+w2XxlthufTPujkVXM10Dsx65Up67Mo3ZN5/3M6Fd+w/P8YUzPEL0jD2dm7CDM rKqe57kcJ6ZaJgASuPdVh51fwpmbCNOQZCRgg4Y+sunXzUVyjA/jOUaeQojg+m2e TTe80CH+3fugipWkotAa8ypxAJEbeEsPvVB711UxTY28rE2BqDkcPMyOiq+9HW+M AoqPeyeZffyJGwLblLCQTZzMEuWU9G87H+fda7b8sg7yFPvjefaj+4DbdA== =ARjB -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAm/QACgkQmmx57+YA GNk/4g/9GG9YYbOHzLDSit6I92eAwMhIxCE7ls2RrB/JBIi1v13qZ85YTPw9w1Bc klRXP46fI6dVl7R7t0Vt2zt5MpuNnKAMZsHQR+UvB/Zll4RC7n29NEpWyFW0i4Yv /G28Whmp1sQs8szrWwvOlxWMY3fSlQMKM4vrtJUU6Che5ec+PwgsRL2rWf5/cnJh E9HqQ3eJMyP8cdayRnlUCI8yWAdXHkeDQhl7Mu97eX4l7Ka2OkDseEZY+HgRmQSv Ee3X1EPxFHau9f842NtIwNz54Vdibfh+UHCzMeWOtDZXF8bhWVYp13joPNDM7AWM 0oYMh966t/JuU4cPCQxed61C9Laxg42TkCbfuU7dC5pqKlCdSZSKOmLe7c6vw3Vf IGQwVgMh8/c3oJAbbPqWz+kfCg3O2KNzA3MnsQuizoLEwa5R4msqtk6FZ5uqR6d/ RYL9eZKzeZWPXwth1KCEx+qLFWuRxC5cdK181Hc/Srm3bzNf/6vfCcReRCvlfOiE lU1kzHLOKtfUeWSEK3WFnWuTbU68NaH8rUZXpuTlV1kYEeBf/mD4aTOUW9hOh0v6 EYwpk2QYPBcUUYR2KC6gfyJTTwihn3FR8+RiJR+VFjlhNrNHbrNmp3Vo19yjgu/Y brbFPEitQPnvXdrGAIfck9vHhO9VJ3xygo9SMowGsaRuFLunW/0= =zQ1O -----END PGP SIGNATURE----- Merge tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree change for 5.17: - New SoC support: i.MX8 ULP. - New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2, i.MX8 ULP EVK. - A series from Adam Ford to enable Camera and USB support for imx8mm-beacon device. - Add overlays for various serdes protocols on LS1028A QDS board using different PHY cards. - A series from Biwen Li to update LS1028A devices around RTC, flextimer and PWM support. - A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M devices. - A couple of changes from Lucas Stach to update nitrogen8-som Ethernet PHY and I2C1 pad configuration. - A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3 dtsi for Librem5 devices. - Add cache descriptions for i.MX8 SoCs. - A series from Vladimir Oltean to update ls1028a-rdb device tree in order to share the DTS between Linux and U-Boot. - Random device addtion to various i.MX8 and LX2160A based devices. * tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits) arm64: dts: imx8mp-evk: configure multiple queues on eqos arm64: dts: ls1028a-qds: add overlays for various serdes protocols arm64: dts: ls1028a-qds: enable lpuart1 arm64: dts: ls1028a-qds: move rtc node to the correct i2c bus arm64: dts: ls1028a-rdb: enable pwm0 arm64: dts: ls1028a: add flextimer based pwm nodes arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source arm64: dts: ls1028a: Add PCIe EP nodes arm64: dts: lx2162a-qds: add interrupt line for RTC node arm64: dts: lx2162a-qds: support SD UHS-I and eMMC HS400 modes arm64: dts: lx2160a: enable usb3-lpm-capable for usb3 nodes arm64: dts: lx2160a-qds: Add mdio mux nodes arm64: dts: lx2160a: add optee-tz node arm64: dts: lx2160a-rdb: Add Inphi PHY node arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi arm64: dts: nitrogen8-som: correct i2c1 pad-ctrl arm64: dts: nitrogen8-som: correct network PHY reset arm64: dts: imx8mn-bsh-smm-s2/pro: Add iMX8MN BSH SMM S2 boards arm64: dts: imx8mm/n: Remove the 'pm-ignore-notify' property arm64: dts: imx8ulp: add power domain entry for usdhc ... Link: https://lore.kernel.org/r/20211218071427.26745-5-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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a5a44f4d50 |
i.MX arm device tree change for 5.17:
- New board support: TQ-Systems MBa6x, Y Soft IOTA Crux/Crux+ board, JOZ Access Point, Phytec PEB-WLBT-05 support, BSH SMM-M2 IMX6ULZ SystemMaster. - Update SPBA bus node name to match binding schema. - A series from Christoph Niedermaier to update imx6qdl-dhcom board around Ethernet and USB support. - A series from Giulio Benetti to clean up undocumented/unused fixed clock compatibles. - A series from Laurent Pinchart to update i.MX7 MIPI_CSI support. - A couple of changes from Russell to update phy-mode for vf610-zii-dev-rev-b board. - Add Wacom digitizer support for imx7d-remarkable2 device. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9f3QUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM6v0Qf9EgOkEu4fn/GBbOXBBuh3bWMdw4vB bJLQ4Ry6iqo/EDscbTWyjjVxlnIYRDa1D8d9ndZcs2wHY0TQhG87/KmH43iHmOAw vdvIHoe3cgQuFrk15k/bgi2MQm9g8MayugK5xshiLQvOOpSUCBQHuk4oLyRACR3q m1dpwe5CNaVABjuwZKHlmZq0DNGvN2QJosUbKyl6j8Bxo98I3sjHno0uNHfNaoPP B7XUOozHf1mAoTBHVb22Ej0Zbpy5FiprOYZKhP7rvuQOnRhg7NcByIhd/s8uQAjA t3Owq1VCZVEC98sHaZcN2qdAs8n42S+hPHT0WuV0v7SaV4hDCGxXipvxfg== =uwuV -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAm5kACgkQmmx57+YA GNnxRhAAuIK0GcrbM4v2jOnXUCBLRrJXZSPqI0Z1DrHIq5JPgqzR7jUcDnoV7T54 Q6b+Bt6XvRJPZlkr9M4p166Qd62KnzSZyxg23Wb0feF6R9TFCrXUeQjmGiBZqB1O wNDm41Pv6EX7OOBPdRMfhbhPP+ezstJiMRxO99JfupwSPrcMJkgj6KzVdOwgvAg+ J1n33COkczYXJlt7LLADdaucBlB1IerKfRSPy0+mZszC2js2dJqCzVNwkwMXjBTy 5qmB5oBEoUQzeISgPjxp7xMQi57XBhk2UP5c2XWMvZ/OhgRpbWRZU5kBfTlRKXBV VbdvEUpGHbAghXFwUnxQx/OC465wAgYyN+Rek7ZfWQ7VnD5XM1t2nYjCKOZPujcL Kfe3HE8ssKyEp0gE3/ZfmMZehwzhXVf6r2wvqEiJAp7Nhigy4pE4A6AGNswVEY/i Et/MLVOwhdOVlj7dCZfVg7SdlQouhFm8EmrR0zRCJKsdMid2l3MkU/eo7Zl8Slzu LS6MyCs1T/2+i+HdZgoSFnqvBLqIUtqeTIvhw5zggar/i/nH2JXkJV4A7CuAWB6h inUJAB9/2B5egqdTIPATI4T6nTu37wZOBl9ZGuijXyRa9wMVtwPr4lySkFFJyFIK 0a3TnHxQjdbDHFoO0kvfB4Yk65Z+rtpnZlPPJgVMn3GSz4ND1tw= =cSJH -----END PGP SIGNATURE----- Merge tag 'imx-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm device tree change for 5.17: - New board support: TQ-Systems MBa6x, Y Soft IOTA Crux/Crux+ board, JOZ Access Point, Phytec PEB-WLBT-05 support, BSH SMM-M2 IMX6ULZ SystemMaster. - Update SPBA bus node name to match binding schema. - A series from Christoph Niedermaier to update imx6qdl-dhcom board around Ethernet and USB support. - A series from Giulio Benetti to clean up undocumented/unused fixed clock compatibles. - A series from Laurent Pinchart to update i.MX7 MIPI_CSI support. - A couple of changes from Russell to update phy-mode for vf610-zii-dev-rev-b board. - Add Wacom digitizer support for imx7d-remarkable2 device. * tag 'imx-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (36 commits) ARM: dts: imx6: phytec: Add PEB-WLBT-05 support ARM: dts: imx6qdl: phytec: Add support for optional PEB-AV-02 LCD adapter ARM: dts: imx6qdl: phytec: Add support for optional PEB-EVAL-01 board ARM: dts: imx6qdl-dhcom: Add USB overcurrent pin on SoM layer ARM: dts: imx7d-remarkable2: add wacom digitizer device ARM: dts: imx6ulz-bsh-smm-m2: Add BSH SMM-M2 IMX6ULZ SystemMaster ARM: dts: imx6qdl-dhcom: Identify the PHY by ethernet-phy-id0007.c0f0 ARM: dts: imx6qdl-dhcom: Align PHY reset timing with other DHCOM SoMs ARM: dts: imx6qdl: drop "fsl,imx-ckih1" ARM: dts: imx6qdl: drop "fsl,imx-ckil" ARM: dts: imx6qdl: drop "fsl,imx-osc" ARM: dts: imx53: drop "fsl,imx-ckih2" ARM: dts: imx53: drop "fsl,imx-ckih1" ARM: dts: imx53: drop "fsl,imx-ckil" ARM: dts: imx53: drop "fsl,imx-osc" ARM: dts: imx51: drop "fsl,imx-ckih2" ARM: dts: imx51: drop "fsl,imx-ckih1" ARM: dts: imx51: drop "fsl,imx-ckil" ARM: dts: imx51: drop "fsl,imx-osc" ARM: dts: imx50: drop "fsl,imx-ckih2" ... Link: https://lore.kernel.org/r/20211218071427.26745-4-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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9018001ee0 |
i.MX dt-bindings update for 5.17:
- New bindings for i.MX SPBA bus and i.MX8MN DISP blk-ctrl. - New vendor prefix for BSH Hausgeraete GmbH and JOZ BV. - New compatibles for various i.MX6 and i.MX8 boards. - Add optional 'fsl,continuous-burst-clk' property support for imx-weim binding. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9e84UHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM73+ggAoLAKxNOdtkvqG77jh/1we/fd2l4X n5Ty4QnqiVXkSn/qEk8VLl2zVitny6PmJR6de1FrXJ+znwRc8gVqps/iizvxLdVU t1ztewvEopnvv6NTtxIYLL56y73jpdN53hGfMeyPoTUkzxO6BcLSLVgCxJNT+7c1 1s3gWE1mWOZpS0avIiMqDCFLz8dlmJFPfqrU8Uq+aDhDby485LGL3Wd9lK/b+flq TCgAv9jdknxT8+G9D2Gg6kvMLASi5ZJverXAtttF6eEUB0+0uMW2Vs9qGYuNmSBd 50h0f6KlxH06iIs6o8jFqD+v1pGR/z1xmb5j4cLQkP3N86CTqsMzq7gBMg== =lEij -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAmwAACgkQmmx57+YA GNkgTxAAhtuirKAZ88ss0NqVw3dJ2e3+U0ehvvw6rK+WDrPl0PH4V2HGy3eiPb2q rgpXD3VHW3udKsqVgdFW8xqEUdKn1LgmgzCrgaQx9nuuGmo3YW5UtuSpukxX20Jk Xr6preQsfSTPn7aBR7skt0mgecDlhTBhcvhpbJecr67ZoTAcxug0gu+Zav/xoLV0 l8UGms89ZEgWUOaJPMBJn82vmiGbWJBWFUEuARUo5vuLL/l2evJqPNFvF/bCspzH b3YnP1gfmTIwX+zGUUC3kSLP0vgYAnggQlMJn86JVS2GbvFFLovRzwqu0oI/jpHO BnbQ2hGMpja/3E3uW1gJotcbpHbhAK2yalTfmNwAf8A92JiKxCsOllakL3Gj0ykG OtcXUrjr9f0sR5OivxjqCLAR4VrE8hroucAWkEeSSH1ERIlmCnojxlTrSZGPKrFh WWjtJ5tXUY4tt+GkAFOfe+H6HYqlY0+yQ1Jee6wpHBme/HYxzKBFuCnsPxPt2veR sIUc+8Igzr9cYiS9K86vAGhC8KjPiP7kHNhscTH/IcshzloDIWjlt+PJPED5UrnK 3mz5/LzOpeUjhBHq+7dwDPoyf4AoHyTI8gVIR8AvS46TfO7vOVDnd4Lgb6SEbKtx 5cBUICM0ySVM60nKSqKSwuKpk5lXKuR7hFcFInfoA6NynObN/KQ= =nnr+ -----END PGP SIGNATURE----- Merge tag 'imx-bindings-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX dt-bindings update for 5.17: - New bindings for i.MX SPBA bus and i.MX8MN DISP blk-ctrl. - New vendor prefix for BSH Hausgeraete GmbH and JOZ BV. - New compatibles for various i.MX6 and i.MX8 boards. - Add optional 'fsl,continuous-burst-clk' property support for imx-weim binding. * tag 'imx-bindings-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: soc: add binding for i.MX8MN DISP blk-ctrl dt-bindings: arm: fsl: Add BSH SMM-M2 IMX6ULZ SystemMaster board dt-bindings: arm: fsl: Add iMX8MN BSH SMM S2 boards dt-bindings: Add vendor prefix for BSH Hausgeraete GmbH dt-bindings: soc: imx: Add binding doc for spba bus dt-bindings: bus: imx-weim: add words about continuous bclk dt-bindings: arm: fsl: add TQMa8Mx boards dt-bindings: arm: fsl: add TQMa8MxNL boards dt-bindings: arm: fsl: add TQMa8MxML boards dt-bindings: arm: fsl: Add binding for imx8ulp evk dt-bindings: arm: fsl: Add Y Soft IOTA Crux/Crux+ boards dt-bindings: arm: fsl: add TQ-Systems boards based on i.MX6Q/QP/DL dt-bindings: arm: fsl: add JOZ Access Point dt-bindings: vendor-prefixes: Add an entry for JOZ BV Link: https://lore.kernel.org/r/20211218071427.26745-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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8a3804c030 |
ARM: dts: Remove "spidev" nodes
"spidev" is not a real device, but a Linux implementation detail. It has never been documented either. The kernel has WARNed on the use of it for over 6 years. Time to remove its usage from the tree. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20211217221232.3664417-1-robh@kernel.org' Reviwed-by: Mark Brown <broonie@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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8d5c175fe1 |
mvebu dt for 5.17 (part 1)
Add generic compatible to UART nodes on Armada 38x -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCYbzKZgAKCRALBhiOFHI7 1ZvRAJ0YSacBMmwCPDBIN8fQxf25RU66kACfXxzUiv/x85LAn2E2aXQanDZWSLU= =fnVs -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAmn4ACgkQmmx57+YA GNmgOA/+LOzL5EJQu51VJSxZcQ7sEdFbZlo8pW7KR7X1pm8bAMJpJxG2AFHvyR7Y jcXXEcNm6odSSdMEZqqGMcacLnlb0j+jRGaK1/CPAEY2J3liI+b5wnSkMR/F9fK3 NFeFB+mnut+iDpr1t3rDv25VIKijfVHfvdRsKsh9Zx/MLOKfeoFv1lq6Dnr7s1jx DiErFq5D99NmHGcR5xI99CJW5ArqXfNRLW6Rf4M57FXvcKzmGEUFaTdlUGVrdvsE Fh5I/BdWWozMVfL7RzQHUMFtTdkrf4j50LMH0CFqS+BGvlUeewPq8ZssHUtcg77m Q6hSITbJRsgadPfqifZG73Tw8hNuJzXNKVpU+b1CUS5K+N3Prs+yOvV5TJ8bBpTJ txm9EGdAfzjrsRxLkhszIRTNjcQ+Dz467b6oRzaL27J25+Ecpyd90q9eAiiLPvdR Li3fNmzFfKkIjXBmex8kk7TamnknZ+bkxEjyngkbrpur2of1LbR9wNwOql9YyNw8 LRu8+NtOScD+9obIpHcveLiTM3nhBxgYd15tjB433KIEp+1m7HVeCTjwX+KeRbpx MY5UjBAyW0quct0dvpUNxbCKlDsNP4lb+vrJc9kFc9CNbk0GhLQFSilyg0wxIeFD AMyfLZy60qSBYBie17SWF0J44qgumze0Uo9Ae+cuRiP+63SVXmg= =kKpT -----END PGP SIGNATURE----- Merge tag 'mvebu-dt-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt mvebu dt for 5.17 (part 1) Add generic compatible to UART nodes on Armada 38x * tag 'mvebu-dt-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM: dts: armada-38x: Add generic compatible to UART nodes Link: https://lore.kernel.org/r/875yrnm8uq.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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0724f8a147 |
mvebu dt64 for 5.17 (part 1)
Enable more network hardware and gpios on CN9130-CRB Add new clock node needed by comphy on armada-37xx -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCYbzKMwAKCRALBhiOFHI7 1bFEAJ9VuqcNyPoqXJlVK776hvo/JpC12ACfV2ulghvZ1vwzcZOIcdIcCRKVYcI= =/YLz -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAmhQACgkQmmx57+YA GNkEDxAAwYRTjlW/cTGrvUEyWb6+VYm/FBf/8FX3MZB+u/zJjdiVYIqHSQAk4VqW sUbjBaT5UY3rH28MDAhI4BPxg5SgKSdOvG0zuUdWLYqPC7TEeie9zQrN5BXh9v3g zFd2jZh/U8Hhbw/8rLYkGd6Edj/ZDpG3uYLbrJy6f5mwhCVVnCB0t4emNJNYmejU aJRqOhjmGaEe74QPOBq5FzgN1DTQFH1bv7kZnNKFN7yCvbxrSOHO62/tXLplPVdv wl8wh1v12MLZy17j2YwBzklktfrjlf9yJAPAae3KFYKjc3jZkP2XTAqO6G5novPy 5Q3OalMEdNjcd6HtvrvIH1PURoitjdHxtlQu5EPpqfo06TCw8K/BAFbPG3LPiwtN K4FrF4STNRk5XFrUzVkL4KNKqeVH1JfYHoF653OLhydyngswPkgcqMDz0b5Z45Fv 0+HQn05ei6SoztgR7ghtRCnTDouPhstgV5TquKxbRcT2lj5WQgdK7sGRtv+v0GB+ OFYQHXb3tndRPDoJiu+YRxCjM+8al4pfCe3wbXOaPcSnla41/T9Z7z9QIMEb0VmV 1rwkKcRCesFMixFSFw6f6w2LfcRxDDykrwPaCa3AD04+vG1sPBUalnTUojYNr93j EN6tL0f08U9rMXoqPuYU4AWLTtUccLD4SuMZS+9m/6qa4vKZwXo= =FpBZ -----END PGP SIGNATURE----- Merge tag 'mvebu-dt64-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt mvebu dt64 for 5.17 (part 1) Enable more network hardware and gpios on CN9130-CRB Add new clock node needed by comphy on armada-37xx * tag 'mvebu-dt64-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: arm64: dts: marvell: cn9130: enable CP0 GPIO controllers arm64: dts: marvell: cn9130: add GPIO and SPI aliases arm64: dts: marvell: armada-37xx: Add xtal clock to comphy node arm/arm64: dts: Add MV88E6393X to CN9130-CRB device tree arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB Link: https://lore.kernel.org/r/878rwjm8vj.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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990102a792 |
Devicetree changes for TI K3 platforms for v5.17 merge window:
* New Platforms: - J721s2 SoC, SoM and Common Processor Board support * New features: - CAN support on AM64 EVM and SK - TimeSync Router on AM64 * Fixes: - Correct d-cache-sets info on J7200 - Fix L2 cache-sets value for J721e/J7200/AM64 - Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200 - Disable McASP on IoT2050 board to fix dtbs_check warnings -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAmG8nQoQHHZpZ25lc2hy QHRpLmNvbQAKCRDERh5FfJEW423oB/wMWRML3F6+LKGkDpm6Dme6oV24NzhnACBl CQ0me3NpQEq4QELPasRwc9E4WOLGCGtDS1HByCrpCELFI7ET9ebwgo7yxl9nvJm+ nzSGwWY9/n3wtXhEc68r0if12WRuu59YTrhf+Q5GNF6uh4iv5aSmAfdSQmUljER5 hs1mZVAQflbxhsG5XR+OUGUvxQZ6Uy8F0OjW++a+ci3QtmQ9y+FUCIMdeLMvXD4C efaWtFtselePPqN3AJMRddAgo/rbzXWBaX57LG8oMz4a223Ima7FpVB0sgzsnYh8 +qG1JqFC88SR9Prjp7n8oaBdopL+ZXOZvernLWonFIGvvodK57ZM =DYkC -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAmXgACgkQmmx57+YA GNlR3g/+MjiqccCspohN8BRhsOTpDtq7NBM+F/oqwKzr9sktpwWeMz6dI1hjPihz spyixzw10lcHdO3me1B8jOV2+Cek8zZzhDHK0tBXZU4AO+lNmgsjyxWs953TMcg8 eklBb3TpocHfGEuJSzPfTAD1B9QRB3Bl7kMztwE9uNKUCJiXCToIs63i/8QaCjIG kNzJOCdndw07h4Ms+6MTlDLbpivFnedU43YyrtYGCovg5tlv02B8452KpbfHAIUf MuuCAIYHm/ZAZa8aOfQ3ZsxwwXCYVu77uG14CTQKChOJeOZ9xzf5WFsRtY4EjJFW bixwAQ9ZxFuFm8vXPz5vHkNh0nDGdHV2LJ7SVCoFZ/zcxXROH8+ol9/XtHsaShRh C5+Ekz8GWvWnVCaeon53vzMXneVRoK6YvxtS1P87uuaM8IH3U8lktmHaJMlD/qdl mGLyJs4GRt3tKdqlLB3FvUb1tWSLSZ84fuRHVb/FXY9M/driZYgGymH7axTWJtSE m3rB2EMvbYWfdV69J8T0JSPmLwRY9lkJxSvnJulXB/J0yuvqHesrXoZHbiqxkZiM adYT/ub6a03yRwoCFowTtOfBGyHOG7SLwrdHQ5dam0dCHjc0SGgJZj+gnHWh0asC +/JMhePTxD1fH0UmElRHY1L1of6iWguWXTFgNZhHUxbCj/z+dSU= =R9bG -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt Devicetree changes for TI K3 platforms for v5.17 merge window: * New Platforms: - J721s2 SoC, SoM and Common Processor Board support * New features: - CAN support on AM64 EVM and SK - TimeSync Router on AM64 * Fixes: - Correct d-cache-sets info on J7200 - Fix L2 cache-sets value for J721e/J7200/AM64 - Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200 - Disable McASP on IoT2050 board to fix dtbs_check warnings * tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: arch: arm64: ti: Add support J721S2 Common Processor Board arm64: dts: ti: Add initial support for J721S2 System on Module arm64: dts: ti: Add initial support for J721S2 SoC dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2 dt-bindings: arm: ti: Add bindings for J721s2 SoC arm64: dts: ti: iot2050: Disable mcasp nodes at dtsi level arm64: dts: ti: k3-am642-evm/sk: Add support for main domain mcan nodes in EVM and disable them on SK arm64: dts: ti: k3-am64-main: Add support for MCAN arm64: dts: ti: k3-j721e-common-proc-board: Add support for mcu and main mcan nodes arm64: dts: ti: k3-j721e: Add support for MCAN nodes arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodes arm64: dts: ti: k3-am65-mcu: Add Support for MCAN arm64: dts: ti: k3-am64-main: add timesync router node arm64: dts: ti: k3-j7200: Correct the d-cache-sets info arm64: dts: ti: k3-j721e: Fix the L2 cache sets arm64: dts: ti: k3-j7200: Fix the L2 cache sets arm64: dts: ti: k3-am642: Fix the L2 cache sets arm64: dts: ti: j721e-main: Fix 'dtbs_check' in serdes_ln_ctrl node arm64: dts: ti: j7200-main: Fix 'dtbs_check' serdes_ln_ctrl node arm64: dts: ti: k3-j721e: correct cache-sets info Link: https://lore.kernel.org/r/20211217172806.10023-2-vigneshr@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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a862e81808 |
arm64: tegra: Device tree changes for v5.17-rc1
The vast majority of this contains various updates and cleanups to the Tegra device trees that will eventually help validate all of them using the dt-schema infrastructure. Another notable chunk of this contains additional Tegra234 support as well as support for the new Jetson AGX Orin Developer Kit. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmG8sbwTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zob2pEACAt4T5USKGU6CR8Zv0A2drxxpPejhI ph4KMl1+YPwlxP9knZlEKns1XXFc4XXX5CaQK9ndiYRvpOVpa95WPcReLZoi9veh PBXgNAtryx+IePVkmQWqQ9R9Y7IZ8qOoVRxCgV9xwbRTEEQiwf9FdKQg8A4TV7i5 vq4LYurUV/b6PoXX5U7zlFnWfd5MU4K4ledWW9/6cGKW1vTjlZPiKian5NfGdgpX sQGR6zXSpiRKgTJCB+CKU3s9aaHHENNfjrop6upEo/G2nETp4EdGCsQn8KguOtf5 KUcZzOxeUow99I25V1y0fFKkOfGWsSnOYUoEzoZ97H1kCIFCzeYChV7RJ0uxPsdK jzUXh8xRl++Y/C/DfKnN/sIicqyVr1H9qyNZ00LCbCMWcYb3B8wwIjCOMG1YIJV7 5bhvmH0wVeNZYdwaynkfZUpKYsirz6IrMeWBsCb85zC5efuWS5oI/MB2JhezlH4A AJR9ZZ5OgqYNvnm0khNtU1tzkeoEzzHK2E12PVcCztvACyhCArkCIS/ctyS4kLkL BC/KWHuVb9SNIKXQYPv+mql5PHz5urcCaDSBZ2JM1D6pKZmp0MlEeR5IDsRF8MBJ 4qhFvBrGC0p4byvLi4doXnvzJKeZDHTaHOpfr0cmQlXiG6XgJioxFIW9LGb8e4fL 12152x5QFWoa5A== =/fm0 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAl+0ACgkQmmx57+YA GNn1KBAAkbKi5H+qUJYMwsKfoobIAs3x40vkm1k0QVei4fa/1NLbwb2lP4yS/Us3 jUQqaa5XtnMRXfeScpc/Nw6o80llgwVyxZbxbdJ+0ffkthLHoCryBPAVe5o45z8d 4ZtHKpJSe9APBjDYi1JKBWWq0dqR/o7BWgxasoqdZ/xs2WwufKt+4P7YMtSRVXfo QyW4f4c2R5QX7ITfYZpNvMYgk6Bd1eoqZzwAUNoXP8urOUEOqse3/3V7ZbFAivCO V8CPZDhDE3mcC0nM1RxlBmeBbLAWRpr+JLcasEfYJS82wet3C/9HQCwB2UUZ+MKQ 3I+Os6k6y8qZnfYHFeL5CiPW/oq2SWukykrFYKdLs0RwP13Ekaj5pR43xOj9IGTP lVu1pcN1sZWxqT5Q3XyilEZTeaTt8bseScJuEm2fCrBrSX+H7ioOwlteM9UGfrzE tDjIeZQcyTwT7/54cNQzhyuw1mF8G51YZqmXfTLb+wgblK8ZgyvlA9y1DzONpiDA w08+TTc3X6r6zM1Sd06PSyRauiGwIO1kouEN22UewTmQmRmsrTX8OOm4lw8ZXbcX xPwMHl60Np3dYYzNawFEkswKHwVPXyvmMtJGsn/zZtwdozT78k24nkKz1aClt+td M1IyQjCWRdV052zBQ8EM+2iFfPbT9EfMKiIIPsZAxOVhpztpjv4= =vtaC -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.17-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.17-rc1 The vast majority of this contains various updates and cleanups to the Tegra device trees that will eventually help validate all of them using the dt-schema infrastructure. Another notable chunk of this contains additional Tegra234 support as well as support for the new Jetson AGX Orin Developer Kit. * tag 'tegra-for-5.17-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (47 commits) arm64: tegra: Add host1x hotflush reset on Tegra210 arm64: tegra: Hook up MMC and BPMP to memory controller arm64: tegra: Add memory controller on Tegra234 arm64: tegra: Add EMC general interrupt on Tegra194 arm64: tegra: Update SDMMC4 speeds for Tegra194 arm64: tegra: Add dma-coherent for Tegra194 VIC arm64: tegra: Rename Ethernet PHY nodes arm64: tegra: Remove unused only-1-8-v properties arm64: tegra: Sort Tegra210 XUSB clocks correctly arm64: tegra: Add missing TSEC properties on Tegra210 arm64: tegra: jetson-nano: Remove extra PLL power supplies for PCIe and XUSB arm64: tegra: smaug: Remove extra PLL power supplies for XUSB arm64: tegra: jetson-tx1: Remove extra PLL power supplies for PCIe and XUSB arm64: tegra: Rename GPIO hog nodes to match schema arm64: tegra: Remove unsupported regulator properties arm64: tegra: Rename TCU node to "serial" arm64: tegra: Remove undocumented Tegra194 PCIe "core_m" clock arm64: tegra: Drop unused properties for Tegra194 PCIe arm64: tegra: Fix Tegra194 HSP compatible string arm64: tegra: Drop unsupported nvidia,lpdr property ... Link: https://lore.kernel.org/r/20211217162253.1801077-4-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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bef4460b85 |
gpio: msc313: Code clean ups
- Remove the unneeded assignment of ret before returning it. - Remove an unneeded blank line Signed-off-by: Daniel Palmer <daniel@0x0f.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> |
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e82513696e |
dt-bindings: gpio: msc313: Add offsets for ssd20xd
Add the gpio offsets for the SSD201 and SSD202D chips. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> |
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8e6458cd8c |
dt-bindings: gpio: msc313: Add compatible for ssd20xd
Add a compatible string for "ssd20xd" for the SigmaStar SSD201 and SSD202D chips. These chips are the same die with different memory bonded so they don't need their own strings. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> |
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b87cd3759d |
dt-bindings: Changes for v5.17-rc1
This contains a bunch of json-schema conversions for various Tegra- related DT bindings and additions for new SoC and board support. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmG8sRoTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUpLD/9aTWMH3DhMh2uKpOOt8TOdNiZXLqec GLXFoA3jHNHxEcwOXU6or8Hg4ipZnYgN2tspu2qpI+OvgwsoZcJqu8WAfH+fS2vv 950OmjAdKBTQhiOO1eSo86Kq00orE6TdMQ3NfTUqEKKcjbiAruy+ojuDfFRoutP+ UCe7Vl8CMi++MFmvyKBLu2GoDKb2JoKtoabiCxNwchZH3acgWFMfxeLBWNBj6HqH W7h+uld9MTg1rEZ7P7ZGspiXh9Nzt8e3e2un7j24L0qDI+s8Ur4XOf+Fms4aAMXc Pbme+q4DaA4xcFXVd5kyAKK1f6kYNVNZBHjKMVuPR4zjK4vADAZ2SZ0hFc3pE7hB rZtjwp4TphuwGrwNoXE4koi04GZStwnvp/Wr4BlCSyycY2H1UxMHHgMDWLA4WVVw JM+9uvjvCe0oE7x6+l4usWMVJrQljWH3IU5w4SXyzowYu5cvbWFhqRieFcg8iDbF CnGJGorq6bKJExiIyWtiRR4+m1TGsBq2cNUb1A0qgUTrMq6O2R4AiqSe45wDYSlQ z1zON1LILctiQfyCM2vsDLOe4AEyitzQkRPS9zo7Jn6dPnf9k3knpTDdyDS7vU2A juR3JOTdHuZ6jNBu5ykJbr3EN54D9nXHEGEl5ToHkahXEpJIC5haQOkRYU+OxER0 C+gWIEJcroJkjA== =aSMg -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAlSQACgkQmmx57+YA GNkY/g//Wc6o+0wNZ8DBGSvI/3spHcNdSeIFwprmMJyBd1ho30kDL+jBW+5bYekT 5X7GC7E/GkbxfvePQkZtS5+qFFdOV5qtQdjLEf2bQc/RuErnwnLttLBTFQpuBNHh VFjB+KHkEGtGFjjJ6CCnz57M5m+4NBWpIBwtubEygWhopCAb6as/dvi3F6Gso4lq xUhRe7Gx7LiJeqJhQqhGTgLo50oBQOHbXsIKEMuwXDMuhsQnpWVq3srJPr6pfgZi Q4cgE7GTKCe2TE7wDk9wKB5ptK6hntXswN51tFEGZk/5PNjot+64LzIRQ47CjpGm nisGWyT86ksaVZnXZlRvynbedWasrXITL76ccadbF4vqZGe9G07kw5N+i/t05DeN TkvXSBe+4e6q6zAOzrUUCP59R7X+sgC8phYj8al8We7i+Prn5IX+a4Glm4wiOMVv n9j9yRr/YPDrLVDjmqIhESzSmq5IZucbuqi7CW+TeaKrILlMaYcWuxXdAd8H9Ite krT4RxSkM+DJCW0OGIpYH9EtynHpf1HGhlP05wmrSa+quWa8h7WBCS2D9lFk4RU3 1cqV1qHLqL+HctxP0LGS2ajT1sUwkgoshijNlknmlwQW+Wzqu56J1H/+toLrH1XK 20ZALOao6CN344n2A//XVOk0udBShg93KmvTLhv2HQ4SIK5Jlwg= =acJz -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.17-rc1 This contains a bunch of json-schema conversions for various Tegra- related DT bindings and additions for new SoC and board support. * tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits) media: dt: bindings: tegra-vde: Document OPP and power domain media: dt: bindings: tegra-vde: Convert to schema dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D dt-bindings: host1x: Document OPP and power domain properties dt-bindings: clock: tegra-car: Document new clock sub-nodes dt-bindings: ARM: tegra: Document Pegatron Chagall dt-bindings: ARM: tegra: Document ASUS Transformers dt-bindings: usb: tegra-xudc: Document interconnects and iommus properties dt-bindings: serial: Document Tegra234 TCU dt-bindings: serial: tegra-tcu: Convert to json-schema dt-bindings: thermal: tegra186-bpmp: Convert to json-schema dt-bindings: firmware: tegra: Convert to json-schema dt-bindings: tegra: pmc: Convert to json-schema dt-bindings: serial: 8250: Document Tegra234 UART dt-bindings: mmc: tegra: Document Tegra234 SDHCI dt-bindings: fuse: tegra: Document Tegra234 FUSE dt-bindings: fuse: tegra: Convert to json-schema dt-bindings: rtc: tegra: Document Tegra234 RTC dt-bindings: rtc: tegra: Convert to json-schema dt-bindings: mailbox: tegra: Document Tegra234 HSP ... Link: https://lore.kernel.org/r/20211217162253.1801077-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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9593bdfa1d |
Samsung SoC drivers changes for v5.17
1. Exynos ChipID: add Exynos7885 support.
2. Exynos PMU: add Exynos850 support.
3. Minor bindings cleanup.
4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
a shared IP block between I2C, UART/serial and SPI. Basically one has
to choose which feature the USI block will support and later the
regular I2C/serial/SPI driver will bind and work.
This merges also one commit with dt-binding headers from my dts64
pull request.
Together with a future serial driver change, this will break the ABI.
Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards
Why: To properly and efficiently support the USI with new hierarchy
of USI-{serial,SPI,I2C} devicetree nodes.
Rationale:
Recently added serial and USI support was short-sighted and did not
allow to smooth support of other features (SPI and I2C). Adding
support for USI-SPI and USI-I2C would effect in code duplication.
Adding support for different USI versions (currently supported is
USIv2 but support for v1 is planned) would cause even more code
duplication and create a solution difficult to maintain.
Since USI-serial and ExynosAutov9 have been added recently, are
considered fresh development features and there are no supported
products using them, the code/solution is being refactored in
non-backwards compatible way. The compatibility is not broken yet.
It will be when serial driver changes are accepted.
The ABI break was discussed with only known users of ExynosAutov9 and
received their permission.
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Merge tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/drivers
Samsung SoC drivers changes for v5.17
1. Exynos ChipID: add Exynos7885 support.
2. Exynos PMU: add Exynos850 support.
3. Minor bindings cleanup.
4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
a shared IP block between I2C, UART/serial and SPI. Basically one has
to choose which feature the USI block will support and later the
regular I2C/serial/SPI driver will bind and work.
This merges also one commit with dt-binding headers from my dts64
pull request.
Together with a future serial driver change, this will break the ABI.
Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards
Why: To properly and efficiently support the USI with new hierarchy
of USI-{serial,SPI,I2C} devicetree nodes.
Rationale:
Recently added serial and USI support was short-sighted and did not
allow to smooth support of other features (SPI and I2C). Adding
support for USI-SPI and USI-I2C would effect in code duplication.
Adding support for different USI versions (currently supported is
USIv2 but support for v1 is planned) would cause even more code
duplication and create a solution difficult to maintain.
Since USI-serial and ExynosAutov9 have been added recently, are
considered fresh development features and there are no supported
products using them, the code/solution is being refactored in
non-backwards compatible way. The compatibility is not broken yet.
It will be when serial driver changes are accepted.
The ABI break was discussed with only known users of ExynosAutov9 and
received their permission.
* tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: soc: samsung: keep SoC driver bindings together
soc: samsung: Add USI driver
dt-bindings: soc: samsung: Add Exynos USI bindings
soc: samsung: exynos-pmu: Add Exynos850 support
dt-bindings: samsung: pmu: Document Exynos850
soc: samsung: exynos-chipid: add Exynos7885 SoC support
soc: samsung: exynos-chipid: describe which SoCs go with compatibles
Link: https://lore.kernel.org/r/20211220115405.30434-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
|
|
87e1287614 |
i.MX drivers update for 5.17:
- A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add i.MX8MN display related domain support. - Add optional continuous burst clock support for imx-weim bus driver. - Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and MIX domain. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9dygUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM7+jwgAle7/Po7Qs0JVrUwkJOWAjNxveXjv keEC5o+svPOLIToX1lA+bY2CKlok2n6IIiEkpbgc+C+prTip0zJnJUFFHxuOeMkl +/EWTthCAddLwXCdmU6c5HSw8XJ9rkH3YDvd46GkPnZuUiZVVmTYkuZQ25qCbPpE f1kCg2RNVruZAOYHmMsoU+WMH3q40dvGSDVXbcHpNZ19qHooUyk/4jcXGlBJKXDo iGosWLdqMy0vbK4cWFzorPFyTpaF1qq/o7AppfexT1h0f6aLnuKnBA5JXY4y4bvd e+6EZ0VwvtdZBqMNaZLHqltCVA/Y0q2gXGryKUM6n7mGdv/LYictLHPudA== =WKrF -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAjj4ACgkQmmx57+YA GNlesQ/9HT8YKAUTsFRYbzKaK0tduZX9eFS8kIF6NlhTqD5IIYhwG4zZGhezRBdM Xt1DztCKqI5/okIn5mtHa/nPOoXd8mElivqt+z/rNIvdB+QkeVbCAOQvHUXeNS1F +sy8PTHLLGZNOGWGzKB4bFtJnc6yawwjz4EukG59cnC+AUePdo3DTT7Xnhf45j+j SSYdG2wgcQ5OW9okKov+AcoupFosrC3Zcuswf2lPcxOfZY0x6yalXXfmerRUZR+g JKTA3bFVLBG2o7nHcJp9ePh0K03+SfaaT5sSAbFm1DxL4hhtcPQJ2uq7I1kVBWKh 8gBAy5Q+dNNZI/OQxM5TGB3EiQ20qBEdkxDxW2bUwAuG+Qyazgv5gRp5doU7FQnP Kl2f3TkM6/KRJNT3RytesTBSynisC9b4BuzpgFtfCBjK4/LEZSzSG07KHhP+k3pT b0FWQlw9+Rvj/stChWZgVRC6G3ALi7NYf5NLrGhsKjEdrAYBHwoh8OniwI4NyqdK 14qWkPb9ctvh6J1IGQ7c2qG+iXSMc9oogG7dmb9Vas2RI/tMeEOJSWdmEY6TZbSP 40e3Wews2RlU+lT8291Kuq2Dyj0YbK7dZ38ymy9cVHKvixr5QUEHxkJzICcDPqPQ rLdy/VwoSSDqkgNGcdXDdestnEXK7xvhgl/u3zT5RkcxfYxA3Q0= =74GG -----END PGP SIGNATURE----- Merge tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers i.MX drivers update for 5.17: - A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add i.MX8MN display related domain support. - Add optional continuous burst clock support for imx-weim bus driver. - Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and MIX domain. * tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled bus: imx-weim: optionally enable continuous burst clock soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active soc: imx: gpcv2: Synchronously suspend MIX domains Link: https://lore.kernel.org/r/20211218071427.26745-1-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
|
a904c5f099 |
AT91 SoC #1 for 5.17:
- one low priority fix about of_node_put() missing in PM code -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ5TRCVIBiyi/S+BG4fOrpwrNPNDAUCYby88gAKCRAfOrpwrNPN DEAwAP9ENOAS+ILV7PRbsQNnMc613Bej+eFR8NbmrEwRV79OYgD6A/Sjk4lP1DsU I71q6zvy7yEinVpzScHW3LBJS1aO0As= =mgse -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAjfcACgkQmmx57+YA GNmKag//TMpgrjFEUYfZpoFnqfFFEsTIiRHuZEOj+XjBxrRaED3W6J197EkzwqtU EUzN5Kit0mB3FGVaSVhoQS/9wVzXhF9Q1dmNb50piKu60ItqEyaPDww9IrKM7WLZ xR+zxRgIfgJiS/qSjhWWdd7NgrqJq5uRmVqmeO5My+WJW04Hq1PIMeBouNBGw0Vp Tb7C7JYJvr1myiHA2srf/+R9/fk54KSk+vhOY12PZ9pdAk1+hsCy5Cdt+gDtQe1S 5INVSqnFuV0Ks6vfjx6QvgALIIuBNRXOy1bR6nIBAywBAaki/XALb81UBr8c6+Zo 1AUCZzn0QBoZG6seZ3UNfbgjRzntvxPfbJgRZeElg0gcUS6wbBNaWFVvb4Vqlnt4 HmjXRqy0qdoKcE3JBYlWKnvdFa1RHQ8HOTJ4Z2FcVILfJ3//AA4KKjvHm2QEnbDc UXSNMIRmtGOZ34QzGeoYqCZcjgwb6Vo6KdDSZnO+LK28thhq0garMsCvVEyI7f80 tmgbb5krlFmPmXHlONMrJ0aqODIt1pxEA4BciKBy/zx3L1wJIo88pTJ/SDja/0qz BmD1oBmoTtxu9hJJSVI16BVqZ1k5jZ2fcGwAF05hsV50YV/l+35ALa59rB7HMBrf qD6LRlmyGRhVl21ExwW27gIEwQz0vVtlwu6hLJHu7bdqKlEu+dc= =0PPf -----END PGP SIGNATURE----- Merge tag 'at91-soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/drivers AT91 SoC #1 for 5.17: - one low priority fix about of_node_put() missing in PM code * tag 'at91-soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: Add of_node_put() before goto Link: https://lore.kernel.org/r/20211217164134.28566-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
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|
cd448b24c6 |
Merge branch irq/misc-5.17 into irq/irqchip-next
* irq/misc-5.17: : . : Misc irqchip fixes: : : - Disable GICv4.1 RD's VPE table at boot time to avoid RAS errors : - Fix Ingenic TCU's u32/unsigned long abuse : - Some GICv2m constifying : - Mark imx_gpcv2_instance as __ro_after_init : - Enable a few missing IRQs on Spear : - Conversion to platform_get_irq_optional() for the Renesas irqchips : . irqchip/renesas-intc-irqpin: Use platform_get_irq_optional() to get the interrupt irqchip/renesas-irqc: Use platform_get_irq_optional() to get the interrupt irqchip/gic-v4: Disable redistributors' view of the VPE table at boot time irqchip/ingenic-tcu: Use correctly sized arguments for bit field irqchip/gic-v2m: Add const to of_device_id irqchip/imx-gpcv2: Mark imx_gpcv2_instance with __ro_after_init irqchip/spear-shirq: Add support for IRQ 0..6 Signed-off-by: Marc Zyngier <maz@kernel.org> |
||
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|
dda0190d7f |
KVM: arm64: Fix comment on barrier in kvm_psci_vcpu_on()
The barrier is there for power_off rather than power_state.
Probably typo in commit
|
||
|
|
a080e323be |
KVM: arm64: Fix comment for kvm_reset_vcpu()
The comment for kvm_reset_vcpu() refers to the sysreg table as
being the table above, probably because of the code extracted at
commit
|
||
|
|
500ca5241b |
KVM: arm64: Use defined value for SCTLR_ELx_EE
Replace the hardcoded value with the existing definition. No functional change intended. Signed-off-by: Fuad Tabba <tabba@google.com> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211208192810.657360-1-tabba@google.com |
||
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|
7e28d0b267 |
drm/i915/adl-n: Enable ADL-N platform
Adding PCI device ids and enabling ADL-N platform. ADL-N from i915 point of view is subplatform of ADL-P. BSpec: 68397 Changes since V2: - Added version log history Changes since V1: - replace IS_ALDERLAKE_N with IS_ADLP_N - Jani Nikula Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20211210051802.4063958-1-tejaskumarx.surendrakumar.upadhyay@intel.com |
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484730e586 |
parisc: Clear stale IIR value on instruction access rights trap
When a trap 7 (Instruction access rights) occurs, this means the CPU couldn't execute an instruction due to missing execute permissions on the memory region. In this case it seems the CPU didn't even fetched the instruction from memory and thus did not store it in the cr19 (IIR) register before calling the trap handler. So, the trap handler will find some random old stale value in cr19. This patch simply overwrites the stale IIR value with a constant magic "bad food" value (0xbaadf00d), in the hope people don't start to try to understand the various random IIR values in trap 7 dumps. Noticed-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de> |
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b118863d2f |
soc/tegra: Changes for v5.17-rc1
This set of changes contains some preparatory work that is shared by several branches and trees to support DVFS via power domains. There's also a bit of cleanup and improvements to reboot on chips that use PSCI. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmG8sGYTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zocR8EACMoED5WAU1C+No9Bd9c7h2iru4LhUg wnobzGX0ZOPn/O3873rBqIiZDrJoVDJvqbh761pt35BigqJrAcegQaoMgBsvTl11 SAg6EpaQ2a/O7bPRj7V58XjxjlhoK+638PAuk7mzIDPibpnfZaNdJgI59/BEVVCd BQ7452z3LnPh9cFzCeqCMhvoJ2kTNgJvjGZ/EfOJE+tocwT+Fx83zzfM1kyflRr3 2yBJwSi3k/D5KK38OT+uPvHqduqsci/aTel2AlLtNvFJ2iPg7ax3G6ak2MHgq/ac noYL1kIiCBx3QQ3npiBKGnq2D1JBzX2mbbJxZrcGYZDW3D+2z1xPPtGNGCPiRMYQ DSnR3AoRegKQZn6Jy+b44kLn0NhrI58qR/PXCzpggl+yCnIAAaBObr+bSYYxlr/u sO189kVg1IYIILime9a5nxUvYalWSgXB/sUqQXjfJIMsDAHYmws3QqNw7Z628wxx 2ddWSKGrjkq+n3z0uR8xiQTdTGqeagYK+2yE4aVTfv65lsjBIlU75FhgsJUaGpBL 5Y2sSGB6ysPdxtoH0ol+vckZq3tSyZbqgoty5dOOHoEm+YeBSyXjaZwYTaLYIgd+ cUNKEsOBul1ZbT/ca2pEt+yTrKGrYgI7maa5ocwEYrvp4QFkHcNts5UmEwp+22pQ 8JqmzeJH92E4LA== =f+T3 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAh0oACgkQmmx57+YA GNkwHhAAo+oITzjXFoHwCw97u6xOv9CxH6OFRSz2kbxBGHtniGx/lg7cxTIif4HX 4bnvUv3nQqoRMJ2hlGXp0QCjfXVTJXnk3Nduf74aEN2fkclFuR/PBOl4py0imubs 9ZVXpSSB4VSpXrtujAnlhO4nEEiFR0rXSTcJbUz3hqjVgatRm9pAGZmU0u5x/K0M idM46H+dDInWb53n/eJaj+GHoAJ18+yH62ck1OJqGSitaAfalGMFKRFHIqu8K95q ifadcrbFJo0711KKPRwgQPVgB1j7zFOjkaHDR7CjrsToRSVWbFwCgC6+nVg5X74h /wjvKq61pNvK7HavYIXWeUCzDqGbH404OjaksIYSw2Te2mJTOA0qOqh0edi6w6Y2 kVUcnqM5zt/TYaXsZdlxX1lTItAOQiV0yEuq/zPYBJ0ecgvhKOR0GHUseVsfVPrz NxEZGEAgkSrHbSITd1arPgOuvL9FwlqsmWi6ZV6n+o/hiYlz9G2YoHK2tcaKd8wX FqmgtKOPnoYg3h+7PoSahNLWEbEZEt8v6w6ezERm9U+ntl/sYISk1OCwwHCyqpfP hA7J9GlK3f2aYmE0eT828bov1PIFudpdgL0HFadEAKdpfn3G0kYf0wQ2UZ6J+XrW ZbcWhPzSTjKIDLWyrbRYu5Zo7I8uBVAA/eFopMRGbbn27ZgjrsM= =gToI -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers soc/tegra: Changes for v5.17-rc1 This set of changes contains some preparatory work that is shared by several branches and trees to support DVFS via power domains. There's also a bit of cleanup and improvements to reboot on chips that use PSCI. * tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Rename core power domain soc/tegra: pmc: Rename 3d power domains soc/tegra: regulators: Prepare for suspend soc/tegra: fuse: Use resource-managed helpers soc/tegra: fuse: Reset hardware soc/tegra: pmc: Add reboot notifier soc/tegra: Don't print error message when OPPs not available Link: https://lore.kernel.org/r/20211217162253.1801077-1-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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ab1ef34416 |
KVM: selftests: Add test to verify TRIPLE_FAULT on invalid L2 guest state
Add a selftest to attempt to enter L2 with invalid guests state by
exiting to userspace via I/O from L2, and then using KVM_SET_SREGS to set
invalid guest state (marking TR unusable is arbitrary chosen for its
relative simplicity).
This is a regression test for a bug introduced by commit
|
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|
0ff29701ff |
KVM: VMX: Fix stale docs for kvm-intel.emulate_invalid_guest_state
Update the documentation for kvm-intel's emulate_invalid_guest_state to
rectify the description of KVM's default behavior, and to document that
the behavior and thus parameter only applies to L1.
Fixes:
|
||
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|
cd0e615c49 |
KVM: nVMX: Synthesize TRIPLE_FAULT for L2 if emulation is required
Synthesize a triple fault if L2 guest state is invalid at the time of
VM-Enter, which can happen if L1 modifies SMRAM or if userspace stuffs
guest state via ioctls(), e.g. KVM_SET_SREGS. KVM should never emulate
invalid guest state, since from L1's perspective, it's architecturally
impossible for L2 to have invalid state while L2 is running in hardware.
E.g. attempts to set CR0 or CR4 to unsupported values will either VM-Exit
or #GP.
Modifying vCPU state via RSM+SMRAM and ioctl() are the only paths that
can trigger this scenario, as nested VM-Enter correctly rejects any
attempt to enter L2 with invalid state.
RSM is a straightforward case as (a) KVM follows AMD's SMRAM layout and
behavior, and (b) Intel's SDM states that loading reserved CR0/CR4 bits
via RSM results in shutdown, i.e. there is precedent for KVM's behavior.
Following AMD's SMRAM layout is important as AMD's layout saves/restores
the descriptor cache information, including CS.RPL and SS.RPL, and also
defines all the fields relevant to invalid guest state as read-only, i.e.
so long as the vCPU had valid state before the SMI, which is guaranteed
for L2, RSM will generate valid state unless SMRAM was modified. Intel's
layout saves/restores only the selector, which means that scenarios where
the selector and cached RPL don't match, e.g. conforming code segments,
would yield invalid guest state. Intel CPUs fudge around this issued by
stuffing SS.RPL and CS.RPL on RSM. Per Intel's SDM on the "Default
Treatment of RSM", paraphrasing for brevity:
IF internal storage indicates that the [CPU was post-VMXON]
THEN
enter VMX operation (root or non-root);
restore VMX-critical state as defined in Section 34.14.1;
set to their fixed values any bits in CR0 and CR4 whose values must
be fixed in VMX operation [unless coming from an unrestricted guest];
IF RFLAGS.VM = 0 AND (in VMX root operation OR the
“unrestricted guest” VM-execution control is 0)
THEN
CS.RPL := SS.DPL;
SS.RPL := SS.DPL;
FI;
restore current VMCS pointer;
FI;
Note that Intel CPUs also overwrite the fixed CR0/CR4 bits, whereas KVM
will sythesize TRIPLE_FAULT in this scenario. KVM's behavior is allowed
as both Intel and AMD define CR0/CR4 SMRAM fields as read-only, i.e. the
only way for CR0 and/or CR4 to have illegal values is if they were
modified by the L1 SMM handler, and Intel's SDM "SMRAM State Save Map"
section states "modifying these registers will result in unpredictable
behavior".
KVM's ioctl() behavior is less straightforward. Because KVM allows
ioctls() to be executed in any order, rejecting an ioctl() if it would
result in invalid L2 guest state is not an option as KVM cannot know if
a future ioctl() would resolve the invalid state, e.g. KVM_SET_SREGS, or
drop the vCPU out of L2, e.g. KVM_SET_NESTED_STATE. Ideally, KVM would
reject KVM_RUN if L2 contained invalid guest state, but that carries the
risk of a false positive, e.g. if RSM loaded invalid guest state and KVM
exited to userspace. Setting a flag/request to detect such a scenario is
undesirable because (a) it's extremely unlikely to add value to KVM as a
whole, and (b) KVM would need to consider ioctl() interactions with such
a flag, e.g. if userspace migrated the vCPU while the flag were set.
Cc: stable@vger.kernel.org
Signed-off-by: Sean Christopherson <seanjc@google.com>
Message-Id: <20211207193006.120997-3-seanjc@google.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
|
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a80dfc0259 |
KVM: VMX: Always clear vmx->fail on emulation_required
Revert a relatively recent change that set vmx->fail if the vCPU is in L2
and emulation_required is true, as that behavior is completely bogus.
Setting vmx->fail and synthesizing a VM-Exit is contradictory and wrong:
(a) it's impossible to have both a VM-Fail and VM-Exit
(b) vmcs.EXIT_REASON is not modified on VM-Fail
(c) emulation_required refers to guest state and guest state checks are
always VM-Exits, not VM-Fails.
For KVM specifically, emulation_required is handled before nested exits
in __vmx_handle_exit(), thus setting vmx->fail has no immediate effect,
i.e. KVM calls into handle_invalid_guest_state() and vmx->fail is ignored.
Setting vmx->fail can ultimately result in a WARN in nested_vmx_vmexit()
firing when tearing down the VM as KVM never expects vmx->fail to be set
when L2 is active, KVM always reflects those errors into L1.
------------[ cut here ]------------
WARNING: CPU: 0 PID: 21158 at arch/x86/kvm/vmx/nested.c:4548
nested_vmx_vmexit+0x16bd/0x17e0
arch/x86/kvm/vmx/nested.c:4547
Modules linked in:
CPU: 0 PID: 21158 Comm: syz-executor.1 Not tainted 5.16.0-rc3-syzkaller #0
Hardware name: Google Google Compute Engine/Google Compute Engine, BIOS Google 01/01/2011
RIP: 0010:nested_vmx_vmexit+0x16bd/0x17e0 arch/x86/kvm/vmx/nested.c:4547
Code: <0f> 0b e9 2e f8 ff ff e8 57 b3 5d 00 0f 0b e9 00 f1 ff ff 89 e9 80
Call Trace:
vmx_leave_nested arch/x86/kvm/vmx/nested.c:6220 [inline]
nested_vmx_free_vcpu+0x83/0xc0 arch/x86/kvm/vmx/nested.c:330
vmx_free_vcpu+0x11f/0x2a0 arch/x86/kvm/vmx/vmx.c:6799
kvm_arch_vcpu_destroy+0x6b/0x240 arch/x86/kvm/x86.c:10989
kvm_vcpu_destroy+0x29/0x90 arch/x86/kvm/../../../virt/kvm/kvm_main.c:441
kvm_free_vcpus arch/x86/kvm/x86.c:11426 [inline]
kvm_arch_destroy_vm+0x3ef/0x6b0 arch/x86/kvm/x86.c:11545
kvm_destroy_vm arch/x86/kvm/../../../virt/kvm/kvm_main.c:1189 [inline]
kvm_put_kvm+0x751/0xe40 arch/x86/kvm/../../../virt/kvm/kvm_main.c:1220
kvm_vcpu_release+0x53/0x60 arch/x86/kvm/../../../virt/kvm/kvm_main.c:3489
__fput+0x3fc/0x870 fs/file_table.c:280
task_work_run+0x146/0x1c0 kernel/task_work.c:164
exit_task_work include/linux/task_work.h:32 [inline]
do_exit+0x705/0x24f0 kernel/exit.c:832
do_group_exit+0x168/0x2d0 kernel/exit.c:929
get_signal+0x1740/0x2120 kernel/signal.c:2852
arch_do_signal_or_restart+0x9c/0x730 arch/x86/kernel/signal.c:868
handle_signal_work kernel/entry/common.c:148 [inline]
exit_to_user_mode_loop kernel/entry/common.c:172 [inline]
exit_to_user_mode_prepare+0x191/0x220 kernel/entry/common.c:207
__syscall_exit_to_user_mode_work kernel/entry/common.c:289 [inline]
syscall_exit_to_user_mode+0x2e/0x70 kernel/entry/common.c:300
do_syscall_64+0x53/0xd0 arch/x86/entry/common.c:86
entry_SYSCALL_64_after_hwframe+0x44/0xae
Fixes:
|
||
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|
577e022b7b |
selftests: KVM: Fix non-x86 compiling
Attempting to compile on a non-x86 architecture fails with
include/kvm_util.h: In function ‘vm_compute_max_gfn’:
include/kvm_util.h:79:21: error: dereferencing pointer to incomplete type ‘struct kvm_vm’
return ((1ULL << vm->pa_bits) >> vm->page_shift) - 1;
^~
This is because the declaration of struct kvm_vm is in
lib/kvm_util_internal.h as an effort to make it private to
the test lib code. We can still provide arch specific functions,
though, by making the generic function symbols weak. Do that to
fix the compile error.
Fixes:
|
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c5063551bf |
KVM: x86: Always set kvm_run->if_flag
The kvm_run struct's if_flag is a part of the userspace/kernel API. The
SEV-ES patches failed to set this flag because it's no longer needed by
QEMU (according to the comment in the source code). However, other
hypervisors may make use of this flag. Therefore, set the flag for
guests with encrypted registers (i.e., with guest_state_protected set).
Fixes:
|
||
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3a0f64de47 |
KVM: x86/mmu: Don't advance iterator after restart due to yielding
After dropping mmu_lock in the TDP MMU, restart the iterator during tdp_iter_next() and do not advance the iterator. Advancing the iterator results in skipping the top-level SPTE and all its children, which is fatal if any of the skipped SPTEs were not visited before yielding. When zapping all SPTEs, i.e. when min_level == root_level, restarting the iter and then invoking tdp_iter_next() is always fatal if the current gfn has as a valid SPTE, as advancing the iterator results in try_step_side() skipping the current gfn, which wasn't visited before yielding. Sprinkle WARNs on iter->yielded being true in various helpers that are often used in conjunction with yielding, and tag the helper with __must_check to reduce the probabily of improper usage. Failing to zap a top-level SPTE manifests in one of two ways. If a valid SPTE is skipped by both kvm_tdp_mmu_zap_all() and kvm_tdp_mmu_put_root(), the shadow page will be leaked and KVM will WARN accordingly. WARNING: CPU: 1 PID: 3509 at arch/x86/kvm/mmu/tdp_mmu.c:46 [kvm] RIP: 0010:kvm_mmu_uninit_tdp_mmu+0x3e/0x50 [kvm] Call Trace: <TASK> kvm_arch_destroy_vm+0x130/0x1b0 [kvm] kvm_destroy_vm+0x162/0x2a0 [kvm] kvm_vcpu_release+0x34/0x60 [kvm] __fput+0x82/0x240 task_work_run+0x5c/0x90 do_exit+0x364/0xa10 ? futex_unqueue+0x38/0x60 do_group_exit+0x33/0xa0 get_signal+0x155/0x850 arch_do_signal_or_restart+0xed/0x750 exit_to_user_mode_prepare+0xc5/0x120 syscall_exit_to_user_mode+0x1d/0x40 do_syscall_64+0x48/0xc0 entry_SYSCALL_64_after_hwframe+0x44/0xae If kvm_tdp_mmu_zap_all() skips a gfn/SPTE but that SPTE is then zapped by kvm_tdp_mmu_put_root(), KVM triggers a use-after-free in the form of marking a struct page as dirty/accessed after it has been put back on the free list. This directly triggers a WARN due to encountering a page with page_count() == 0, but it can also lead to data corruption and additional errors in the kernel. WARNING: CPU: 7 PID: 1995658 at arch/x86/kvm/../../../virt/kvm/kvm_main.c:171 RIP: 0010:kvm_is_zone_device_pfn.part.0+0x9e/0xd0 [kvm] Call Trace: <TASK> kvm_set_pfn_dirty+0x120/0x1d0 [kvm] __handle_changed_spte+0x92e/0xca0 [kvm] __handle_changed_spte+0x63c/0xca0 [kvm] __handle_changed_spte+0x63c/0xca0 [kvm] __handle_changed_spte+0x63c/0xca0 [kvm] zap_gfn_range+0x549/0x620 [kvm] kvm_tdp_mmu_put_root+0x1b6/0x270 [kvm] mmu_free_root_page+0x219/0x2c0 [kvm] kvm_mmu_free_roots+0x1b4/0x4e0 [kvm] kvm_mmu_unload+0x1c/0xa0 [kvm] kvm_arch_destroy_vm+0x1f2/0x5c0 [kvm] kvm_put_kvm+0x3b1/0x8b0 [kvm] kvm_vcpu_release+0x4e/0x70 [kvm] __fput+0x1f7/0x8c0 task_work_run+0xf8/0x1a0 do_exit+0x97b/0x2230 do_group_exit+0xda/0x2a0 get_signal+0x3be/0x1e50 arch_do_signal_or_restart+0x244/0x17f0 exit_to_user_mode_prepare+0xcb/0x120 syscall_exit_to_user_mode+0x1d/0x40 do_syscall_64+0x4d/0x90 entry_SYSCALL_64_after_hwframe+0x44/0xae Note, the underlying bug existed even before commit |
||
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aade40b627 |
iommu/iova: Temporarily include dma-mapping.h from iova.h
Some users of iova.h still expect that dma-mapping.h is also included. Re-add the include until these users are updated to fix compile failures in the iommu tree. Acked-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/20211220123448.19996-1-joro@8bytes.org Signed-off-by: Joerg Roedel <jroedel@suse.de> |
||
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e9a3b57efd |
ASoC: codec: tlv320adc3xxx: New codec driver
New codec driver for Texas Instruments TLV320ADC3001 and TLV320ADC3101 audio ADCs. Signed-off-by: Ricard Wanderlof <ricardw@axis.com> Link: https://lore.kernel.org/r/alpine.DEB.2.21.2112151801370.27889@lap5cg0092dnk.se.axis.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
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|
e047d03726 |
ASoC: tlv320adc3xxx: New codec bindings
DT bindings for Texas Instruments TLV320ADC3001 and TLV320ADC3101 audio ADCs. Signed-off-by: Ricard Wanderlof <ricardw@axis.com> Link: https://lore.kernel.org/r/alpine.DEB.2.21.2112151759170.27889@lap5cg0092dnk.se.axis.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
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11a95c583c |
ASoC: sunxi: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-23-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
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|
efc162cbd4 |
ASoC: stm: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-22-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
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|
27c6eaebcf |
ASoC: samsung: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-21-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
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b3a66d22a2 |
ASoC: rockchip: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-20-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
|
|
ab6c3e68ab |
ASoC: qcom: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-19-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
|
|
7a17f6a95a |
ASoC: mxs: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-18-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
|
|
2ff4e003e8 |
ASoC: meson: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-17-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
|
|
ef12f373f2 |
ASoC: img: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-16-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
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|
7a0299e13b |
ASoC: generic: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-15-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
|
|
2e6f557ca3 |
ASoC: fsl: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-14-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |
||
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|
88fb6da3f4 |
ASoC: ti: Use dev_err_probe() helper
Use the dev_err_probe() helper, instead of open-coding the same operation. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/20211214020843.2225831-13-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org> |