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1,169,205 commits

Author SHA1 Message Date
Chen Lifu
3548eda8ae x86/tsc: Make art_related_clocksource static
The symbol is not used outside of the file, so mark it static.

Fixes the following warning:

arch/x86/kernel/tsc.c:53:20: warning:
	symbol 'art_related_clocksource' was not declared. Should it be static?

Signed-off-by: Chen Lifu <chenlifu@huawei.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20220823021821.3052159-1-chenlifu@huawei.com
2022-10-17 16:20:48 +02:00
ye xingchen
8be3f96ced timers: Replace in_irq() with in_hardirq()
Replace the obsolete and ambiguous macro in_irq() with new
macro in_hardirq().

Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: John Stultz <jstultz@google.com>
Link: https://lore.kernel.org/r/20221012012629.334966-1-ye.xingchen@zte.com.cn
2022-10-17 16:00:04 +02:00
Dan Carpenter
ec0286dce7 counter: ti-ecap-capture: fix IS_ERR() vs NULL check
The devm_counter_alloc() function returns NULL on error.  It doesn't
return error pointers.

Fixes: 4e2f42aa00 ("counter: ti-ecap-capture: capture driver support for ECAP")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Julien Panis <jpanis@baylibre.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/Y0bUbZvfDJHBG9C6@kili/
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2022-10-17 09:51:29 -04:00
William Breathitt Gray
472a148232 counter: Reduce DEFINE_COUNTER_ARRAY_POLARITY() to defining counter_array
A spare warning was reported for drivers/counter/ti-ecap-capture.c::

    sparse warnings: (new ones prefixed by >>)
    >> drivers/counter/ti-ecap-capture.c:380:8: sparse: sparse: symbol 'ecap_cnt_pol_array' was not declared. Should it be static?

    vim +/ecap_cnt_pol_array +380 drivers/counter/ti-ecap-capture.c

       379
     > 380	static DEFINE_COUNTER_ARRAY_POLARITY(ecap_cnt_pol_array, ecap_cnt_pol_avail, ECAP_NB_CEVT);
       381

The first argument to the DEFINE_COUNTER_ARRAY_POLARITY() macro is a
token serving as the symbol name in the definition of a new
struct counter_array structure. However, this macro actually expands to
two statements::

    #define DEFINE_COUNTER_ARRAY_POLARITY(_name, _enums, _length) \
            DEFINE_COUNTER_AVAILABLE(_name##_available, _enums); \
            struct counter_array _name = { \
                    .type = COUNTER_COMP_SIGNAL_POLARITY, \
                    .avail = &(_name##_available), \
                    .length = (_length), \
            }

Because of this, the "static" on line 380 only applies to the first
statement. This patch splits out the DEFINE_COUNTER_AVAILABLE() line
and leaves DEFINE_COUNTER_ARRAY_POLARITY() as a simple structure
definition to avoid issues like this.

Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/all/202210020619.NQbyomII-lkp@intel.com/
Cc: Julien Panis <jpanis@baylibre.com>
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2022-10-17 09:51:29 -04:00
Chang S. Bae
a401f45e38 x86/fpu: Exclude dynamic states from init_fpstate
== Background ==

The XSTATE init code initializes all enabled and supported components.
Then, the init states are saved in the init_fpstate buffer that is
statically allocated in about one page.

The AMX TILE_DATA state is large (8KB) but its init state is zero. And the
feature comes only with the compacted format with these established
dependencies: AMX->XFD->XSAVES. So this state is excludable from
init_fpstate.

== Problem ==

But the buffer is formatted to include that large state. Then, this can be
the cause of a noisy splat like the below.

This came from XRSTORS for the task with init_fpstate in its XSAVE buffer.
It is reproducible on AMX systems when the running kernel is built with
CONFIG_DEBUG_PAGEALLOC=y and CONFIG_DEBUG_PAGEALLOC_ENABLE_DEFAULT=y:

 Bad FPU state detected at restore_fpregs_from_fpstate+0x57/0xd0, reinitializing FPU registers.
 ...
 RIP: 0010:restore_fpregs_from_fpstate+0x57/0xd0
  ? restore_fpregs_from_fpstate+0x45/0xd0
  switch_fpu_return+0x4e/0xe0
  exit_to_user_mode_prepare+0x17b/0x1b0
  syscall_exit_to_user_mode+0x29/0x40
  do_syscall_64+0x67/0x80
  ? do_syscall_64+0x67/0x80
  ? exc_page_fault+0x86/0x180
  entry_SYSCALL_64_after_hwframe+0x63/0xcd

== Solution ==

Adjust init_fpstate to exclude dynamic states. XRSTORS from init_fpstate
still initializes those states when their bits are set in the
requested-feature bitmap.

Fixes: 2308ee57d9 ("x86/fpu/amx: Enable the AMX feature in 64-bit mode")
Reported-by: Lin X Wang <lin.x.wang@intel.com>
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Lin X Wang <lin.x.wang@intel.com>
Link: https://lore.kernel.org/r/20220824191223.1248-4-chang.seok.bae@intel.com
2022-10-17 15:44:25 +02:00
Chang S. Bae
d3e021adac x86/fpu: Fix the init_fpstate size check with the actual size
The init_fpstate buffer is statically allocated. Thus, the sanity test was
established to check whether the pre-allocated buffer is enough for the
calculated size or not.

The currently measured size is not strictly relevant. Fix to validate the
calculated init_fpstate size with the pre-allocated area.

Also, replace the sanity check function with open code for clarity. The
abstraction itself and the function naming do not tend to represent simply
what it does.

Fixes: 2ae996e0c1 ("x86/fpu: Calculate the default sizes independently")
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20220824191223.1248-3-chang.seok.bae@intel.com
2022-10-17 15:44:25 +02:00
Chang S. Bae
c32d7cab57 x86/fpu: Configure init_fpstate attributes orderly
The init_fpstate setup code is spread out and out of order. The init image
is recorded before its scoped features and the buffer size are determined.

Determine the scope of init_fpstate components and its size before
recording the init state. Also move the relevant code together.

Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: neelnatu@google.com
Link: https://lore.kernel.org/r/20220824191223.1248-2-chang.seok.bae@intel.com
2022-10-17 15:44:25 +02:00
Hai Pham
5c1bf1e320 arm64: dts: renesas: white-hawk-cpu: Add QSPI FLASH support
Describe the QSPI FLASH on the White Hawk CPU board.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/c3a01a8de924d6a3fcdb1ee0284544ad2ea5c8ec.1665583435.git.geert+renesas@glider.be
2022-10-17 15:38:49 +02:00
Hai Pham
d5014bede5 arm64: dts: renesas: r8a779g0: Add RPC node
Add a device node for the SPI Multi I/O Bus Controller (RPC-IF) on the
Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/6da7a035d56a943336f68dc0da77a47dba3dd69e.1665583435.git.geert+renesas@glider.be
2022-10-17 15:38:49 +02:00
Takeshi Kihara
34bd9009d9 arm64: dts: renesas: white-hawk-cpu: Add eMMC support
Describe the eMMC on the White Hawk CPU board.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/253cd479e55486dd0d3e3804add405e41c32d53b.1665558371.git.geert+renesas@glider.be
2022-10-17 15:38:49 +02:00
Geert Uytterhoeven
bc7bf9131a arm64: dts: renesas: r8a779g0: Add SDHI node
Add a device node for the SD Card/MMC Interface on the Renesas R-Car V4H
(R8A779G0) SoC.

Based on a patch in the BSP by Takeshi Kihara.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/d2d5cf982a380699483edf7a632441628ee73183.1665558371.git.geert+renesas@glider.be
2022-10-17 15:38:48 +02:00
Lad Prabhakar
c02734d6e4 arm64: dts: renesas: rzg2l: Drop WDT2 nodes
On members of the RZ/G2L family, WDT CH2 is specifically meant to check
the operation of the Cortex-M33 CPU.  Using it from a Cortex-A55 CPU
would result in unexpected behaviour.  Hence drop all WDT2 nodes and
their references from the affected SoC and SoM DTSI files.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20221009230044.10961-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-10-17 15:36:26 +02:00
Linus Walleij
1e15c02cf8 ARM: dts: ux500: Add GPS to the Kyle
This adds the GPS chip to the Kyle device tree.

Link: https://lore.kernel.org/r/20220815203044.468686-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-17 15:05:52 +02:00
Linus Walleij
a26b17fa52 ARM: dts: DBx500 cryp and hash uses power domain
The cryp and hash blocks of the DBx500 uses the VAPE power domain,
the special regulator is a leftover that is not used anymore.

Link: https://lore.kernel.org/r/20220721153610.1053845-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-17 15:05:52 +02:00
Linus Walleij
7341b2c1b9 ARM: dts: ux500: Fix up the Janice NFC chip
The NFC chip in Janice is a PNX544 not PNX547 and it is on
I2C address 0x2b. Fix it up. This is only mounted in Janice
models designated GT-I9070P.

Cc: Stefan Hansson <newbyte@disroot.org>
Link: https://lore.kernel.org/r/20220815193440.388695-1-linus.walleij@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-17 15:05:52 +02:00
Krzysztof Kozlowski
7b7c66ec81 ARM: dts: ste: ux500: align SPI node name with dtschema
The node names should be generic and DT schema expects certain pattern.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220810111037.280959-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-17 15:05:52 +02:00
Damien Le Moal
17cc1ee6e8 ata: ahci_st: Fix compilation warning
If CONFIG_OF is disabled and the ahci_st driver is builtin (or
CONFIG_MODULES is disabled), then using the macro of_match_ptr()
results in the st_ahci_match variable being unused, which generates a
compilation warning and a compilation error if CONFIG_WERROR is enabled.

Fix this by directly assigning st_ahci_match to .of_match_table in the
st_ahci_driver platform driver definition.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2022-10-17 22:01:57 +09:00
FUKAUMI Naoki
849c19d149 arm64: dts: rockchip: keep I2S1 disabled for GPIO function on ROCK Pi 4 series
I2S1 pins are exposed on 40-pin header on Radxa ROCK Pi 4 series.
their default function is GPIO, so I2S1 need to be disabled.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://lore.kernel.org/r/20220924112812.1219-1-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-17 14:17:34 +02:00
Lev Popov
2dcd7e0c82 arm64: dts: rockchip: fix quartz64-a bluetooth configuration
For "Quartz64 Model A" add missing RTS line to the UART interface used by
bluetooth and swap bluetooth host-wakeup and device-wakeup gpio pins to
match the boards physical layout. This changes are necessary to make
bluetooth provided by the wireless module work.

Also set max-speed on the bluetooth device as it's not automatically
detected.

Fixes: b33a22a1e7 ("arm64: dts: rockchip: add basic dts for Pine64 Quartz64-A")
Signed-off-by: Lev Popov <leo@nabam.net>
Link: https://lore.kernel.org/r/20220926125350.64783-1-leo@nabam.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-17 14:16:30 +02:00
Jensen Huang
463be3cb35 arm64: dts: rockchip: add enable-strobe-pulldown to emmc phy on nanopi4
Internal pull-down for strobe line (GRF_EMMCPHY_CON2[9]) was disabled
by commit 8b5c2b45b8, which causes I/O error in HS400 mode.

Tested on NanoPC-T4.

Fixes: 8b5c2b45b8 ("phy: rockchip: set pulldown for strobe line in dts")
Signed-off-by: Jensen Huang <jensenhuang@friendlyarm.com>
Link: https://lore.kernel.org/r/20220928091129.20597-1-jensenhuang@friendlyarm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-17 14:12:40 +02:00
Tom Fitzhenry
a7e6dbd6ac arm64: dts: rockchip: add BT/wifi nodes to Pinephone Pro
Pinephone Pro includes a AzureWave AW-CM256SM wifi (sdio0) and
bt (uart0) combo module, which is based on Cypress
CYP43455 (BCM43455).

The CYP43455 datasheet ("Power-Up Sequence and Timing") documents:
* needing to wait 10ms between consecutive WL_REG_ON toggles
* needing to wait 110ms between power-on and SDIO access.

Signed-off-by: Tom Fitzhenry <tom@tom-fitzhenry.me.uk>
Reviewed-by: Ondřej Jirman <megi@xff.cz>
Link: https://lore.kernel.org/r/20221002092809.451501-1-tom@tom-fitzhenry.me.uk
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-17 14:02:36 +02:00
Chukun Pan
0522cd8112 arm64: dts: rockchip: Add PCIe v3 nodes to rock-3a
Add Nodes to Radxa ROCK3 Model A board to support PCIe v3.

Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://lore.kernel.org/r/20221006152524.502445-3-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-17 13:51:42 +02:00
Chukun Pan
49665ab0ed arm64: dts: rockchip: Add regulator suffix to rock-3a
Add -regulator suffix to regulator names on Radxa ROCK3 Model A
board. This makes the naming more consistent.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Acked-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20221006152524.502445-2-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-17 13:51:42 +02:00
Siarhei Volkau
4b192aa09b
ASoC: codecs: jz4725b: add missed microphone widgets
Microphone input can be single ended or differential, although
known SoCs with that codec expose MIC1P only.

Also there is 20dB mic boost in the Mic1 path.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221016132648.3011729-8-lis8215@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:31 +01:00
Siarhei Volkau
616c291820
ASoC: codecs: jz4725b: add missed Mixer inputs
The Mixer couples analog input from 4 sources (DAC, Line In, Mic 1,
 Mic 2) each input has its own gain & mute controls.

At the moment only DAC is implemented fully and Line In path can be
switched on/off. The patch implements Mic 1 and Mic 2 paths and fully
implements Line In path.

Manual states that these controls (16.6.3.3 Programmable attenuation:
GOi) gain varies from -22.5dB to +6.0dB with 1.5dB step. Also there's
extra values below the minimum, but they behave the same as the minimum
value.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221016132648.3011729-7-lis8215@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:30 +01:00
Siarhei Volkau
e6233ee250
ASoC: codecs: jz4725b: use right control for Master Playback
At the moment DAC control is used as Master Playback control, this is
incorrect as DAC's output goes to a Mixer.

The Mixer couples analog input from 4 sources (DAC, Line In, Mic 1,
 Mic 2) each input has its own gain & mute controls.

Output of the Mixer goes to Output Stage control which is the best suite
for the new Playback Master. However, it doesn't have mute capability.

The patch implements Output Stage control as a new master and renames
old Master to DAC. Rest of mixer inputs will be implemented in the next
patch in the series.

Manual states that Output stage control (16.6.3.5 Programmable output
amplifier: PGAT) gain varies from -33.5dB to +4.5dB, gain step isn't
fixed and has 3 opts.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221016132648.3011729-6-lis8215@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:29 +01:00
Siarhei Volkau
80852f8268
ASoC: codecs: jz4725b: fix capture selector naming
At the moment Capture source selector appears on Playback
tab in the alsamixer and has a senseless name.

Let's fix that.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221016132648.3011729-5-lis8215@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:28 +01:00
Siarhei Volkau
1538e2c8c9
ASoC: codecs: jz4725b: use right control for Capture Volume
Line In Bypass control is used as Master Capture at the moment
this is completely incorrect.

Current control routed to Mixer instead of ADC, thus can't affect
Capture path. ADC control shall be used instead.

ADC volume control parameters are different, so the patch fixes that
as well. Manual says (16.6.3.2 Programmable input attenuation amplifier:
PGATM) that gain varies in range 0dB..22.5dB with 1.5dB step.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221016132648.3011729-4-lis8215@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:27 +01:00
Siarhei Volkau
088777bf65
ASoC: codecs: jz4725b: fix reported volume for Master ctl
DAC volume control is the Master Playback Volume at the moment
and it reports wrong levels in alsamixer and other alsa apps.

The patch fixes that, as stated in manual on the jz4725b SoC
(16.6.3.4 Programmable attenuation: GOD) the ctl range varies
from -22.5dB to 0dB with 1.5dB step.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221016132648.3011729-3-lis8215@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:27 +01:00
Siarhei Volkau
1013999b43
ASoC: codecs: jz4725b: add missed Line In power control bit
Line In path stayed powered off during capturing or
bypass to mixer.

Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221016132648.3011729-2-lis8215@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:26 +01:00
Cezary Rojewski
62d0cee4e6
ASoC: codecs: hda: Fix spelling error in log message
To improve readability.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-16-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:17 +01:00
Cezary Rojewski
bfced33e1e
ASoC: Intel: avs: Simplify log control for SKL
Loop only till the actual number of AudioDSP cores, not the value of
mask made from said number.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-15-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:16 +01:00
Cezary Rojewski
263e3e2dfe
ASoC: Intel: avs: Simplify ignore_fw_version description
Reword the parameter description to drop any confusion regarding its
purpose.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-14-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:15 +01:00
Cezary Rojewski
65edda6015
ASoC: Intel: avs: Do not print IPC error message twice
ENABLE_LOGS and SYSTEM_TIME IPCs call LARGE_CONFIG_SET internally which
dumps an error message in case of an error. There is no need to repeat
the process in the top level handler.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-13-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:14 +01:00
Cezary Rojewski
2d27a1caf8
ASoC: Intel: avs: Do not treat unsupported IPCs as invalid
Utilize NOT_SUPPORTED status code to differentiate between unsupported
and invalid requests. Skip over error paths if it is the former that is
communicated by the base firmware.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-12-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:13 +01:00
Cezary Rojewski
18a787909c
ASoC: Intel: avs: Do not reuse msg between different IPC handlers
While LOG_BUFFER_STATUS is a simple notification with only one
meaningful field, same message ptr shall not be reused for two different
handlers.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-11-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:13 +01:00
Amadeusz Sławiński
e331b534d3
ASoC: Intel: avs: Add missing include to HDA board
In some configurations board fails to compile due to missing header. Add
it to fix build.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-10-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:12 +01:00
Cezary Rojewski
e720e68b3f
ASoC: Intel: avs: Simplify d0ix disabling routine
No need to atomic_add_return(1) when there is atomic_inc_return()
available.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-9-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:11 +01:00
Cezary Rojewski
d1356811ab
ASoC: Intel: avs: Add missing SKL-based device IDs
Enable additional SKL-based configurations by filling device ID table
with new entries.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-8-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:10 +01:00
Amadeusz Sławiński
fecc00b448
ASoC: Intel: avs: Support da7219 on both KBL and APL
KBL and APL devices use same codec but have different clock, so it must
be set appropriately depending on device.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-7-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:09 +01:00
Cezary Rojewski
8b2446eaa4
ASoC: Intel: avs: Support AML with rt286 configuration
ACPI ID of INT343A signals rt286 device for SKL, KBL and AML platforms.
Add the missing AML entry.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-6-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:08 +01:00
Amadeusz Sławiński
9d0737fa0e
ASoC: Intel: avs: Add quirk for KBL-R RVP platform
KBL-R RVPs contain built-in rt298 codec which requires different PLL
clock and .dai_fmt configuration than seen on other boards.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-5-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:07 +01:00
Amadeusz Sławiński
953dbd1cef
ASoC: codecs: rt298: Add quirk for KBL-R RVP platform
KBL-R RVP platforms also use combojack, so we need to enable that
configuration for them.

Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-4-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:06 +01:00
Cezary Rojewski
23ae34e033
ASoC: Intel: avs: Fix potential RX buffer overflow
If an event caused firmware to return invalid RX size for
LARGE_CONFIG_GET, memcpy_fromio() could end up copying too many bytes.
Fix by utilizing min_t().

Reported-by: CoolStar <coolstarorganization@gmail.com>
Fixes: f14a1c5a9f ("ASoC: Intel: avs: Add module management requests")
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-3-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:05 +01:00
Cezary Rojewski
83375566a7
ASoC: Intel: avs: Fix DMA mask assignment
Spelling error leads to incorrect behavior when setting up DMA mask.

Fixes: a5bbbde2b8 ("ASoC: Intel: avs: Use helper function to set up DMA")
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20221010121955.718168-2-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:50:04 +01:00
Furkan Kardame
b44bc59d0d arm64: dts: rockchip: remove i2c5 from rk3566-roc-pc
i2c5 is owned by hdmi port

Signed-off-by: Furkan Kardame <f.kardame@manjaro.org>
Link: https://lore.kernel.org/r/20221010190142.18340-4-f.kardame@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2022-10-17 13:49:56 +02:00
Yang Yingliang
4e12ef2b2e
spi: cadence-quadspi: Use devm_platform_{get_and_}ioremap_resource()
Use the devm_platform_{get_and}_ioremap_resource() helper instead of
calling platform_get_resource() and devm_ioremap_resource() separately.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20220928145852.1882221-2-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:49:50 +01:00
Yang Yingliang
a008ae9f83
spi: bcm63xx: Use devm_platform_get_and_ioremap_resource()
Use the devm_platform_get_and_ioremap_resource() helper instead of calling
platform_get_resource() and devm_ioremap_resource() separately.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20220928145852.1882221-1-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:49:49 +01:00
Tharun Kumar P
1cc0cbea71
spi: microchip: pci1xxxx: Add driver for SPI controller of PCI1XXXX PCIe switch
Microchip pci1xxxx is a PCIe switch with a multi-function endpoint on one of its
downstream ports. SPI is one of the functions in the multi-function endpoint. This
function has 2 SPI masters, operates at a maximum frequency of 30 MHz and supports
7 client devices per master. This patch adds complete functionality to the SPI
function except for suspend and resume.

Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com>
Link: https://lore.kernel.org/r/20221006050514.115564-2-tharunkumar.pasumarthi@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:49:48 +01:00
Jiapeng Chong
8f4b3d2f65
spi: microchip-core: Remove the unused function mchp_corespi_enable()
The function mchp_corespi_enable() is defined in the spi-microchip-core.c
file, but not called elsewhere, so delete this unused function.

drivers/spi/spi-microchip-core.c:122:20: warning: unused function 'mchp_corespi_enable'.

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2418
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221017092141.9789-1-jiapeng.chong@linux.alibaba.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-10-17 12:49:47 +01:00