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1,169,205 commits

Author SHA1 Message Date
Dmitry Baryshkov
e18e181ca5 dt-bindings: clocks: qcom,gcc-apq8064: define clocks/-names properties
Define clock/clock-names properties of the GCC device node to be
used on MSM8960/APQ8064 platforms.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: David Heidelberg <david@ixit.cz> # tested on Nexus 7 (2013)
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220623120418.250589-2-dmitry.baryshkov@linaro.org
2022-09-13 21:58:18 -05:00
Yassine Oudjana
b504af6c99 arm64: dts: qcom: Use WCD9335 DT bindings
Replace DAI indices in codec nodes with definitions from the WCD9335
DT bindings for devices that use WCD9335.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220622161322.168017-4-y.oudjana@protonmail.com
2022-09-13 21:56:43 -05:00
Li Zhengyu
171ee3abf3 clk: qcom: clk-rpmh: Remove redundant if statement
By the clk framework already reference counts prepare/unprepare,
this if statement should be never true.

Signed-off-by: Li Zhengyu <lizhengyu3@huawei.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20220613063327.89320-1-lizhengyu3@huawei.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2022-09-13 21:54:13 -05:00
Richard Acayan
ae66b1fe48 clk: qcom: gcc-sdm845: add sdm670 global clock data
The Snapdragon 670 adds and removes some clocks, adds new frequencies, and
adds a new GPLL (Global Phase-Locked Loop) in reference to SDM845, while
also removing some GDSCs. Despite these differences, there are many
similarities with SDM670. Add data for SDM670 in the driver for SDM845 to
reuse the most of the clock data.

Advantages and disadvantages of this approach:
 + maintenance applies to both sdm670 and sdm845 by default
 + less duplicate code (clocks) means smaller distro/pre-built kernels
   with all drivers enabled
 - clocks for both SoC's must be compiled if the user wants clocks for one
   specific SoC (both or none)
 - additional testing needed for sdm845 devices

Link: https://android.googlesource.com/kernel/msm/+/443bd8d6e2cf54698234c752e6de97b4b8a528bd%5E%21/#F10
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220914013922.198778-4-mailingradian@gmail.com
2022-09-13 21:20:34 -05:00
Richard Acayan
8e90216d2d clk: qcom: gcc-sdm845: use device tree match data
This driver will support more than one SoC's set of clocks, and set of
GDSCs. This behavior would be unclean with hard-coded static variables.
Support it by grabbing clocks, GDSCs, and BCRs in the match data.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220914013922.198778-3-mailingradian@gmail.com
2022-09-13 21:20:34 -05:00
Richard Acayan
657e932665 dt-bindings: clock: gcc-sdm845: add sdm670 global clocks
The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most
of the new clocks, GDSCs, and resets already have reserved IDs but there
are some resources that don't. Add the new clock from Snapdragon 670 and
document the differences between the SoC parent clocks.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220914013922.198778-2-mailingradian@gmail.com
2022-09-13 21:20:33 -05:00
Max Filippov
e3ddb8bbe0 xtensa: add FDPIC and static PIE support for noMMU
Define ELFOSABI_XTENSA_FDPIC and use it as an OSABI tag in the ELF
header to distinguish FDPIC ELF files from regular ELF files.
Define ELF_FDPIC_PLAT_INIT and put executable map, interpreter map and
executable dynamic section addresses into registers a4..a6.
Update start_thread macro to preserve register values in the current
register window.
Add definitions for PTRACE_GETFDPIC, PTRACE_GETFDPIC_EXEC and
PTRACE_GETFDPIC_INTERP.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-09-13 18:28:00 -07:00
Max Filippov
ccd2d9df6e xtensa: clean up ELF_PLAT_INIT macro
Wrap _r in parentheses in the macro body.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2022-09-13 18:21:56 -07:00
Krzysztof Kozlowski
18a4af7a59 ARM: dts: qcom: msm8226: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap).  This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:

  qcom-msm8226-samsung-s3ve3g.dtb: hwlock: 'reg' is a required property
  qcom-msm8226-samsung-s3ve3g.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-16-krzysztof.kozlowski@linaro.org
2022-09-13 17:45:37 -05:00
Krzysztof Kozlowski
16ae4e557b ARM: dts: qcom: apq8084: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap).  This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:

  qcom-apq8084-mtp.dtb: hwlock: 'reg' is a required property
  qcom-apq8084-mtp.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-15-krzysztof.kozlowski@linaro.org
2022-09-13 17:45:37 -05:00
Krzysztof Kozlowski
9e826e0506 arm64: dts: qcom: msm8994: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap).  This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:

  qcom/msm8994-sony-xperia-kitakami-suzuran.dtb: hwlock: 'reg' is a required property
  qcom/msm8994-sony-xperia-kitakami-suzuran.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-13-krzysztof.kozlowski@linaro.org
2022-09-13 17:44:51 -05:00
Krzysztof Kozlowski
f5e303aefc arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap).  This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:

  qcom/ipq6018-cp01-c1.dtb: hwlock: 'reg' is a required property
  qcom/ipq6018-cp01-c1.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-12-krzysztof.kozlowski@linaro.org
2022-09-13 17:44:51 -05:00
Krzysztof Kozlowski
8a99e0fc8b arm64: dts: qcom: msm8996: add missing TCSR syscon compatible
TCSR syscon node should come with dedicated compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-9-krzysztof.kozlowski@linaro.org
2022-09-13 17:44:51 -05:00
Krzysztof Kozlowski
9846038509 arm64: dts: qcom: qcs404: add missing TCSR syscon compatible
TCSR syscon node should come with dedicated compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-8-krzysztof.kozlowski@linaro.org
2022-09-13 17:44:51 -05:00
Krzysztof Kozlowski
d07ac9d93c arm64: dts: qcom: msm8953: add missing TCSR syscon compatible
TCSR syscon node should come with dedicated compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-7-krzysztof.kozlowski@linaro.org
2022-09-13 17:44:51 -05:00
Krzysztof Kozlowski
d30bcfa440 arm64: dts: qcom: ipq6018: add missing TCSR syscon compatible
TCSR syscon node should come with dedicated compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-6-krzysztof.kozlowski@linaro.org
2022-09-13 17:44:51 -05:00
Lucas De Marchi
69a3738ba5 drm/i915: Skip applying copy engine fuses
Support for reading the fuses to check what are the Link Copy engines
was added in commit ad5f74f342 ("drm/i915/pvc: read fuses for link
copy engines"). However they were added unconditionally because the
FUSE3 register is present since graphics version 10.

However the bitfield with meml3 fuses only exists since graphics version
12. Moreover, Link Copy engines are currently only available in PVC.
Tying additional copy engines to the meml3 fuses is not correct for
other platforms.

Make sure there is a check for  `12.60 <= ver < 12.70`. Later platforms
may extend this function later if it's needed to fuse off copy engines.

Currently it's harmless as the Link Copy engines are still not exported:
info->engine_mask only has BCS0 set and the register is only read for
platforms that do have it.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912-copy-engine-v1-1-ef92fd81758d@intel.com
2022-09-13 15:31:08 -07:00
Krzysztof Kozlowski
5d4753f741 hwspinlock: qcom: add support for MMIO on older SoCs
Older Qualcomm SoCs have TCSR mutex registers with 0x80 stride, instead
of 0x1000.  Add dedicated compatibles and regmap for such case.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-5-krzysztof.kozlowski@linaro.org
2022-09-13 17:01:18 -05:00
Krzysztof Kozlowski
90cb380f9c hwspinlock: qcom: correct MMIO max register for newer SoCs
Newer ARMv8 Qualcomm SoCs using 0x1000 register stride have maximum
register 0x20000 (32 mutexes * 0x1000).

Fixes: 7a1e6fb1c6 ("hwspinlock: qcom: Allow mmio usage in addition to syscon")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-4-krzysztof.kozlowski@linaro.org
2022-09-13 17:01:18 -05:00
Krzysztof Kozlowski
276a4f1a5f dt-bindings: hwlock: qcom-hwspinlock: correct example indentation
Use some consistent indentation (4-space) for DTS example.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-3-krzysztof.kozlowski@linaro.org
2022-09-13 17:01:18 -05:00
Krzysztof Kozlowski
6ca53a75c4 dt-bindings: hwlock: qcom-hwspinlock: add support for MMIO on older SoCs
Older Qualcomm SoCs have TCSR mutex registers with 0x80 stride, instead
of 0x1000.  Add dedicated compatibles for such case.  Unfortunately the
binding started using a generic "qcom,tcsr-mutex" compatible without
specifying the SoC part, thus it looks now quite inconsistent.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-2-krzysztof.kozlowski@linaro.org
2022-09-13 17:01:18 -05:00
Dmitry Baryshkov
867bc3269e clk: qcom: a53-pll: convert to use parent_data rather than parent_names
Change a53-pll driver to use clk_parent_data rather than always looking
up the xo clock in the system clock list.

Note, this change also switches the a53-pll from the global `xo' clock
to the `xo_board', the clock that is specified as the `xo' clock in the
DT file.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909103137.3727830-1-dmitry.baryshkov@linaro.org
2022-09-13 16:49:15 -05:00
Dmitry Baryshkov
baecbda529 ARM: dts: qcom: msm8660: fix node names for fixed clocks
Fix node names for three fixed clocks to follow the
no-underscores-in-name rule. To remain compatible with the drivers
expecting to find the old clock names, add clock-output-names
properties.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909105136.3733919-6-dmitry.baryshkov@linaro.org
2022-09-13 16:48:10 -05:00
Dmitry Baryshkov
6244e7da53 ARM: dts: qcom: msm8660: add pxo/cxo clocks to the GCC node
Add pxo/cxo clocks to the GCC device tree node.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909105136.3733919-5-dmitry.baryshkov@linaro.org
2022-09-13 16:48:08 -05:00
Dmitry Baryshkov
4409ef7d3c clk: qcom: gcc-msm8660: use parent_hws/_data instead of parent_names
Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names. Use parent_hws where possible to refer parent
clocks directly, skipping the lookup.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909105136.3733919-4-dmitry.baryshkov@linaro.org
2022-09-13 16:44:54 -05:00
Dmitry Baryshkov
41872e9f4d clk: qcom: gcc-msm8660: use ARRAY_SIZE instead of specifying num_parents
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data easy and errorproof.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909105136.3733919-3-dmitry.baryshkov@linaro.org
2022-09-13 16:44:54 -05:00
Dmitry Baryshkov
c027fa892b dt-bindings: clock: qcom,gcc-msm8660: separate GCC bindings for MSM8660
Create a separate DT bindings for Global Clock Controller on MSM8660
platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909105136.3733919-2-dmitry.baryshkov@linaro.org
2022-09-13 16:44:54 -05:00
Dang Huynh
50ee65dc51 clk: qcom: sm6115: Select QCOM_GDSC
While working on the Fxtec Pro1X device, this error shows up with
my own minimal configuration:

gcc-sm6115: probe of 1400000.clock-controller failed with error -38

The clock driver depends on CONFIG_QCOM_GDSC and after enabling
that, the driver probes successfully.

Signed-off-by: Dang Huynh <danct12@riseup.net>
Fixes: cbe63bfdc5 ("clk: qcom: Add Global Clock controller (GCC)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220910170207.1592220-1-danct12@riseup.net
2022-09-13 16:20:37 -05:00
Stefan Roesch
56f99b8d06 block: blk_queue_enter() / __bio_queue_enter() must return -EAGAIN for nowait
Today blk_queue_enter() and __bio_queue_enter() return -EBUSY for the
nowait code path. This is not correct: they should return -EAGAIN
instead.

This problem was detected by fio. The following command exposed the
above problem:

t/io_uring -p0 -d128 -b4096 -s32 -c32 -F1 -B0 -R0 -X1 -n24 -P1 -u1 -O0 /dev/ng0n1

By applying the patch, the retry case is handled correctly in the slow
path.

Signed-off-by: Stefan Roesch <shr@fb.com>
Fixes: bfd343aa17 ("blk-mq: don't wait in blk_mq_queue_enter() if __GFP_WAIT isn't set")
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2022-09-13 15:06:39 -06:00
Gaosheng Cui
e66fee7519 firmware: qcom: scm: remove unused __qcom_scm_init declaration
__qcom_scm_init has been removed since
commit 9a434cee77 ("firmware: qcom_scm: Dynamically support
SMCCC and legacy conventions"), so remove it.

Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220911092912.3219132-1-cuigaosheng1@huawei.com
2022-09-13 15:14:54 -05:00
Krzysztof Kozlowski
bcd8868b1d dt-bindings: power: qcom,rpmpd: drop non-working codeaurora.org emails
Emails to codeaurora.org bounce ("Recipient address rejected:
undeliverable address: No such user here.").

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220911112508.202995-1-krzysztof.kozlowski@linaro.org
2022-09-13 15:14:38 -05:00
Krzysztof Kozlowski
e0eeb08522 arm64: dts: qcom: sc7280-herobrine: correct TLMM gpio-line-names
There are 174 GPIOs in SC7280.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-41-krzysztof.kozlowski@linaro.org
2022-09-13 14:48:43 -05:00
Krzysztof Kozlowski
d801357a05 arm64: dts: qcom: sc7280: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-40-krzysztof.kozlowski@linaro.org
2022-09-13 14:48:43 -05:00
Krzysztof Kozlowski
a737475288 arm64: dts: qcom: sm8450: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-39-krzysztof.kozlowski@linaro.org
2022-09-13 14:47:17 -05:00
Krzysztof Kozlowski
e227fa2970 arm64: dts: qcom: sm8350: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-38-krzysztof.kozlowski@linaro.org
2022-09-13 14:47:17 -05:00
Krzysztof Kozlowski
c9c53d1f43 arm64: dts: qcom: sm8350-sagami: correct TS pin property
The pin configuration is selected with "pins", not "pin" property.

Fixes: 1209e92466 ("arm64: dts: qcom: sm8350-sagami: Enable and populate I2C/SPI nodes")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-37-krzysztof.kozlowski@linaro.org
2022-09-13 14:47:17 -05:00
Krzysztof Kozlowski
448f5a002f arm64: dts: qcom: sm6350: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-36-krzysztof.kozlowski@linaro.org
2022-09-13 14:47:17 -05:00
Krzysztof Kozlowski
be24fd19b1 arm64: dts: qcom: sm6125: align TLMM pin configuration with DT schema
DT schema expects TLMM pin configuration nodes to be named with '-state'
suffix and their optional children with '-pins' suffix.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220912061746.6311-35-krzysztof.kozlowski@linaro.org
2022-09-13 14:47:17 -05:00
Gaosheng Cui
75cebd664d drm/amd/pm: remove unused declarations in hardwaremanager.h
phm_is_hw_access_blocked() and phm_block_hw_access() has been
removed since commit 698f88e697 ("drm/amd/powerplay: delete
dead code in powerplay"), so remove them.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220913024847.552254-6-cuigaosheng1@huawei.com
2022-09-13 14:52:36 -04:00
Gaosheng Cui
04e6fcc1b3 drm/gma500: remove unused declarations in psb_intel_drv.h
psb_intel_sdvo_supports_hotplug(), psb_intel_sdvo_set_hotplug()
and psb_intel_sdvo_find() have been removed since
commit 871c60156d ("drm/gma500: Remove dead code"),
so remove them.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220913024847.552254-5-cuigaosheng1@huawei.com
2022-09-13 14:52:28 -04:00
Gaosheng Cui
2b61e16a3c drm/radeon: remove unused declarations for radeon
radeon_combios_get_ext_tmds_info() has been removed since
commit fcec570b27 ("drm/radeon/kms: add support for
external tmds on legacy boards").

radeon_mst has been removed since
commit 01ad1d9c28 ("drm/radeon: Drop legacy MST support").

r600_hdmi_acr() has been removed since
commit 64424d6e45 ("radeon/audio: consolidate update_acr()
functions (v2)").

So remove the declarations for them from header file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220913024847.552254-4-cuigaosheng1@huawei.com
2022-09-13 14:52:19 -04:00
Gaosheng Cui
b779e4b973 drm/radeon/r600_cs: remove r600_cs_legacy_get_tiling_conf() declaration
r600_cs_legacy_get_tiling_conf() has been removed since
commit 8333f607a6 ("drm/radeon: remove UMS support"),
so remove it.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220913024847.552254-3-cuigaosheng1@huawei.com
2022-09-13 14:52:14 -04:00
Gaosheng Cui
a2224f2d45 drm/vmwgfx: remove unused vmw_bo_is_vmw_bo() declaration
vmw_bo_is_vmw_bo() has been removed since
commit 298799a282 ("drm/vmwgfx: Fix gem refcounting and
memory evictions"), so remove it.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220913024847.552254-2-cuigaosheng1@huawei.com
2022-09-13 14:52:02 -04:00
Xu Panda
ee10818362 drm/amd/display/amdgpu_dm: remove duplicate included header files
soc15_common.h is included more than once.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Xu Panda <xu.panda@zte.com.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13 14:33:02 -04:00
Jiapeng Chong
bd7352332b drm/amd/display: Remove the unused function copy_stream_update_to_stream()
The function copy_stream_update_to_stream() is defined in the notif.c
file, but not called elsewhere, so delete this unused function.

drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:2852:6: warning: no previous prototype for ‘dc_reset_state’.

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2113
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13 14:33:02 -04:00
Jiapeng Chong
0cdbffd55f drm/amd/display: make mpc32_program_shaper and mpc32_program_3dlut static
These two functions are not used outside the function dcn32_mpc.c, so the
modification is defined as static.

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mpc.c:704:6: warning: no previous prototype for ‘mpc32_program_shaper’.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mpc.c:900:6: warning: no previous prototype for ‘mpc32_program_3dlut’.

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2115
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13 14:33:01 -04:00
Jiapeng Chong
7f0eac6564 drm/amd/display: make dcn32_link_encoder_is_in_alt_mode and dcn32_link_encoder_get_max_link_cap static
These two functions are not used outside the function
dcn32_dio_link_encoder.c, so the modification is defined as static.

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dio_link_encoder.c:121:6: warning: no previous prototype for ‘dcn32_link_encoder_is_in_alt_mode’.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dio_link_encoder.c:136:6: warning: no previous prototype for ‘dcn32_link_encoder_get_max_link_cap’.

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2117
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13 14:33:01 -04:00
Jiapeng Chong
1a468dd88a drm/amd/display: make dscl32_calc_lb_num_partitions static
This symbol is not used outside of dcn32_dpp.c, so marks it static.

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dpp.c:34:6: warning: no previous prototype for ‘dscl32_calc_lb_num_partitions’.

Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2118
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13 14:33:01 -04:00
Jiapeng Chong
1e0301e127 drm/amd/display: make enc32_stream_encoder_dvi_set_stream_attribute static
This symbol is not used outside of dcn32_dio_stream_encoder.c, so marks
it static.

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_dio_stream_encoder.c:63:6: warning: no previous prototype for ‘enc32_stream_encoder_dvi_set_stream_attribute’.

Link:https://bugzilla.openanolis.cn/show_bug.cgi?id=2119
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13 14:33:01 -04:00
Rafael Mendonca
7136f956c7 drm/amdgpu: Fix memory leak in hpd_rx_irq_create_workqueue()
If construction of the array of work queues to handle hpd_rx_irq offload
work fails, we need to unwind. Destroy all the created workqueues and
the allocated memory for the hpd_rx_irq_offload_work_queue struct array.

Fixes: 8e794421bc ("drm/amd/display: Fork thread to offload work of hpd_rx_irq")
Signed-off-by: Rafael Mendonca <rafaelmendsr@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13 14:33:01 -04:00