Commit graph

546,481 commits

Author SHA1 Message Date
Thierry Reding
7d3385875b drm/tegra: dsi: Add Tegra124 support
The DSI host controller hasn't changed from Tegra114 to Tegra124, but
different characterization parameters may be required.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:44 +02:00
Thierry Reding
b8be0bdbd5 drm/tegra: dsi: Use proper back-porch for non-sync video mode
In video modes without sync pulses, the horizontal back-porch needs to
include the horizontal sync width.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:44 +02:00
Thierry Reding
472a6d1fd5 drm/tegra: dc: Rename BASE_COLOR_SIZE* fields
Use an underscore to separate the prefix from the color size suffix.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:43 +02:00
Thierry Reding
76ac3284bb drm/tegra: dc: Don't explicitly set owner module
The call to platform_driver_register() will already set up the .owner
field, so there's no need to do it explicitly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:43 +02:00
Thierry Reding
8fd3ffa902 drm/tegra: dc: Rename register for consistency
The horizontal pulse enable bits are named H_PULSE{0,1,2}_ENABLE in the
TRM. Modify the driver to use the same naming for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:43 +02:00
Thierry Reding
791ddb1e1c drm/tegra: dc: Record statistics
Record interrupt statistics, such as the number of frames and VBLANKs
received and the number of FIFO underflow and overflows.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:43 +02:00
Thierry Reding
01a5da0c10 drm/tegra: dc: Request syncpoint earlier
Request a syncpoint for display prior to registering the host1x client.
This will ensure that the syncpoint will be acquired when the KMS driver
initializes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:42 +02:00
Thierry Reding
e83dcb5bb6 drm/tegra: dc: Remove gratuituous blank line
Blank lines at the end of functions are hideous, so get rid of it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:42 +02:00
Thierry Reding
a1df3b2488 drm/tegra: dc: Clarify comment about cursor treatment
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:42 +02:00
Thierry Reding
6ca1f62f0d drm/tegra: dc: Implement CRC debugfs interface
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:41 +02:00
Thierry Reding
5b4f516f5c drm/tegra: dc: Add Tegra210 support
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:41 +02:00
Thierry Reding
31930d4d08 drm/tegra: dc: Reset VBLANK to off
Upon driver load, reset the VBLANK machinery to off to reflect the
hardware state. Since the ->reset() callback is called from the initial
drm_mode_config_reset() call, move the latter after the VBLANK machinery
initialization by drm_vblank_init().

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:40 +02:00
Thierry Reding
fb36d0eed4 drm/tegra: output: Support low-active hotplug detect
Support low-active hotplug detect signals by storing the GPIO flags
parsed from device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:40 +02:00
Nicolin Chen
114bb13968 ASoC: fsl-asoc-card: Specify codec_dai_name for DAI links
The dev->name of CODEC might not be identical to its codec_dai_name,
so using dev->name to probe the CODEC dai is not a correct approach.

This patch specifies each supporting codec_dai_name instead of using
dev->name any more.

Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-13 12:47:37 +01:00
Thierry Reding
a13f1dc4c3 drm/tegra: Use SIMPLE_DEV_PM_OPS
Use this macro to reduce some of the boilerplate.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:24 +02:00
Thierry Reding
cdc630b6c6 drm/tegra: Allow VBLANK to be disabled
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:22 +02:00
Thierry Reding
15372d4be7 gpu: host1x: mipi: Power down regulators when unused
Keep track of the number of users of DSI and CSI pads and power down the
regulators that supply the bricks when all users are gone.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:21 +02:00
Thierry Reding
5e7752436e gpu: host1x: mipi: Add Tegra210 support
Some changes are needed to the configuration settings for some lanes. In
addition, the clock lanes for the CSI pads can no longer be calibrated.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:20 +02:00
Thierry Reding
7fd3ecad3f gpu: host1x: mipi: Add Tegra132 support
While Tegra132 has the same pads as Tegra124, some configuration values
need to be programmed slightly differently.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:19 +02:00
Thierry Reding
c22fb79099 gpu: host1x: mipi: Constify OF match table
This table is never modified and can therefore reside in read-only
memory.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:18 +02:00
Thierry Reding
2ed264bf91 gpu: host1x: mipi: Clear calibration status
Before starting a new calibration cycle, make sure to clear the current
status by writing a 1 to the various "calibration done" bits.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:17 +02:00
Thierry Reding
8ed5c06232 gpu: host1x: mipi: Fix clock lane register for DSI
Use more consistent names for the clock lane configuration registers and
fix the offset of the upper clock lane configuration register for the
first DSI pad.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:16 +02:00
Thierry Reding
83a3c223cc gpu: host1x: mipi: Parameterize to support future SoCs
Parameterize more of the register programming to accomodate for changes
required by future SoC generations.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-13 13:47:15 +02:00
Lars-Peter Clausen
6e588a0d83 ASoC: dapm: Consolidate path trace events
The snd_soc_dapm_input_path and snd_soc_dapm_output_path trace events are
identical except for the direction. Instead of having two events have a
single one that has a field that contains the direction.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-13 12:40:16 +01:00
Lars-Peter Clausen
a3423b02cf ASoC: dapm: Consolidate input and output path handling
After the recent cleanups and generalizations of the DAPM algorithm the
handling of input and output paths is now fully symmetric. This means by
making some slight changes to the data structure and using arrays with one
entry for each direction, rather than separate fields, it is possible to
create a generic implementation that is capable of handling both input and
output paths.

Unfortunately this generalization significantly increases the code size on
the hot path of is_connected_{input,output}_ep() and
dapm_widget_invalidate_{input,output}_paths(), which has a negative impact
on the overall performance. The inner loops of those functions are quite
small and the generic implementation adds extra pointer arithmetic in a few
places.

Testing on ARM shows that the combined code size of the specialized
functions is about 50% larger than the generalized function in relative
numbers. But in absolute numbers its less than 200 bytes, which is still
quite small. On the other hand the generalized function increases the
execution time of dapm_power_one_widget() by 30%. Given that this function
is one of the most often called functions of the DAPM framework the
trade-off of getting better performance at expense of generating slightly
larger code at seems to be worth it.

To avoid this still keep two versions of these functions around, one for
input and one for output. But have a generic implementation of the
algorithm which gets inlined by those two versions. And then let the
compiler take care of optimizing it and removing he extra instructions.

This still reduces the source code size as well as the makes making changes
to the implementation more straight forward since the same change does no
longer need to be done in two separate places. Also on the slow paths we
can use a generic implementations that handle both input and output paths.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-13 12:40:16 +01:00
Lars-Peter Clausen
30abbe7727 ASoC: dapm: dapm_dai_get_connected_widgets: Fix missing mutex unlock
Make sure to unlock the DAPM mutex when dapm_widget_list_create() fails.

This means the function will now generate a trace_snd_soc_dapm_connected
event, even if the creation of the list fails. But that was the behavior
before the patch that introduced the unlock issue, so that should be fine.

Fixes: 1ce43acff0 ("ASoC: dapm: Simplify list creation in dapm_dai_get_connected_widgets()")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-13 12:40:16 +01:00
Michal Kazior
e04cafbc38 ath10k: fix peer limit enforcement
Firmware peer entries are involved in internal
firmware vdev structures. This was not accounted
for and could lead firmware to crash due to asking
it to do more than it could.

Fixes: 039a0051ec ("ath10k: allocate fw resources for iface combinations")
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-13 14:30:02 +03:00
Michal Kazior
adaeed74bc ath10k: don't remove peer that doesn't exist
If peer creation failed during offchannel Tx the
driver attempted to delete the peer nonetheless.
This caused the ar->num_peers counter to be
incorrectly decremented. This subsequently could
cause the counter to drop below 0 and also
eventually lead to firmware crash because host
would think there are less peer entries created in
firmware then there really were.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-13 14:29:55 +03:00
Ricardo Ribalda Delgado
16ea9b8ac4 spi/spi-xilinx: Fix mixed poll/irq mode
Once the module process a transfer in irq mode, the next poll transfer
will not work because the transmitter is left in inhibited state.

Fixes: 22417352f6 (Use polling mode on small transfers)
Reported-by: Edward Kigwana <ekigwana@scires.com>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
2015-08-13 12:29:23 +01:00
Michal Kazior
6f7429c29b ath10k: fix hw reconfig on wow failure
When WoWLAN resume fails with retval 1 mac80211
will attempt to reconfig the device in a similar
manner when hw restart is requested. This wasn't
handled properly and yielded call trace warnings
and the device ended up not working.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-13 14:22:49 +03:00
Michal Kazior
84e3df60f0 ath10k: initialize fw_features var
If firmware did not have any feature flags set the
var would be left with values found on the stack
(i.e. garbage) yielding print string like this:

  (...) features \xffffffa6m:^R\xfffffffbԂ\xffffffc4^E

Fixes: b27bc5a40f ("ath10k: dump fw features during probing")
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-13 14:22:07 +03:00
Vivek Natarajan
a48e2cc899 ath10k: Enable MU MIMO txbf support for QCA99X0
This patch enables MU-MIMO transmit beamforming support
for QCA99X0 chipsets.

Signed-off-by: Vivek Natarajan <nataraja@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-13 14:21:18 +03:00
Vivek Natarajan
08e75ea84c ath10k: Support different txbf configuration schemes
qca61x4 uses the vdev param as a sole sufficient configuration
for txbf while qca99x0 enables txbf during peer assoc by
combining the vdev param value with peer assoc's vht capabilities

This patch gets the appropriate txbf configuration scheme
before passing the wmi command to enable the same in the firmware.

Signed-off-by: Vivek Natarajan <nataraja@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-13 14:21:10 +03:00
Mika Westerberg
4585b000ac pinctrl: cherryview: Serialize all register access
There is a hardware issue in Intel Braswell/Cherryview where concurrent
GPIO register access might results reads of 0xffffffff and writes might get
dropped.

Prevent this from happening by taking the serializing lock for all places
where it is possible that more than one thread might be accessing the
hardware concurrently.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-13 13:20:02 +02:00
Masahiro Yamada
39b87ad166 pinctrl: UniPhier: PH1-Pro5: add I2C ch6 pin-mux setting
The initial version of this driver missed to add I2C ch6 pin-muxing.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-13 13:15:05 +02:00
Michal Kazior
92092fe528 ath10k: reject 11b tx fragmentation configuration
Even though there's a WMI enum for fragmentation
threshold no known firmware actually implements
it. Moreover it is not possible to rely frame
fragmentation to mac80211 because firmware clears
the "more fragments" bit in frame control making
it impossible for remote devices to reassemble
frames.

Hence implement a dummy callback just to say
fragmentation isn't supported. This effectively
prevents mac80211 from doing frame fragmentation
in software.

This fixes Tx becoming broken after setting
fragmentation threshold.

Fixes: 1010ba4c5d ("ath10k: unregister and remove frag_threshold callback")
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-13 14:13:55 +03:00
Michal Kazior
4dca0e6edd ath10k: remove futile fragmentation threshold config
Commit 1010ba4c5d ("ath10k: unregister and
remove frag_threshold callback") didn't remove all
instances of (futile) fragmentation threshold
configuration. No known firmware supports the
parameter so don't even bother setting it.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2015-08-13 14:13:47 +03:00
Gregory Fong
3afa129a9d gpio: brcmstb: support wakeup from S5 cold boot
For wake from S5, we need to:
- register a reboot handler
- set wakeup capability before requesting IRQ so wakeup count is
  incremented
- mask all GPIO IRQs and clear any pending interrupts during driver
  probe to since no driver will yet be registered to handle any IRQs
  carried over from boot at that time, and it's possible that the
  booted kernel does not request the same IRQ anyway.

This means that /sys/.../power/wakeup_count is valid at boot time, and
we can properly account for S5 wakeup stats. e.g.:

  ### After waking from S5 from a GPIO key
  # cat /sys/bus/platform/drivers/brcmstb-gpio/f04172c0.gpio/power/wakeup
  enabled
  # cat /sys/bus/platform/drivers/brcmstb-gpio/f04172c0.gpio/power/wakeup_count
  1

Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-13 13:13:41 +02:00
Gregory Fong
19a7b6940b gpio: brcmstb: Add interrupt and wakeup source support
Uses the gpiolib irqchip helpers.  For this to work, the irq setup
function is called once per bank instead of once per device.  Note
that all known uses of this block have a BCM7120 L2 interrupt
controller as a parent.  Supports interrupts for all GPIOs.

In the IRQ handler, we check for raised IRQs for invalid GPIOs and
warn (ratelimited) if they're encountered.

Also, several drivers (e.g. gpio-keys) allow for GPIOs to be
configured as wakeup sources, and this GPIO controller supports that
through a separate interrupt path.

The de-facto standard DT property "wakeup-source" is checked, since
that indicates whether the GPIO controller hardware can wake.  Uses
the IRQCHIP_MASK_ON_SUSPEND irq_chip flag because UPG GIO doesn't have
any of its own wakeup source configuration.

Aside regarding gpiolib irqchip helpers: It wasn't obvious (to me)
that you can have multiple chained irqchips and associated IRQ domains
for a single parent IRQ, and as long as the xlate function is written
correctly, a GPIO IRQ request end up checking the correct domain and
will get associated with the correct IRQ.  What helps make this clear
is to read
  drivers/gpio/gpiolib-of.c:
   - of_gpiochip_find_and_xlate()
   - of_get_named_gpiod_flags()
  drivers/gpio/gpiolib.c:
   - gpiochip_find()

Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-13 13:13:26 +02:00
Linus Walleij
77a775b7cc gpio/ABI: document what is already the case
commit 926b663ce8
"gpiolib: allow GPIOs to be named" added the ability to
name GPIO lines by an array of names stored in the GPIO
chip. This was in 2009 and has been an ABI since. Let's
document it properly.

Cc: Daniel Silverstone <dsilvers@digital-scurf.org>
Cc: Markus Pargmann <mpa@pengutronix.de>
Cc: Johan Hovold <johan@kernel.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-13 13:13:16 +02:00
Stephen Rothwell
f9511a4fc4 clk: ti: fix for definition movement
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 13:03:40 +02:00
Olof Johansson
e789546159 - New Firmware node and accompanying binding document
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Merge tag 'rpi-dt-for-armsoc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi into next/dt

 - New Firmware node and accompanying binding document

* tag 'rpi-dt-for-armsoc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi:
  dt/bindings: Add binding for the Raspberry Pi firmware driver
  ARM: bcm2835: Add the firmware driver information to the RPi DT

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:26:29 +02:00
Linus Walleij
16478b61f0 ARM/fb: ep93xx: switch framebuffer to use modedb only
All the EP93xx boards exclusively use modedb to look up video
modes from the command line. Root out the parametrization of
custom video modes from the platform data and board files
and simplify the driver.

Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:25:44 +02:00
Olof Johansson
db55350599 The i.MX fixes for 4.2, 3rd round:
- Fix i.MX6 PCIe interrupt routing which gets missed from stacked IRQ
    domain conversion.  The PCIe wakeup support is currently broken
    because of this.
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Merge tag 'imx-fixes-4.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

The i.MX fixes for 4.2, 3rd round:
 - Fix i.MX6 PCIe interrupt routing which gets missed from stacked IRQ
   domain conversion.  The PCIe wakeup support is currently broken
   because of this.

* tag 'imx-fixes-4.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx6: correct i.MX6 PCIe interrupt routing

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:24:55 +02:00
Olof Johansson
93621d7037 SoCFPGA DTS updates for v4.3, take 2
- Add DTS property "altr,modrst-offset" for reset driver to
   use
 - Add updated reset defines for the reset driver
 - Add reset property for EMACs on Arria10
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Merge tag 'socfpga_dts_for_v4.3_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

SoCFPGA DTS updates for v4.3, take 2
- Add DTS property "altr,modrst-offset" for reset driver to
  use
- Add updated reset defines for the reset driver
- Add reset property for EMACs on Arria10

* tag 'socfpga_dts_for_v4.3_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: dts: Add resets for EMACs on Arria10
  ARM: socfpga: dts: add "altr,modrst-offset" property
  dt-bindings: Add reset manager offsets for Arria10

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:19:38 +02:00
Olof Johansson
07616f013b Two fixes for bugs in Exynos power domain error exit path:
1. kfree() of read-only memory (name of power domain returned
    by kstrdup_const()),
 2. Doubled of_node_put() leading to invalid ref count for OF node.
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Merge tag 'samsung-mach-fixes-4.2' of https://github.com/krzk/linux into fixes

Two fixes for bugs in Exynos power domain error exit path:
1. kfree() of read-only memory (name of power domain returned
   by kstrdup_const()),
2. Doubled of_node_put() leading to invalid ref count for OF node.

* tag 'samsung-mach-fixes-4.2' of https://github.com/krzk/linux:
  ARM: EXYNOS: fix double of_node_put() on error path
  ARM: EXYNOS: Fix potentian kfree() of ro memory

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:18:45 +02:00
Olof Johansson
6d511a26ce Some more devicetree changes, including usbphy support for the
Cortex-A9 SoCs and actually enabling usb on the rk3066-marsboard,
 Two more veyron-devices - namely Speedy and Minnie and a fix for
 the tsadc.
 One slightly more interesting fix is the blocking of the last
 16MB of memory on 4GB rk3288 devices. The rk3288 cannot use this
 area for dma operations, so things like the mmc or usb controllers
 regularly fail when trying to read data. This solution mimicks the
 solution from the ChromeOS kernel, who also do not seem to have
 found a better solution yet. Here it only moves to the devicetree.
 As this issue is also present on the arm64 rk3368, any future
 better solution to this problem would need to describe this in
 the devicetree as well and could then remove this block.
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Merge tag 'v4.3-rockchip32-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Some more devicetree changes, including usbphy support for the
Cortex-A9 SoCs and actually enabling usb on the rk3066-marsboard,
Two more veyron-devices - namely Speedy and Minnie and a fix for
the tsadc.
One slightly more interesting fix is the blocking of the last
16MB of memory on 4GB rk3288 devices. The rk3288 cannot use this
area for dma operations, so things like the mmc or usb controllers
regularly fail when trying to read data. This solution mimicks the
solution from the ChromeOS kernel, who also do not seem to have
found a better solution yet. Here it only moves to the devicetree.
As this issue is also present on the arm64 rk3368, any future
better solution to this problem would need to describe this in
the devicetree as well and could then remove this block.

* tag 'v4.3-rockchip32-dts2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add veyron-minnie board
  ARM: dts: rockchip: reserve unusable memory region on rk3288
  ARM: dts: rockchip: enable usb controller on marsboard
  ARM: dts: rockchip: add usb phys to Cortex-A9 socs
  ARM: dts: rockchip: set correct dwc2 params for cortex-a9 socs
  ARM: dts: rockchip: Add veyron-speedy board
  ARM: dts: rockchip: Use correct dts properties for tsadc node on veyron

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:14:29 +02:00
Olof Johansson
8943835e24 Improve reliability of resume on rk3288 boards. For whatever
reason resuming from suspend worked sucessfully on the rk3288-evb
 but not on other boards, like veyron-devices. Two problems seem
 to have existed. For one the stabilization delays for pmic and
 oscillator may have been to short and secondly the shallow
 suspend seems to need GPIO wakups enabled. Normally this should
 be covered by the more generic ARMINT wakeups already and
 the reason for this is still investigated at Rockchip, but
 meanwhile this makes boards actually resume.
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Merge tag 'v4.3-rockchip32-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc

Improve reliability of resume on rk3288 boards. For whatever
reason resuming from suspend worked sucessfully on the rk3288-evb
but not on other boards, like veyron-devices. Two problems seem
to have existed. For one the stabilization delays for pmic and
oscillator may have been to short and secondly the shallow
suspend seems to need GPIO wakups enabled. Normally this should
be covered by the more generic ARMINT wakeups already and
the reason for this is still investigated at Rockchip, but
meanwhile this makes boards actually resume.

* tag 'v4.3-rockchip32-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
  ARM: rockchip: set correct stabilization thresholds in suspend
  ARM: rockchip: rename osc_switch_to_32k variable

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:13:54 +02:00
Masahiro Yamada
fb3c442676 ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
This is unnecessary since commit 02b4e2756e ("ARM: v7 setup
function should invalidate L1 cache").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:12:10 +02:00
Olof Johansson
ab39aab323 Add SMP support for mt6795 SoC.
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Merge tag 'v4.2-next-arm64-2' of https://github.com/mbgg/linux-mediatek into next/arm64

Add SMP support for mt6795 SoC.

* tag 'v4.2-next-arm64-2' of https://github.com/mbgg/linux-mediatek:
  ARM64: dts: mt6795: enable basic SMP bringup for MT6795

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:10:09 +02:00