Commit graph

361,345 commits

Author SHA1 Message Date
Paul Gortmaker
04861c535d drivers/net: delete Racal Interlan ISA ni52 (i825xx) driver
Like the other drivers that were in the ISA i825xx family, the ni52
was rather rare, not widely used, and hence perhaps not as reliable
as the more mainstream ISA drivers that were heavily used.  Given
that, it is chosen for retirement at this time as well.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-01-22 10:39:52 -05:00
Paul Gortmaker
8a594170de drivers/net: delete intel i825xx based znet notebook driver
This driver supported early to mid 1990's Zenith laptops, of the
2" thick variety.  The driver was already dead 10+ years ago, but
we see this in the source:

 ----------------
 /* 10/2002

 [...]

   Tested on a vintage Zenith Z-Note 433Lnp+. Probably broken on
   anything else. Testers (and detailed bug reports) are welcome :-).
 ----------------

To clarify, a 433 translates into a 486 at 33MHz, and a system with
a default of 4MB RAM.  I can't fault the noble effort to keep things
working a decade ago, but at this point in time, there is no valid
justification to continue carrying this driver along.

Note that there is no associated Space.c cleanup here since this
driver was using module_init to hook itself in.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-01-22 10:39:51 -05:00
Paul Gortmaker
f84932d831 drivers/net: delete ISA intel eexpress and eepro i825xx drivers
These old drivers should not be confused with the very common PCI
cards that are supported by e100.c -- these older 10Mbit ISA only
drivers were not as commonly used as some of the other ISA drivers,
simply due to hardware availability and pricing.

Given the rarity of the hardware, and the subsequent less extensive
use of the drivers, it makes sense to obsolete them at this point
in time, along with other rare/experimental ISA drivers.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-01-22 10:39:51 -05:00
Paul Gortmaker
0e245dbaac drivers/net: delete the 3Com 3c505/3c507 intel i825xx support
For those of us who were around in the early to mid 1990's, we
will remember that the i825xx ethernet support was not something
that was considered sufficiently vetted for 24/7 use.

Folks might be inclined to use *functional* ISA hardware on some
near expired P3 ISA machines for dedicated workhorse applications,
but the odds of using (and relying on) one of these old/experimental
drivers is essentially nil.  So lets remove them.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-01-22 10:39:50 -05:00
Paul Gortmaker
168e06ae26 drivers/net: delete old parallel port de600/de620 drivers
The parallel port is largely replaced by USB, and even in the
day where these drivers were current, the documented speed was
less than 100kB/s.  Let us not pretend that anyone cares about
these drivers anymore, or worse - pretend that anyone is using
them on a modern kernel.

As a side bonus, this is the end of legacy parallel port ethernet,
so we get to drop the whole chunk relating to that in the legacy
Space.c file containing the non-PCI unified probe dispatch.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-01-22 10:39:49 -05:00
Paul Gortmaker
de8270ff46 drivers/net: delete old 8bit ISA 3c501 driver.
It was amusing that linux was able to make use of this 1980's
technology on machines long past its intended lifespan, but
it probably should go now.

To set some context, the 3c501 was designed in the 1980's to be
used on 8088 PC-XT 8bit ISA machines.  It was built using a large
number of discrete TTL components and truly looks like a relic
of the ancient past before large scale integration was common.

But from a functional point of view, the real issue, as stated
in the (also obsolete) Ethernet-HowTo, is that "...the 3c501 can
only do one thing at a time -- while you are removing one packet
from the single-packet buffer it cannot receive another packet,
nor can it receive a packet while loading a transmit packet."

You know things are not good when the Kconfig help text suggests
you make a cron job doing a ping every minute.

Hardware that old and crippled is simply not going to be used by
anyone in a time where 10 year old 100Mbit PCI cards (that are
still functional) are largely give-away items.

Cc: Alan Cox <alan@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-01-22 10:39:49 -05:00
Paul Gortmaker
5205939d0f drivers/net: delete intel 486 panther onboard ethernet support
This driver was specific to a "professional workstation" line
of products from around 1993 that used the i82596 ethernet chip
as an on-board ethernet solution.

With a 486 processor, and the premium top of the line model maxing
out at a clock speed of 50MHz, we can safely retire this support.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-01-22 10:39:48 -05:00
Paul Gortmaker
6e07ba3e6a drivers/net: delete 486 Apricot support
The Apricot was a 486 PC with 4MB RAM, and an on-board ethernet
via an intel i82596 hard-wired to i/o 0x300.

Those who were using linux in the 1990's will recall that the
i82596 driver was not one of the more stable or widely used
drivers of its day.  Combine that with the extremely limited
resources of the platform, and it is truly time to expire the
support for this thing.

There are some old m68k targets who were also using this chip,
so rather than poll the m68k user base, we simply cut out the
x86/Apricot support here in this commit.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-01-22 10:32:35 -05:00
Jens Axboe
1383923d19 Merge branch 'for-jens' of git://git.drbd.org/linux-drbd into for-linus 2013-01-22 08:22:11 -07:00
Aaro Koskinen
9eb13cf3ec i2c: omap: fix draining irq handling
Commit 0bdfe0cb80 (i2c: omap: sanitize
exit path) changed the interrupt handler to exit early and complete
the transfer after the draining IRQ is handled. As a result, the ARDY
may not be cleared properly, and it may cause all future I2C transfers
to timeout with "timeout waiting for bus ready". This is reproducible
at least with N900 when twl4030_gpio makes a long write (> FIFO size)
during the probe (http://marc.info/?l=linux-omap&m=135818882610432&w=2).

The fix is to continue until we get ARDY interrupt that completes the
transfer. Tested with 3.8-rc4 + N900: 20 boots in a row without errors;
without the patch the problem triggers after few reboots.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2013-01-22 16:17:05 +01:00
Aaro Koskinen
2c5de558cd i2c: omap: errata i462: fix incorrect ack for arbitration lost interrupt
The errata handling function acks wrong interrupt in case of "Arbitration
lost". Fix it.

Discovered during code review, the real impact of the bug is unknown.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2013-01-22 16:17:04 +01:00
Takashi Iwai
dc870f38e9 ALSA: hda - Combine snd_hda_codec_flush_*_cache() to a single function
Since both snd_hda_codec_flush_amp_cache() and
snd_hda_codec_flush_cmd_cache() are called usually at the same time,
we can simply combine them to a single function,
snd_hda_codec_flush_cache().

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2013-01-22 15:25:25 +01:00
Takashi Iwai
a836dbf685 ALSA: hda - Fix missing call of cmd flush in capture volume put callback
The capture volume put callback may call the node selection change,
and its actual call won't be triggered unless flushed.  In general,
we always need to call both snd_hda_codec_flush_amp_cache() and
snd_hda_codec_flush_cmd_cache() at the same place...

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2013-01-22 15:18:17 +01:00
Takashi Iwai
4bd01e9336 ALSA: hda - Add missing exports to helper functions
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2013-01-22 15:17:20 +01:00
Takashi Iwai
42875479b2 ALSA: hda - Revive SPDIF mux for IDT/STAC codecs
The stuff that was dropped while transition to the generic parser is
now recovered.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2013-01-22 14:12:44 +01:00
Takashi Iwai
92603c5945 ALSA: hda - Disable HP auto-mute during independent HP mode
Both the HP auto-mute and the independent HP mode conflict with each
other.  Make HP auto-mute disabled (only for the affected HP jack)
during the driver is in HP independent mode.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2013-01-22 14:12:42 +01:00
Takashi Iwai
a607148ff3 ALSA: hda - Set individual name to secondary analog PCM stream
It'd be better to give another name to the secondary (alt) analog PCM
stream, which is dedicated for the independent HP out and extra
inputs.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2013-01-22 14:12:40 +01:00
Takashi Iwai
f2f8be43c5 ALSA: hda - Add aamix NID to AD codecs
The aamix NIDs are also missing for AD codecs.  All AD codecs seem to
have a (more or less) working aamix widget.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2013-01-22 14:12:08 +01:00
Mika Kuoppala
9943393195 drm/i915: use gem_set_seqno() on hardware init
When machine was rebooted or module was reloaded,
gem_hw_init() set last_seqno to be identical to next_seqno.
This lead to situation that waits for first ever request
always passed immediately regardless if it was actually
executed.

Use gem_set_seqno() to be consistent how hw is
initialized on init, wrap and on resume.

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-01-22 13:52:26 +01:00
Maxime Ripard
c54729eeb0 ARM: sunxi: olinuxino: Add muxing for the uart
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-22 13:51:37 +01:00
Maxime Ripard
4348cc643a ARM: sunxi: Add uart1 pinctrl groups
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-22 13:51:37 +01:00
Maxime Ripard
9e2dcb2f3c ARM: sunxi: Add pinctrl node to the device tree
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-22 13:51:36 +01:00
Maxime Ripard
eaa3d8489d ARM: pinctrl: sunxi: Add the pinctrl pin set for sun5i
Since the Allwinner SoCs variants don't have the same set of pins to
handle, we need to declare the pin ranges available.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-22 13:51:35 +01:00
Maxime Ripard
0e37f88d9a ARM: sunxi: Add pinctrl driver for Allwinner SoCs
The Allwinner SoCs have an IP module that handle both the muxing and the
GPIOs.

This IP has 8 banks of 32 bits, with a number of pins actually useful
for each of these banks varying from one to another, and depending on
the SoC used on the board.

This driver only implements the pinctrl part, the gpio part will come
eventually.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-22 13:51:15 +01:00
Haojian Zhuang
8b77b3762c Revert "pinctrl: single: support gpio request and free"
This reverts commit 2e8b2eab94.

Conflicts:
	drivers/pinctrl/pinctrl-single.c

ERROR: "__aeabi_uldivmod" [drivers/pinctrl/pinctrl-single.ko]
undefined!]

On Fri, Jan 11, 2013 at 4:00 PM, Russell King wrote:

> The above error happens in builds including pinctrl-single - the
> reason
> is this, where resource_size_t may be 64-bit.
>
>                 gpio->range.pin_base = (r.start - pcs->res->start) /
>                 mux_bytes;
>                 gpio->range.npins = (r.end - r.start) / mux_bytes + 1;

The reason of not fixing this issue and reverting the patch instead is
this patch can't handle another case. It's not easy to handle multiple
gpios sharing one pin register. So this gpio range feature will be
implemented by other patches.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-01-22 13:48:07 +01:00
Stefan Bader
9855d8ce41 ACPI: Check MSR valid bit before using P-state frequencies
To fix incorrect P-state frequencies which can happen on
some AMD systems f594065faf
   "ACPI: Add fixups for AMD P-state figures"
introduced a quirk to obtain the correct values by reading
from AMD specific MSRs.

This did cause a regression when running a kernel using that
quirk under Xen which does (currently) not pass through MSR
reads to the HW. Instead the guest gets a 0 in return.
And this seems to cause a failure to initialize the ondemand
governour (hard to say for sure as all P-states appear to run
at the same frequency).

While this should also be fixed in the hypervisor (to allow
a guest to read that MSR), this patch is intended to work
around the issue in the meantime. In discussion it turned out
that indeed real HW/BIOSes may choose to not set the valid bit
and thus mark the P-state as invalid. So this could be considered
a fix for broken BIOSes that also works around the issue on Xen.

Signed-off-by: Stefan Bader <stefan.bader@canonical.com>
Cc: 3.7+ <stable@vger.kernel.org>
Acked-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 13:37:21 +01:00
Gerald Schaefer
be3286507d s390/thp: implement pmdp_set_wrprotect()
On s390, an architecture-specific implementation of the function
pmdp_set_wrprotect() is missing and the generic version is currently
being used. The generic version does not flush the tlb as it would be
needed on s390 when modifying an active pmd, which can lead to subtle
tlb errors on s390 when using transparent hugepages.

This patch adds an s390-specific implementation of pmdp_set_wrprotect()
including the missing tlb flush.

Cc: stable@vger.kernel.org
Signed-off-by: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-01-22 13:32:16 +01:00
Nishanth Menon
8fa938acb3 PM / devfreq: exynos4_bus: honor RCU lock usage
OPP pointers cannot be expected to be valid beyond the boundary
of rcu_read_lock and rcu_read_unlock. Unfortunately, the current
exynos4 busfreq driver does not honor the usage constraint and stores
the OPP pointer in struct busfreq_data. This could potentially
become invalid later such as: across devfreq opp change decisions,
resulting in unpredictable behavior.

To fix this, we introduce a busfreq specific busfreq_opp_info
structure which is used to handle OPP information. OPP information
is de-referenced to voltage and frequency pairs as needed into
busfreq_opp_info structure and used as needed.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 13:28:40 +01:00
Nishanth Menon
bcb27549f4 PM / devfreq: add locking documentation for recommended_opp
OPP pointers are protected by RCU locks, the pointer validity is
permissible only under the section of rcu_read_lock to rcu_read_unlock

Add documentation to the effect.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 13:28:39 +01:00
Nishanth Menon
78e8eb8fea cpufreq: cpufreq-cpu0: use RCU locks around usage of OPP
OPP pointer is RCU protected, hence after finding it, de-reference
also should be protected with the same RCU context else the OPP
pointer may become invalid.

Reported-by: Jack Mitchell <jack@embed.me.uk>
Tested-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Jack Mitchell <jack@embed.me.uk>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 13:28:39 +01:00
Nishanth Menon
f44d188acd cpufreq: OMAP: use RCU locks around usage of OPP
OPP pointer is RCU protected, hence after finding it, de-reference
also should be protected with the same RCU context else the OPP
pointer may become invalid.

Reported-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 13:28:39 +01:00
Robert Tivy
af47e6bb88 ARM: davinci: psc: introduce reset API
Introduce an IP reset API for use on DaVinci SoC.

There is no existing "reset" framework support for SoC devices.
The remoteproc driver needs explicit control of the DSP's reset line.
To support this, a new DaVinci specific API is added.

This private API will disappear with DT migration.  Some discussion
regarding a proposed DT "reset" binding is here:
https://patchwork.kernel.org/patch/1635051/

Modify davinci_clk_init() to set clk "reset" function for clocks
that indicate PSC_LRST support.  Also fix indentation issue with
function opening curly brace.

Signed-off-by: Robert Tivy <rtivy@ti.com>
[nsekhar@ti.com: rename davinci_psc_config_reset() to davinci_psc_reset()]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-01-22 17:42:59 +05:30
Rafael J. Wysocki
e5656271b0 ACPI / PM: Fix device power state value after transitions to D3cold
When a transition to the D3cold power state is requested,
acpi_device_set_power() first carries out a transition to D3hot and
then turns off the device's power resources.  However, it fails to
update the device's power.state field appropriately and D3hot is
stored in it as a result.

Fix this, but make sure that the device's power state will be
D3hot if its power resources cannot be turned off in the final
step.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 12:56:35 +01:00
Rafael J. Wysocki
898fee4f6e ACPI / PM: Use string "D3cold" to represent ACPI_STATE_D3_COLD
Make acpi_power_state_string() return "D3cold" as the string
representation of ACPI power state D3cold instead of "D3" returned
currently, which is confusing.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 12:56:26 +01:00
Rafael J. Wysocki
87e753b006 ACPI / PM: Sanitize checks in acpi_power_on_resources()
After the only user of acpi_power_on_resources(),
acpi_bus_init_power(), has been changed to avoid calling it
for state equal to ACPI_STATE_D3_COLD, it doesn't have to special
case that state any more.

For this reason, modify the checks in acpi_power_on_resources()
so that it returns -EINVAL for ACPI_STATE_D3_COLD as it should.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 12:56:16 +01:00
Rafael J. Wysocki
e78adb7595 ACPI / PM: Always evaluate _PSn after setting power resources
The ACPI specitication (ACPI 5, Sections 7.2.8 - 7.2.11) requires
that the _PSn (n = 0..3) method, if present, be executed after the
power resources for the given device power state have been set
appropriately.  However, acpi_device_set_power() does that only
if the new power state is going to be higher-power (lower-number)
than the power state the device is in already.  Otherwise, the
ordering is reverse to protect against situations in which _PSn
might access device registers unavailable after configuring the
power resources for power state Dn (D3 meaning D3hot).

Such situations are very unlikely to happen, though, and _PSn may
actually be implemented with the assumption that power resources
have been configured for power state Dn in advance, so change the
code to follow the specification literally.

This change was previously porposed in a different form by Lv Zheng.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 12:56:04 +01:00
Rafael J. Wysocki
9c0f45e388 ACPI / PM: Introduce helper for executing _PSn methods
To reduce code duplication between acpi_device_set_power() and
acpi_bus_init_power(), introduce a new helper function for executing
ACPI devices' _PSn (n = 0..3) methods, acpi_dev_pm_explicit_set().

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 12:55:52 +01:00
Rafael J. Wysocki
a2367807b8 ACPI / PM: Make acpi_bus_init_power() more robust
The ACPI specification requires the _PSC method to be present under
a device object if its power state cannot be inferred from the states
of power resources used by it (ACPI 5, Section 7.6.2).  However, it
also requires that (for power states D0-D2 and D3hot) if the _PSn
(n = 0, 1, 2, 3) method is present under the device object, it also
must be executed after the power resources have been set
appropriately for the device to go into power state Dn (D3 means
D3hot in this case).  Thus it is not clear from the specification
whether or not the _PSn method should be executed if the initial
configuraion of power resources used by the device indicates power
state Dn and the _PSC method is not present.

The current implementation of acpi_bus_init_power() is based on the
assumption that it should not be necessary to execute _PSn in the
above situation, but experience shows that in fact that assumption
need not be satisfied.  For this reason, make acpi_bus_init_power()
always execute _PSn if the initial configuration of device power
resources indicates power state Dn.

Reported-and-tested-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2013-01-22 12:54:38 +01:00
Jani Nikula
5559ecadad drm/i915: add quirk to invert brightness on Packard Bell NCL20
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44156
Reported-by: Alan Zimmerman <alan.zimm@gmail.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-01-22 12:54:28 +01:00
Jani Nikula
01e3a8feb4 drm/i915: add quirk to invert brightness on eMachines e725
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=31522#c35
[Note: There are more than one broken setups in the bug. This fixes one.]
Reported-by: Martins <andrissr@inbox.lv>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-01-22 12:54:26 +01:00
Jani Nikula
1ffff60320 drm/i915: add quirk to invert brightness on eMachines G725
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59628
Reported-by: Roland Gruber <post@rolandgruber.de>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-01-22 12:54:23 +01:00
Barry Song
7f46a10724 ARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco
prima2 and marco has different memory base, the old code will
fail if we enable DEBUG_LL in marco.
this patch adds two debuf port, while debugging, we select one
of PRIMA2 and MARCO debug ports, in the products, we disable
DEBUG_LL.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
2013-01-22 19:53:36 +08:00
Barry Song
4898de3d15 ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures
this patch adds tick timer, smp entries and generic DT machine
for SiRFmarco dual-core SMP chips.

with the added marco, we change the defconfig, using the same
defconfig, we get a zImage which can work on both prima2 and
marco.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Cc: Mark Rutland <mark.rutland@arm.com>
2013-01-22 19:53:27 +08:00
Ralf Baechle
f051e3a933 MIPS: PNX833x: Fix comment.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-01-22 12:52:22 +01:00
Barry Song
f2a94192d9 ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco
in Marco, we will use GIC. this patch prepares the handle_irq for prima2
to avoid the compiling errors since we want only one defconfig and zImage
for both prima2 and marco that means we will need handle_irq for both.

Signed-off-by: Baohua Song <Baohua.Song@csr.com>
2013-01-22 19:39:14 +08:00
Barry Song
598548facd ARM: PRIMA2: rtciobg: it is also compatible with marco
Signed-off-by: Barry Song <Baohua.Song@csr.com>
2013-01-22 19:39:02 +08:00
Barry Song
0ecb40ca35 ARM: PRIMA2: rstc: enable the support for Marco
marco has SET/CLEAR registers pair for rstc to avoid read-modify-write,
this patch detects the mach typer and access registers based on SoC.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
2013-01-22 19:38:48 +08:00
Barry Song
0d5983a62a ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco
Marco timer has different timer IP with prima2, so rename the current timer
to timer-prima2 so that we can add timer-marco.

at the same time, if we don't find prima2 timer node in dt, don't panic the
system as we will make prima2 and marco use same kernel image.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
2013-01-22 19:38:24 +08:00
Barry Song
ea38960fb6 ARM: PRIMA2: initialize l2x0 according to mach from DT
prima2 and marco have diffetent l2 cache configuration, so
we initialize l2x0 cache based on dtb given to kernel.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
2013-01-22 19:37:15 +08:00
Barry Song
20ddfa9324 ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig
prima2 and marco have different memory base address. prima2
begins from 0 and marco begins from 0x40000000.
This patch enables AUTO_ZRELADDR so that kernel can detect
the physical address automatically.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
CC: Mark Rutland <mark.rutland@arm.com>
2013-01-22 19:34:46 +08:00