The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6sx-nitrogen6sx.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
There is no need for an explicit status = "okay" in the pwm node as
the soc dtsi doesn't disable this device. Drop this property, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6sll-evk.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
There is no need for an explicit status = "okay" in the pwm node as
the soc dtsi doesn't disable this device. Drop this property, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6sl-evk.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
There is no need for an explicit status = "okay" in the pwm node as
the soc dtsi doesn't disable these devices. Drop this property, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6q-var-dt6customboard.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6q-prti6q.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6q-pistachio.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6q-novena.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6q-kp-tpc.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-kp-tpc.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-skov-revc-lt2.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-skov-revc-lt6.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-skov-revc-lt2.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-skov-revc-lt6.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-savageboard.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-savageboard.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-sabresd.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-sabresd.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-sabrelite.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-sabrelite.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-sabrelite.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-sabrelite.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-sabrelite.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-sabrelite.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-sabreauto.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-sabreauto.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-phytec-mira-rdk-nand.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-phytec-mira-rdk-emmc.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-phytec-mira-rdk-nand.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6qp-phytec-mira-rdk-nand.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-nitrogen6x.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-nitrogen6x.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-nitrogen6x.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-nitrogen6x.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6q-nitrogen6_som2.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-nitrogen6_som2.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6qp-nitrogen6_som2.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6qp-nitrogen6_som2.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6q-nitrogen6_max.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-nitrogen6_max.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-nitrogen6_max.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6qp-nitrogen6_max.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6qp-nitrogen6_max.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6qp-nitrogen6_max.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-nit6xlite.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-nit6xlite.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-icore.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-icore-mipi.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-icore.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-icore-mipi.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-icore-ofcap10.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-icore-ofcap12.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-gw5904.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-gw5904.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-gw5903.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-gw5903.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-gw560x.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-gw560x.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-gw54xx.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-gw54xx.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-gw53xx.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-gw53xx.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-gw52xx.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-gw52xx.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-emcon-avari.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-emcon-avari.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-emcon-avari.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-cubox-i.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-cubox-i-emmc-som-v15.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-cubox-i-som-v15.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-cubox-i.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-cubox-i-emmc-som-v15.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-cubox-i-som-v15.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_7.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6dl-apf6dev.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-apf6dev.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dtb: pwm@2084000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-bosch-acc.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx6q-b450v3.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-b650v3.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-b850v3.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx6q-dms-ba16.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6dl-mamoj.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx53-kp.dtsi includes imx53-tqma53.dtsi which already sets #pwm-cells
to 2. So the two nodes can be dropped without resulting in any changes
in the compiled device tree blobs.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warnings:
arch/arm/boot/dts/nxp/imx/imx53-ppd.dtb: pwm@53fb4000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
arch/arm/boot/dts/nxp/imx/imx53-ppd.dtb: pwm@53fb8000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx53-m53evk.dtb: pwm@53fb4000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The binding dictates using 3 pwm-cells. Adhere to that.
This fixes the following dtbs_check warning:
arch/arm/boot/dts/nxp/imx/imx51-ts4800.dtb: pwm@73fb4000: #pwm-cells:0:0: 3 was expected
from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml#
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
pci_alloc_irq_vectors() allocates an irq vector. When devm_add_action()
fails, the irq vector is not freed, which leads to a memory leak.
Replace the devm_add_action with devm_add_action_or_reset to ensure
the irq vector can be destroyed when it fails.
Fixes: 66637ab137 ("drivers/perf: hisi: add driver for HNS3 PMU")
Signed-off-by: Hao Chen <chenhao418@huawei.com>
Signed-off-by: Junhao He <hejunhao3@huawei.com>
Reviewed-by: Jijie Shao <shaojijie@huawei.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20240425124627.13764-4-hejunhao3@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
The perf tool allows users to create event groups through following
cmd [1], but the driver does not check whether the array index is out
of bounds when writing data to the event_group array. If the number of
events in an event_group is greater than HNS3_PMU_MAX_HW_EVENTS, the
memory write overflow of event_group array occurs.
Add array index check to fix the possible array out of bounds violation,
and return directly when write new events are written to array bounds.
There are 9 different events in an event_group.
[1] perf stat -e '{pmu/event1/, ... ,pmu/event9/}
Fixes: 66637ab137 ("drivers/perf: hisi: add driver for HNS3 PMU")
Signed-off-by: Junhao He <hejunhao3@huawei.com>
Signed-off-by: Hao Chen <chenhao418@huawei.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Jijie Shao <shaojijie@huawei.com>
Link: https://lore.kernel.org/r/20240425124627.13764-3-hejunhao3@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
The perf tool allows users to create event groups through following
cmd [1], but the driver does not check whether the array index is out of
bounds when writing data to the event_group array. If the number of events
in an event_group is greater than HISI_PCIE_MAX_COUNTERS, the memory write
overflow of event_group array occurs.
Add array index check to fix the possible array out of bounds violation,
and return directly when write new events are written to array bounds.
There are 9 different events in an event_group.
[1] perf stat -e '{pmu/event1/, ... ,pmu/event9/}'
Fixes: 8404b0fbc7 ("drivers/perf: hisi: Add driver for HiSilicon PCIe PMU")
Signed-off-by: Junhao He <hejunhao3@huawei.com>
Reviewed-by: Jijie Shao <shaojijie@huawei.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20240425124627.13764-2-hejunhao3@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
There is a 'malloc' call, which can be unsuccessful.
This patch will add the malloc failure checking
to avoid possible null dereference and give more information
about test fail reasons.
Signed-off-by: Kunwu Chan <chentao@kylinos.cn>
Reviewed-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
Link: https://lore.kernel.org/r/20240423082102.2018886-1-chentao@kylinos.cn
Signed-off-by: Will Deacon <will@kernel.org>
For historical reasons we unmask debug exceptions in __cpu_setup(), but
it's not necessary to unmask debug exceptions this early in the
boot/idle entry paths. It would be better to unmask debug exceptions
later in C code as this simplifies the current code and will make it
easier to rework exception masking logic to handle non-DAIF bits in
future (e.g. PSTATE.{ALLINT,PM}).
We started clearing DAIF.D in __cpu_setup() in commit:
2ce39ad151 ("arm64: debug: unmask PSTATE.D earlier")
At the time, we needed to ensure that DAIF.D was clear on the primary
CPU before scheduling and preemption were possible, and chose to do this
in __cpu_setup() so that this occurred in the same place for primary and
secondary CPUs. As we cannot handle debug exceptions this early, we
placed an ISB between initializing MDSCR_EL1 and clearing DAIF.D so that
no exceptions should be triggered.
Subsequently we rewrote the return-from-{idle,suspend} paths to use
__cpu_setup() in commit:
cabe1c81ea ("arm64: Change cpu_resume() to enable mmu early then access sleep_sp by va")
... which allowed for earlier use of the MMU and had the desirable
property of using the same code to reset the CPU in the cold and warm
boot paths. This introduced a bug: DAIF.D was clear while
cpu_do_resume() restored MDSCR_EL1 and other control registers (e.g.
breakpoint/watchpoint control/value registers), and so we could
unexpectedly take debug exceptions.
We fixed that in commit:
744c6c37cc ("arm64: kernel: Fix unmasked debug exceptions when restoring mdscr_el1")
... by having cpu_do_resume() use the `disable_dbg` macro to set DAIF.D
before restoring MDSCR_EL1 and other control registers. This relies on
DAIF.D being subsequently cleared again in cpu_resume().
Subsequently we reworked DAIF masking in commit:
0fbeb31875 ("arm64: explicitly mask all exceptions")
... where we began enforcing a policy that DAIF.D being set implies all
other DAIF bits are set, and so e.g. we cannot take an IRQ while DAIF.D
is set. As part of this the use of `disable_dbg` in cpu_resume() was
replaced with `disable_daif` for consistency with the rest of the
kernel.
These days, there's no need to clear DAIF.D early within __cpu_setup():
* setup_arch() clears DAIF.DA before scheduling and preemption are
possible on the primary CPU, avoiding the problem we we originally
trying to work around.
Note: DAIF.IF get cleared later when interrupts are enabled for the
first time.
* secondary_start_kernel() clears all DAIF bits before scheduling and
preemption are possible on secondary CPUs.
Note: with pseudo-NMI, the PMR is initialized here before any DAIF
bits are cleared. Similar will be necessary for the architectural NMI.
* cpu_suspend() restores all DAIF bits when returning from idle,
ensuring that we don't unexpectedly leave DAIF.D clear or set.
Note: with pseudo-NMI, the PMR is initialized here before DAIF is
cleared. Similar will be necessary for the architectural NMI.
This patch removes the unmasking of debug exceptions from __cpu_setup(),
relying on the above locations to initialize DAIF. This allows some
other cleanups:
* It is no longer necessary for cpu_resume() to explicitly mask debug
(or other) exceptions, as it is always called with all DAIF bits set.
Thus we drop the use of `disable_daif`.
* The `enable_dbg` macro is no longer used, and so is dropped.
* It is no longer necessary to have an ISB immediately after
initializing MDSCR_EL1 in __cpu_setup(), and we can revert to relying
on the context synchronization that occurs when the MMU is enabled
between __cpu_setup() and code which clears DAIF.D
Comments are added to setup_arch() and secondary_start_kernel() to
explain the initial unmasking of the DAIF bits.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20240422113523.4070414-3-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
A comment in the disable_step_tsk macro refers to synchronising with
enable_dbg, as historically the entry used enable_dbg to unmask debug
exceptions after disabling single-stepping.
These days the unmasking happens in entry-common.c via
local_daif_restore() or local_daif_inherit(), so the comment is stale.
This logic is likely to chang in future, so it would be best to avoid
referring to those macros specifically.
Update the comment to take this into account, and describe it in terms
of clearing DAIF.D so that it doesn't macro where this logic lives nor
what it is called.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20240422113523.4070414-2-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Fix left shift overflow issue when the parameter idx is greater than or
equal to 8 in the calculation of perm in PIRx_ELx_PERM macro.
Fix this by modifying the encoding to use a long integer type.
Signed-off-by: Shiqi Liu <shiqiliu@hust.edu.cn>
Acked-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20240421063328.29710-1-shiqiliu@hust.edu.cn
Signed-off-by: Will Deacon <will@kernel.org>
- Soundness: make internal functions generated by the 'module!' macro
inaccessible, do not implement 'Zeroable' for 'Infallible' and
require 'Send' for the 'Module' trait.
- Build: avoid errors with "empty" files and workaround 'rustdoc' ICE.
- Kconfig: depend on '!CFI_CLANG' and avoid selecting 'CONSTRUCTORS'.
- Code docs: remove non-existing key from 'module!' macro example.
- Docs: trivial rendering fix in arch table.
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Merge tag 'rust-fixes-6.9' of https://github.com/Rust-for-Linux/linux
Pull Rust fixes from Miguel Ojeda:
- Soundness: make internal functions generated by the 'module!' macro
inaccessible, do not implement 'Zeroable' for 'Infallible' and
require 'Send' for the 'Module' trait.
- Build: avoid errors with "empty" files and workaround 'rustdoc' ICE.
- Kconfig: depend on '!CFI_CLANG' and avoid selecting 'CONSTRUCTORS'.
- Code docs: remove non-existing key from 'module!' macro example.
- Docs: trivial rendering fix in arch table.
* tag 'rust-fixes-6.9' of https://github.com/Rust-for-Linux/linux:
rust: remove `params` from `module` macro example
kbuild: rust: force `alloc` extern to allow "empty" Rust files
kbuild: rust: remove unneeded `@rustc_cfg` to avoid ICE
rust: kernel: require `Send` for `Module` implementations
rust: phy: implement `Send` for `Registration`
rust: make mutually exclusive with CFI_CLANG
rust: macros: fix soundness issue in `module!` macro
rust: init: remove impl Zeroable for Infallible
docs: rust: fix improper rendering in Arch Support page
rust: don't select CONSTRUCTORS
* A fix for TASK_SIZE on rv64/NOMMU, to reflect the lack of user/kernel
separation.
* A fix to avoid loading rv64/NOMMU kernel past the start of RAM.
* A fix for RISCV_HWPROBE_EXT_ZVFHMIN on ilp32 to avoid signed integer
overflow in the bitmask.
* The sud_test kselftest has been fixed to properly swizzle the syscall
number into the return register, which are not the same on RISC-V.
* A fix for a build warning in the perf tools on rv32.
* A fix for the CBO selftests, to avoid non-constants leaking into the
inline asm.
* A pair of fixes for T-Head PBMT errata probing, which has been renamed
MAE by the vendor.
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Merge tag 'riscv-for-linus-6.9-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt:
- A fix for TASK_SIZE on rv64/NOMMU, to reflect the lack of user/kernel
separation
- A fix to avoid loading rv64/NOMMU kernel past the start of RAM
- A fix for RISCV_HWPROBE_EXT_ZVFHMIN on ilp32 to avoid signed integer
overflow in the bitmask
- The sud_test kselftest has been fixed to properly swizzle the syscall
number into the return register, which are not the same on RISC-V
- A fix for a build warning in the perf tools on rv32
- A fix for the CBO selftests, to avoid non-constants leaking into the
inline asm
- A pair of fixes for T-Head PBMT errata probing, which has been
renamed MAE by the vendor
* tag 'riscv-for-linus-6.9-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
RISC-V: selftests: cbo: Ensure asm operands match constraints, take 2
perf riscv: Fix the warning due to the incompatible type
riscv: T-Head: Test availability bit before enabling MAE errata
riscv: thead: Rename T-Head PBMT to MAE
selftests: sud_test: return correct emulated syscall value on RISC-V
riscv: hwprobe: fix invalid sign extension for RISCV_HWPROBE_EXT_ZVFHMIN
riscv: Fix loading 64-bit NOMMU kernels past the start of RAM
riscv: Fix TASK_SIZE on 64-bit NOMMU
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Merge tag '6.9-rc5-cifs-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6
Pull smb client fixes from Steve French:
"Three smb3 client fixes, all also for stable:
- two small locking fixes spotted by Coverity
- FILE_ALL_INFO and network_open_info packing fix"
* tag '6.9-rc5-cifs-fixes-part2' of git://git.samba.org/sfrench/cifs-2.6:
smb3: fix lock ordering potential deadlock in cifs_sync_mid_result
smb3: missing lock when picking channel
smb: client: Fix struct_group() usage in __packed structs