Commit graph

693,635 commits

Author SHA1 Message Date
Al Viro
c0ef65d292 ufs_iget(): fail with -ESTALE on deleted inode
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2017-06-17 12:25:58 -04:00
Al Viro
23ac7cba73 fix signedness of timestamps on ufs1
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2017-06-17 12:25:13 -04:00
Christopher Spinrath
d8710c3fb9 ARM: dts: imx6q-cm-fx6: add sdio wifi/bt nodes
The cm-fx6 module has an on-board AW-NH387 WiFi/BT module which is
based on Marvell's SD8787 chip and is connected to the usdhc1
controller.

Unfortunately, the chip gets unresponsive if the Bluetooth AMP
(Alternate Mac/Phy) function gets probed but the loaded firmware
doesn't support it. For instance, this is the case for the most
recent firmware in linux-firmware (Version 14.66.35.p52).

Thus, just add the required nodes but leave the usdhc1 node disabled
explicitly. Users who disabled the Bluetooth (AMP) support of their
OS can then conveniently enable WiFi (or even plain Bluetooth) support
with a simple device tree overlay/bootloader configuration.

Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-17 21:17:04 +08:00
Fabio Estevam
2446563c74 dmaengine: Kconfig: Simplify the help text for MXS_DMA
Currently the help text for the MXS_DMA option is incomplete as it does
not mention MX6SX, MX6ULL and MX7D, for example.

Instead of extending this list everytime a new SoC comes out, let's
keep the text more generic.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-06-17 18:32:05 +05:30
Matthias Kaehlcke
d43674ecc0 dmaengine: pl330: Delete unused functions
The functions _queue_empty(), _emit_ADDH(), _emit_NOP(), _emit_STZ()
and _emit_WFE() are not used. Delete them.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2017-06-17 18:17:46 +05:30
Andreas Färber
fd0238cfc0 dt-bindings: arm: Document Actions Semi S500
The Actions Semi S500 is a quad-core ARM Cortex-A9 SoC.
The LeMaker Guitar is an SODIMM-format module with that SoC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2017-06-17 14:36:03 +02:00
Andreas Färber
67209775bb dt-bindings: Add vendor prefix for Actions Semi
Actions Semiconductor was listed on NASDAQ as ACTS until Dec 16, 2016.

Cc: mp-cs@actions-semi.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
2017-06-17 14:34:24 +02:00
Rob Clark
51c9fbe694 bus: SIMPLE_PM_BUS does not depend on ARCH_RENESAS
In fact, it is needed for PCI to work on msm8996 (and probably other
things).  No idea why it was depending on renesas but that doesn't make
any sense.  So drop the dependency.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2017-06-17 08:03:08 -04:00
Sushmita Susheelendra
0e08270a1f drm/msm: Separate locking of buffer resources from struct_mutex
Buffer object specific resources like pages, domains, sg list
need not be protected with struct_mutex. They can be protected
with a buffer object level lock. This simplifies locking and
makes it easier to avoid potential recursive locking scenarios
for SVM involving mmap_sem and struct_mutex. This also removes
unnecessary serialization when creating buffer objects, and also
between buffer object creation and GPU command submission.

Signed-off-by: Sushmita Susheelendra <ssusheel@codeaurora.org>
[robclark: squash in handling new locking for shrinker]
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-06-17 08:03:07 -04:00
Linus Torvalds
adc311034c Changes since last update:
- Fix some bogus ASSERT failures on CONFIG_SMP=n and CONFIG_XFS_DEBUG=y.
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Merge tag 'xfs-4.12-fixes-4' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux

Pull xfs fix from Darrick Wong:
 "One more bugfix for you for 4.12-rc6 to fix something that came up in
  an earlier rc:

   - Fix some bogus ASSERT failures on CONFIG_SMP=n and CONFIG_XFS_DEBUG=y"

* tag 'xfs-4.12-fixes-4' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux:
  xfs: fix spurious spin_is_locked() assert failures on non-smp kernels
2017-06-17 17:34:41 +09:00
Linus Torvalds
c8636b90a0 Merge branch 'ufs-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Pull ufs fixes from Al Viro:
 "Fix assorted ufs bugs: a couple of deadlocks, fs corruption in
  truncate(), oopsen on tail unpacking and truncate when racing with
  vmscan, mild fs corruption (free blocks stats summary buggered, *BSD
  fsck would complain and fix), several instances of broken logics
  around reserved blocks (starting with "check almost never triggers
  when it should" and then there are issues with sufficiently large
  UFS2)"

[ Note: ufs hasn't gotten any loving in a long time, because nobody
  really seems to use it. These ufs fixes are triggered by people
  actually caring now, not some sudden influx of new bugs.  - Linus ]

* 'ufs-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  ufs_truncate_blocks(): fix the case when size is in the last direct block
  ufs: more deadlock prevention on tail unpacking
  ufs: avoid grabbing ->truncate_mutex if possible
  ufs_get_locked_page(): make sure we have buffer_heads
  ufs: fix s_size/s_dsize users
  ufs: fix reserved blocks check
  ufs: make ufs_freespace() return signed
  ufs: fix logics in "ufs: make fsck -f happy"
2017-06-17 17:30:07 +09:00
Linus Torvalds
ccd3d905f7 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Pull vfs fixes from Al Viro:
 "A couple of fixes; a leak in mntns_install() caught by Andrei (this
  cycle regression) + d_invalidate() softlockup fix - that had been
  reported by a bunch of people lately, but the problem is pretty old"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  fs: don't forget to put old mntns in mntns_install
  Hang/soft lockup in d_invalidate with simultaneous calls
2017-06-17 17:26:53 +09:00
Peter Korsgaard
4fcee14d38 ARM: dts: kirkwood: Fix Openblock A6 nand partition overlap
The "test" and "conf" nand partitions partly overlap:

Creating 6 MTD partitions on "orion_nand":
0x000000000000-0x000000090000 : "uboot"
0x000000090000-0x0000000d4000 : "env"
0x0000000d4000-0x0000000f8000 : "test"
0x0000000f4000-0x0000004f4000 : "conf"

That is unlikely to be desired, and not matching the partition map used in
u-boot - So adjust the test partition size to fix this.

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 09:08:47 +02:00
Antoine Tenart
f66b2aff46 arm64: dts: marvell: add xmdio nodes for 7k/8k
Add the description of the xMDIO bus for the Marvell Armada 7k and
Marvell Armada 8k; for both CP110 slave and master. This bus is found
on Marvell Ethernet controllers and provides an interface with the
xMDIO bus.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:29 +02:00
Antoine Tenart
c7c3d6731f arm64: dts: marvell: add a comment on the cp110 slave node status
The cryptographic engine found on the cp110 slave is disabled by default
because of some known limitations. Add a comment to explain why it is
disabled by default.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:28 +02:00
Antoine Tenart
b97afaf69e arm64: dts: marvell: remove cpm crypto nodes from dts files
The cryptographic engine on the master cp110 is now enabled by default
at the SoC level. Remove its dts nodes that were only enabling it.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:27 +02:00
Antoine Tenart
bcd0256473 arm64: dts: marvell: cp110: enable the crypto engine at the SoC level
Enable the cryptographic engine at the SoC level on the master cp110.
This engine is always present and do not depends on any pinmux
configuration.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:26 +02:00
Gregory CLEMENT
07d065abf9 arm64: dts: marvell: armada-3720-db: Add vqmmc regulator for SD slot
By adding this regulator, the SD cards are usable at higher speed
protocols such as SDR104.

This patch was tested with an SD HC card compatible with UHS-I.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:26 +02:00
Konstantin Porotchkin
1208d2f0c8 arm64: dts: marvell: Enable second SDHCI controller in Armada 37xx
The Armada 37xx SoCs has 2 SDHCI interfaces. This patch adds the second
one.

Moreover, the Armada 37xx DB v2 board populates the 2 SDHCI interfaces.

The second interface is using pluggable module that can either
have an SD connector or eMMC on it.
This patch adds support for SD module in the device DT.

[ gregory.clement@free-electrons.com:
 - Add more detail in commit log
 - Sort the dt node in address order
 - Document the SD slot in the dts ]

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:25 +02:00
Gregory CLEMENT
e9bfac543e arm64: dts: marvell: armada-37xx: Use angle bracket for each register set
When several groups of register address and size are used with reg, then
surround each one by angle bracket.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:24 +02:00
Gregory CLEMENT
55ad5b1ae9 arm64: dts: marvell: armada-37xx: Align the compatible string
This cosmetic patch aligns the compatible string when there are on
several lines.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:23 +02:00
Gregory CLEMENT
718e46395c arm64: dts: marvell: armada-3720-db: Add information about the V2 board
The initial device tree file was for the board V1.4. Now the V2.0 board
is also available. The same dtb will work for both, but the CON number
have changed, so update the comment in the dts to reflect this.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:23 +02:00
Gregory CLEMENT
483b4da2bf arm64: dts: marvell: armada-3720-db: Sort the dts node alphabetically
Sort the reference nodes in alphabetical order to ease the merge of
future nodes.

Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:22 +02:00
Antoine Tenart
5526bdc641 arm64: dts: marvell: disable the mdio nodes by default
Disable the mdio nodes by default in the cp110 slave and master dtsi as
they're not wired on every board.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:21 +02:00
Antoine Tenart
3c6912cdc8 arm64: dts: marvell: explicitly enable the mdio nodes for 7k/8k DB
Explicitly enable the MDIO nodes in the Marvell Armada 7k DB and Marvell
Armada 8k DB. This is needed as the MDIO nodes will be disabled in the
CP 110 slave and master dtsi by a following up patch.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:20 +02:00
Antoine Tenart
b1a97f86b7 arm64: dts: marvell: add dma-mask in crypto nodes for 7k/8k
The EIP197 cryptographic engine supports 64 bits address width but is
limited to 40 bits on 7k/8k. Add a dma-mask property in the
cryptographic engine nodes to reflect this.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:06 +02:00
Marc Zyngier
2a32465912 arm64: dts: marvell: 8040-mcbin: Enable 1GB Ethernet
Enable the 1GB Ethernet interface that lives on the slave CP110,
with its corresponding phy (that oddly lives on the master CP110).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:05 +02:00
Russell King
e21a3b5437 arm64: dts: marvell: cp110: add required clocks for mdio interface
Add the three required clocks for the MDIO interface to be functional
on Armada 8k platforms.  Without this, the CPU hangs, causing RCU
stalls or the system to become unresponsive.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
[Thomas:
 - remove mg_core_clock, since it's a parent of mg_clock
 - also add clock references to the slave CP mdio instance]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:04 +02:00
Gregory CLEMENT
3675fb5980 arm64: dts: marvell: use new binding for the system controller on ap806
The new binding for the system controller on ap806 moved the clock into a
subnode. This preliminary step will allow to add gpio and pinctrl
subnodes

Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:04 +02:00
Gregory CLEMENT
952eaa509d arm64: dts: marvell: remove clock-output-names on ap806
The clock-output-names of the ap806-system-controller node are not used
anymore, so remove them.

Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:03 +02:00
Marcin Wojtas
4f08187d8c arm64: dts: marvell: add second 1G port on the Armada 8040 DB
Armada 8040 DB is equipped with 4 (2x 10G SFI + 2x 1G RGMII)
ethernet ports of which only one was hitherto enabled.
Because currently mvpp2 driver is capable of supporting only
1G RGMII/SGMII, enable second port from CP slave HW block.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:02 +02:00
Russell King
5298304102 arm64: dts: marvell: mcbin: add sdhci
Add sdhci support for MACCHIATOBin boards.  This uses the AP806 SDHCI
for eMMC and CP110 master for the SD card slot.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:19:01 +02:00
Thomas Petazzoni
b7a3768b6b arm64: dts: marvell: add clocks for Armada AP806 XOR engines
The XORv2 engines in the AP side of the Armada 7K/8K SoCs are using the
AP MS core clock as input, so this commit adds the appropriate clocks
properties.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:18:39 +02:00
Javier Martinez Canillas
97800cf8b6 ARM: dts: turris-omnia: Add generic compatible string for I2C EEPROM
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.

But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.

So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
41c8652096 ARM: dts: mvebu: add support for Linksys WRT3200ACM (Rango)
The Linksys WRT3200ACM (Rango) is the lates Armada-385 based router in
the Linksys WRT AC Series which got released in October 2016.

Key differences to the earlier Armada-385 based devices in the series is
a bigger flash chip, next generation wireless modules (Marvell 88W8964)
in the mini pcie slots as well as a Marvell SD8887. Finally the CPU is
clocked at 1866 GHz by default.

The file armada-385-linksys-rango.dts is loosly based off of a DTS
authored by Imre Kaloz.

As Rango is part of the armada-385-linksys family of boards use the
armada-385-linksys.dtsi as basis. As for functional differences to Imre
Kaloz dts, the wlan LEDs aren't connected to the expander chip pca9635
but directly to GPIOs. Then mpp47 controls the USB2.0 port and not the
USB3.0 port, so use the correct GPIO mpp44 for it. Finally use
non-removable instead of broken-cd with the sdhci node to avoid polling.

Other changes can be categorized as just cleanup / reorganization due to
using the armada-385-linksys.dtsi.

URL: 0abc3fa5a9/target/linux/mvebu/files/arch/arm/boot/dts/armada-385-linksys-rango.dts
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
b2758f8edb ARM: dts: armada-385-linksys: fixup button node names
Buttons don't have a reg property; drop pseudo address and fixup names
of individual button nodes. Also drop #address-cells and #size-cells
properties.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
1216132f4d ARM: dts: armada-385-linksys: group pins in pinctrl
A pin group per node is sufficient, further specialization only serves
as documentation which can be a comment just as well. This simplifies
configuring pins for nodes in dependants.

Also use labels which end up right by the node they are intended for.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
bf6c959eb4 ARM: dts: armada-385-linksys: partition layout is board specific
Move the partition layout to individual boards. The Linksys WRT 3200 ACM
(Rango) comes with a 256MiB nand flash chip and different layout.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
0ebbb9575a ARM: dts: armada-385-linksys: use binary unit prefixes
Use IEEE 1541-2002 unit prefixes for sizes.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
4c38d10c75 ARM: dts: armada-385-linksys: drop legacy DSA bindings
The new ones work so there is little reason to keep the legacy bindings.
Use the rework as the opportunity to drop the legacy node.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
da3ac208f8 ARM: dts: armada-385-linksys: usb3 label cleanup
Now that we use the reference for the USB3.0 port update the node name
and labels for the phy and vbus to match the label used by
armada-38x.dtsi.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
a43df48fbe ARM: dts: armada-385-linksys: bm pools by label order
Which pools we assing doesn't matter. Use the order which doesen't leave
a chance for questions for first time readers.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
70fd74252e ARM: dts: armada-385-linksys: drop redundant properties in dependants
Drop redundant declaration of #address-cells and #size-cells.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:46 +02:00
Ralph Sennhauser
ecdcd24864 ARM: dts: armada-385-linksys: flatten dependants
Flatten dts of individual boards to match the new style used in
armada-385-linksys.dtsi and for the Rango addition.

* Caiman - Linksys WRT1200AC v1 & v2
* Cobra - Linksys WRT1900AC v2
* Shelby - Linksys WRT1900ACS v1 & v2

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Ralph Sennhauser
77c82b5f83 ARM: dts: armada-385-linksys: label nodes
Add labels to nodes used by dependants. Also rename node gpio_keys to
gpio-keys to match the style of the rest of the file as well as the
documented example.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Ralph Sennhauser
a90c9eaefb ARM: dts: armada-385-linksys: flatten dtsi
Since the addition of the spi reference two styles are used. Use
references instead of recreating the same structure over and over again.

This helps to distinguish which are changes to the underlying nodes and
which are new additions and helps maintainability in general.

Verified the resulting dtb to be binary identical.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Chris Packham
3bef2ac4bd ARM: dts: mvebu: disable the rtc on 98dx3236 SoC
There is no rtc for the 98dx3236 and derivative SoCs. Disable the rtc
node inherited from the armada-370-xp base.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Chris Packham
948e7d98e6 ARM: dts: mvebu: add missing interrupt to 98dx4251 switch
The 98dx4251 has 4 interrupts for the packet processor whereas the
98dx3236 and 98dx3336 only have 3.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Andrew Lunn
8035eaadef ARM: dts: armada-xp: Use pwm-fan rather than gpio-fan
The mvebu GPIO driver can also perform PWM on some pins. Use the pwm-fan
driver to control the fan of the WRT1900AC, giving us finer grained control
over its speed and hence noise.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
URL: https://patchwork.ozlabs.org/patch/427291/
[Ralph Sennhauser: drop flags paramter from pwms, no longer used]
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00
Ralph Sennhauser
7cb2acb3fb ARM: dts: mvebu: Add PWM properties for armada-38x
Add the required properties to the GPIO nodes for them to be used as PWM
lines.

Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2017-06-17 08:16:45 +02:00