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693,635 commits

Author SHA1 Message Date
Chris Wilson
d9533f19d8 drm/i915: Hold a wakeref for probing the ring registers
Allow intel_engine_is_idle() to be called outside of the GT wakeref by
acquiring the device runtime pm for ourselves. This allows the function
to act as check after we assume the engine is idle and we release the GT
wakeref held whilst we have requests. At the moment, we do not call it
outside of an awake context but taking the wakeref as required makes it
more convenient to use for quick debugging in future.

[ 2613.401647] RPM wakelock ref not held during HW access
[ 2613.401684] ------------[ cut here ]------------
[ 2613.401720] WARNING: CPU: 5 PID: 7739 at drivers/gpu/drm/i915/intel_drv.h:1787 gen6_read32+0x21f/0x2b0 [i915]
[ 2613.401731] Modules linked in: snd_hda_intel i915 vgem snd_hda_codec_hdmi x86_pkg_temp_thermal intel_powerclamp snd_hda_codec_realtek coretemp snd_hda_codec_generic crct10dif_pclmul crc32_pclmul ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm r8169 mii mei_me lpc_ich mei prime_numbers [last unloaded: i915]
[ 2613.401823] CPU: 5 PID: 7739 Comm: drv_missed_irq Tainted: G     U          4.12.0-rc2-CI-CI_DRM_421+ #1
[ 2613.401825] Hardware name: MSI MS-7924/Z97M-G43(MS-7924), BIOS V1.12 02/15/2016
[ 2613.401840] task: ffff880409e3a740 task.stack: ffffc900084dc000
[ 2613.401861] RIP: 0010:gen6_read32+0x21f/0x2b0 [i915]
[ 2613.401863] RSP: 0018:ffffc900084dfce8 EFLAGS: 00010292
[ 2613.401869] RAX: 000000000000002a RBX: ffff8804016a8000 RCX: 0000000000000006
[ 2613.401871] RDX: 0000000000000006 RSI: ffffffff81cbf2d9 RDI: ffffffff81c9e3a7
[ 2613.401874] RBP: ffffc900084dfd18 R08: ffff880409e3afc8 R09: 0000000000000000
[ 2613.401877] R10: 000000008a1c483f R11: 0000000000000000 R12: 000000000000209c
[ 2613.401879] R13: 0000000000000001 R14: ffff8804016a8000 R15: ffff8804016ac150
[ 2613.401882] FS:  00007f39ef3dd8c0(0000) GS:ffff88041fb40000(0000) knlGS:0000000000000000
[ 2613.401885] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 2613.401887] CR2: 00000000023717c8 CR3: 00000002e7b34000 CR4: 00000000001406e0
[ 2613.401889] Call Trace:
[ 2613.401912]  intel_engine_is_idle+0x76/0x90 [i915]
[ 2613.401931]  i915_gem_wait_for_idle+0xe6/0x1e0 [i915]
[ 2613.401951]  fault_irq_set+0x40/0x90 [i915]
[ 2613.401970]  i915_ring_test_irq_set+0x42/0x50 [i915]
[ 2613.401976]  simple_attr_write+0xc7/0xe0
[ 2613.401981]  full_proxy_write+0x4f/0x70
[ 2613.401987]  __vfs_write+0x23/0x120
[ 2613.401992]  ? rcu_read_lock_sched_held+0x75/0x80
[ 2613.401996]  ? rcu_sync_lockdep_assert+0x2a/0x50
[ 2613.401999]  ? __sb_start_write+0xfa/0x1f0
[ 2613.402004]  vfs_write+0xc5/0x1d0
[ 2613.402008]  ? trace_hardirqs_on_caller+0xe7/0x1c0
[ 2613.402013]  SyS_write+0x44/0xb0
[ 2613.402020]  entry_SYSCALL_64_fastpath+0x1c/0xb1
[ 2613.402022] RIP: 0033:0x7f39eded6670
[ 2613.402025] RSP: 002b:00007fffdcdcb1a8 EFLAGS: 00000246 ORIG_RAX: 0000000000000001
[ 2613.402030] RAX: ffffffffffffffda RBX: ffffffff81470203 RCX: 00007f39eded6670
[ 2613.402033] RDX: 0000000000000001 RSI: 000000000041bc33 RDI: 0000000000000006
[ 2613.402036] RBP: ffffc900084dff88 R08: 00007f39ef3dd8c0 R09: 0000000000000001
[ 2613.402038] R10: 0000000000000000 R11: 0000000000000246 R12: 000000000041bc33
[ 2613.402041] R13: 0000000000000006 R14: 0000000000000000 R15: 0000000000000000
[ 2613.402046]  ? __this_cpu_preempt_check+0x13/0x20
[ 2613.402052] Code: 01 9b fa e0 0f ff e9 28 fe ff ff 80 3d 6a dd 0e 00 00 0f 85 29 fe ff ff 48 c7 c7 48 19 29 a0 c6 05 56 dd 0e 00 01 e8 da 9a fa e0 <0f> ff e9 0f fe ff ff b9 01 00 00 00 ba 01 00 00 00 44 89 e6 48
[ 2613.402199] ---[ end trace 31f0cfa93ab632bf ]---

Fixes: 5400367a86 ("drm/i915: Ensure the engine is idle before manually changing HWS")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170530121334.17364-2-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
(cherry picked from commit a091d4ee93)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-06-07 16:31:00 +03:00
Chris Wilson
e0da1963fe drm/i915: Short-circuit i915_gem_wait_for_idle() if already idle
If the device is asleep (no GT wakeref), we know the GPU is already idle.
If we add an early return, we can avoid touching registers and checking
hw state outside of the assumed GT wakelock. This prevents causing such
errors whilst debugging:

[ 2613.401647] RPM wakelock ref not held during HW access
[ 2613.401684] ------------[ cut here ]------------
[ 2613.401720] WARNING: CPU: 5 PID: 7739 at drivers/gpu/drm/i915/intel_drv.h:1787 gen6_read32+0x21f/0x2b0 [i915]
[ 2613.401731] Modules linked in: snd_hda_intel i915 vgem snd_hda_codec_hdmi x86_pkg_temp_thermal intel_powerclamp snd_hda_codec_realtek coretemp snd_hda_codec_generic crct10dif_pclmul crc32_pclmul ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm r8169 mii mei_me lpc_ich mei prime_numbers [last unloaded: i915]
[ 2613.401823] CPU: 5 PID: 7739 Comm: drv_missed_irq Tainted: G     U          4.12.0-rc2-CI-CI_DRM_421+ #1
[ 2613.401825] Hardware name: MSI MS-7924/Z97M-G43(MS-7924), BIOS V1.12 02/15/2016
[ 2613.401840] task: ffff880409e3a740 task.stack: ffffc900084dc000
[ 2613.401861] RIP: 0010:gen6_read32+0x21f/0x2b0 [i915]
[ 2613.401863] RSP: 0018:ffffc900084dfce8 EFLAGS: 00010292
[ 2613.401869] RAX: 000000000000002a RBX: ffff8804016a8000 RCX: 0000000000000006
[ 2613.401871] RDX: 0000000000000006 RSI: ffffffff81cbf2d9 RDI: ffffffff81c9e3a7
[ 2613.401874] RBP: ffffc900084dfd18 R08: ffff880409e3afc8 R09: 0000000000000000
[ 2613.401877] R10: 000000008a1c483f R11: 0000000000000000 R12: 000000000000209c
[ 2613.401879] R13: 0000000000000001 R14: ffff8804016a8000 R15: ffff8804016ac150
[ 2613.401882] FS:  00007f39ef3dd8c0(0000) GS:ffff88041fb40000(0000) knlGS:0000000000000000
[ 2613.401885] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 2613.401887] CR2: 00000000023717c8 CR3: 00000002e7b34000 CR4: 00000000001406e0
[ 2613.401889] Call Trace:
[ 2613.401912]  intel_engine_is_idle+0x76/0x90 [i915]
[ 2613.401931]  i915_gem_wait_for_idle+0xe6/0x1e0 [i915]
[ 2613.401951]  fault_irq_set+0x40/0x90 [i915]
[ 2613.401970]  i915_ring_test_irq_set+0x42/0x50 [i915]
[ 2613.401976]  simple_attr_write+0xc7/0xe0
[ 2613.401981]  full_proxy_write+0x4f/0x70
[ 2613.401987]  __vfs_write+0x23/0x120
[ 2613.401992]  ? rcu_read_lock_sched_held+0x75/0x80
[ 2613.401996]  ? rcu_sync_lockdep_assert+0x2a/0x50
[ 2613.401999]  ? __sb_start_write+0xfa/0x1f0
[ 2613.402004]  vfs_write+0xc5/0x1d0
[ 2613.402008]  ? trace_hardirqs_on_caller+0xe7/0x1c0
[ 2613.402013]  SyS_write+0x44/0xb0
[ 2613.402020]  entry_SYSCALL_64_fastpath+0x1c/0xb1
[ 2613.402022] RIP: 0033:0x7f39eded6670
[ 2613.402025] RSP: 002b:00007fffdcdcb1a8 EFLAGS: 00000246 ORIG_RAX: 0000000000000001
[ 2613.402030] RAX: ffffffffffffffda RBX: ffffffff81470203 RCX: 00007f39eded6670
[ 2613.402033] RDX: 0000000000000001 RSI: 000000000041bc33 RDI: 0000000000000006
[ 2613.402036] RBP: ffffc900084dff88 R08: 00007f39ef3dd8c0 R09: 0000000000000001
[ 2613.402038] R10: 0000000000000000 R11: 0000000000000246 R12: 000000000041bc33
[ 2613.402041] R13: 0000000000000006 R14: 0000000000000000 R15: 0000000000000000
[ 2613.402046]  ? __this_cpu_preempt_check+0x13/0x20
[ 2613.402052] Code: 01 9b fa e0 0f ff e9 28 fe ff ff 80 3d 6a dd 0e 00 00 0f 85 29 fe ff ff 48 c7 c7 48 19 29 a0 c6 05 56 dd 0e 00 01 e8 da 9a fa e0 <0f> ff e9 0f fe ff ff b9 01 00 00 00 ba 01 00 00 00 44 89 e6 48
[ 2613.402199] ---[ end trace 31f0cfa93ab632bf ]---

Fixes: 25112b64b3 ("drm/i915: Wait for all engines to be idle as part of i915_gem_wait_for_idle()")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170530121334.17364-1-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
(cherry picked from commit 863e9fde1a)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-06-07 16:30:54 +03:00
Kai Chen
4c4c565513 drm/i915: Disable decoupled MMIO
The decoupled MMIO feature doesn't work as intended by HW team. Enabling
it with forcewake will only make debugging efforts more difficult, so
let's disable it.

Fixes: 85ee17ebee ("drm/i915/bxt: Broxton decoupled MMIO")
Cc: Zhe Wang <zhe1.wang@intel.com>
Cc: Praveen Paneri <praveen.paneri@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Cc: <stable@vger.kernel.org> # v4.10+
Signed-off-by: Kai Chen <kai.chen@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170523215812.18328-2-kai.chen@intel.com
(cherry picked from commit 0051c10aca)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-06-07 16:30:49 +03:00
Michal Wajdeczko
4ca9a58219 drm/i915/guc: Remove stale comment for q_fail
This member was dropped long time ago.

Fixes: 774439e1 ("drm/i915/guc: re-optimise i915_guc_client layout")
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170518113104.54400-1-michal.wajdeczko@intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
(cherry picked from commit 4afc67be8e)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2017-06-07 16:30:38 +03:00
Icenowy Zheng
21b2992093 ARM: sun8i: v3s: add device nodes for DE2 display pipeline
Allwinner V3s SoC features a "Display Engine 2.0" with only one mixer
and only one TCON connected to this mixer, which have RGB LCD output.

Add device nodes for this display pipeline.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:27:37 +02:00
Antoine Tenart
9bea19aac3 ARM: dts: sunxi: add SoC specific compatibles for the crypto nodes
Add SoC specific compatibles for all sunXi crypto nodes, in addition to
the one already used (allwinner,sun4i-a10-crypto).

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:27:37 +02:00
Antoine Tenart
e1679f0921 ARM: sun5i: add a cryptographic engine node
Add a node for the cryptographic engine that can be found on sun5i SoCs.
This cryptographic engine is compatible with the Allwinner cryptographic
accelerator driver.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:27:37 +02:00
Icenowy Zheng
63b956875a arm64: allwinner: h5: enable dwmac-sun8i for Nano Pi NEO2
Add the required DT parts to enable Ethernet (dwmac-sun8i driver) on
the Nano Pi NEO2 board. It uses an external Realtek RTL8211E PHY
connected via RGMII to provide GbE network. Specially unlike other
Allwinner boards, the phy is connected to MDIO address 7, not 1.

This includes the regulator (which is controlled by a GPIO pin) and
the actual Ethernet MAC node, referring the RGMII pins of the device.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:26:50 +02:00
Icenowy Zheng
4b157a5c3b arm64: allwinner: h5: enable dwmac-sun8i for Orange Pi Prime
Add the required DT parts to enable Ethernet (dwmac-sun8i driver) on
the Orange Pi Prime board. It uses an external Realtek RTL8211E PHY
connected via RGMII to provide GbE network.

This includes the regulator (which is controlled by a GPIO pin) and
the actual Ethernet MAC node, referring the RGMII pins of the device.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:26:45 +02:00
Icenowy Zheng
9907da07d4 arm64: allwinner: h5: sort the device nodes in / part for some boards
The reg_vcc3v3 node is wrongly placed at the start of the / part, but
not with other fixed regulators used by the board, which makes the
device nodes unsorted.

As Orange Pi Prime and Nano Pi NEO2 device trees are copy'n'paste works,
they share the device node unsorted issue.

Fix this by move reg_vcc3v3 node to the position before reg_usb0_vbus.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:26:14 +02:00
Icenowy Zheng
96219b0048 arm64: allwinner: a64: add device tree for SoPine with baseboard
Pine64 have made an official baseboard when SoPine SoM is out.

The official baseboard is like the original Pine64 -- but with SD card
slot replaced with Pine64's eMMC module slot.

Add a device tree for SoPine with the baseboard.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:53 +02:00
Corentin Labbe
e729549990 arm64: allwinner: bananapi-m64: Enable dwmac-sun8i
The dwmac-sun8i  hardware is present on the BananaPi M64.
It uses an external PHY rtl8211e via RGMII.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:52 +02:00
Corentin Labbe
94dcfdc77f arm64: allwinner: pine64-plus: Enable dwmac-sun8i
The dwmac-sun8i hardware is present on the pine64 plus.
It uses an external PHY rtl8211e via RGMII.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:51 +02:00
Corentin Labbe
9702394374 arm64: allwinner: pine64: Enable dwmac-sun8i
The dwmac-sun8i hardware is present on the pine64
It uses an external PHY via RMII.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:49 +02:00
Corentin Labbe
e53f67e981 arm64: allwinner: sun50i-a64: add dwmac-sun8i Ethernet driver
The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit
connections. It is very similar to the device found in the Allwinner
H3, but lacks the internal 100 Mbit PHY and its associated control
bits.
This adds the necessary bits to the Allwinner A64 SoC .dtsi, but keeps
it disabled at this level.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:48 +02:00
Corentin Labbe
79b953605d arm64: allwinner: sun50i-a64: Add dt node for the syscon control module
This patch add the dt node for the syscon register present on the
Allwinner A64.

Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:47 +02:00
Icenowy Zheng
c3904a2698 arm64: allwinner: a64: add DTSI file for SoPine SoM
SoPine is a SoM by Pine64, which have a gold finger compatible with the
slot of DDR3 SODIMM (signals are not compatible), and have an A64, an
AXP803, a LPDDR3 DRAM chip, a power led and a MicroSD slot on it.

The card detect pin of the MicroSD slot on the SoM is pulled down, which
makes it unusable; however, the slot is at the surface of the SoM that
is closed to the baseboard, so it's nearly impossible to hot-swap it,
thus I make it non-removable.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:46 +02:00
Chen-Yu Tsai
494d8a2ca9 arm64: allwinner: a64: Convert CCU raw number references to macros
The A64 device tree file has some remnants of raw number references
to the CCU node, likely from when the CCU bindings and device tree
changes were first merged.

Convert these, and the R_CCU ones, to use the proper defined macros
from their respective device tree binding header files.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:45 +02:00
Andreas Färber
2273aa1691 arm64: dts: allwinner: pine64: Prepare optional UART nodes with pinctrl
Pine64 exposes all A64 UARTs, not just UART0.

Since the pins can be used as GPIO, don't enable the new UART nodes by
default, but prepare the pinctrl settings to aid in activating them via
overlays, i.e., overriding the status property of &uartX nodes.

For UART4 (Euler) the safer route of not including RTS/CTS pins is chosen,
whereas for UART1 (Bluetooth) they are included.

Add the corresponding pinctrl nodes where missing.

Suggested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:44 +02:00
Icenowy Zheng
3b38fded38 arm64: allwinner: a64: enable RSB on A64
Allwinner A64 have a RSB controller like the one on A23/A33 SoCs.

Add it and its pinmux.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:43 +02:00
Andreas Färber
226ab0999a arm64: dts: allwinner: pine64: Add remaining UART aliases
Enabling uart2 node currently leads to a /dev/ttyS1 device, with ttyS0..4
always present, causing confusion on the user's part.

dtc cannot resolve an overlay's &uart2 reference for strings, only for
phandles, so it would need to hardcode the full node path.

Avoid this and enforce reliable numbering by adding serialX aliases for:

UART1 - on Wifi/BT connector
UART2 - on Pi-2 connector
UART3 - on Euler connector
UART4 - on Euler connector

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:42 +02:00
Andreas Färber
798257194e arm64: dts: allwinner: a64: Add UART2 pin nodes
UART2 is exposed on the Pi connector of Pine64. Make a pinctrl node
available at the SoC level, to simplify enabling UART2 via DT overlay.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:25:41 +02:00
Icenowy Zheng
d6d1291d3b arm64: allwinner: h5: add support for NanoPi NEO2 board
NanoPi NEO2 is a board with the same size factor with the original
NanoPi NEO by FriendlyELEC.

It has a H5 instead of H3 on NanoPi NEO, and the ethernet is upgraded to
1Gbps (with external RTL8211E PHY).

Add support for this board.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:24:12 +02:00
Icenowy Zheng
2ff2836152 arm64: allwinner: h5: add support for Orange Pi Prime board
Orange Pi Prime is a new Allwinner H5-based SBC by Xunlong.

It's like a Orange Pi Plus 2E with H3 replaced with H5, eMMC replaced
with onboard SPI NOR Flash and wireless card changed to Realtek
RTL8723BS (with Bluetooth functionality).

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-07 15:24:02 +02:00
Yannick Fertre
85d95f7855 ARM: dts: stm32: Enable ltdc & simple panel on stm32f429-Eval board
Enable ltdc & enable am-480272h3tmqw-t01h panel.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 15:21:05 +02:00
Yannick Fertre
bcb49099cf ARM: dts: stm32: Add ltdc support on stm32f429 MCU
Add LTDC (Lcd-tft Display Controller) support.

Signed-off-by: Yannick Fertre <yannick.fertre@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 14:58:44 +02:00
Thomas Hellstrom
1929e6610b drm/vmwgfx: Bump driver minor and date
While the atomic modesetting capability is signaled also elsewhere, also
reflect it by a driver minor bump.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2017-06-07 14:46:15 +02:00
Sinclair Yeh
f470a7740f drm/vmwgfx: Remove unused legacy cursor functions
These function implementations and/or declarations are no longer used
now that atomic is enabled.

Signed-off-by: Sinclair Yeh <syeh@vmware.com>
Reported-by: Daniel Vetter <daniel@ffwll.ch>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2017-06-07 14:42:14 +02:00
Anton Blanchard
cc20ba4ed8 [media] ir-spi: Fix issues with lirc API
The ir-spi driver has 2 issues which prevents it from working with
lirc:

1. The ir-spi driver uses 16 bits of SPI data to create one cycle of
the waveform. As such our SPI clock needs to be 16x faster than the
carrier frequency.

The driver is inconsistent in how it currently handles this. It
initializes it to the carrier frequency:

But the commit message has some example code which initialises it
to 16x the carrier frequency:

	val = 608000;
	ret = ioctl(fd, LIRC_SET_SEND_CARRIER, &val);

To maintain compatibility with lirc, always do the frequency adjustment
in the driver.

2. lirc presents pulses in microseconds, but the ir-spi driver treats
them as cycles of the carrier. Similar to other lirc drivers, do the
conversion with DIV_ROUND_CLOSEST().

Fixes: fe052da492 ("[media] rc: add support for IR LEDs driven through SPI")

Cc: stable@vger.kernel.org
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 09:40:55 -03:00
Johan Hovold
fb3562c81e [media] mceusb: drop redundant urb reinitialisation
Drop a since commit e1159cb357 ("[media] mceusb: remove pointless
mce_flush_rx_buffer function") redundant reinitialisation of two urb
fields immediately after they have been initialised.

Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 09:39:52 -03:00
Johan Hovold
2d5a6ce71c [media] mceusb: fix memory leaks in error path
Fix urb and transfer-buffer leaks in an urb-submission error path which
may be hit when a device is disconnected.

Fixes: 66e89522af ("V4L/DVB: IR: add mceusb IR receiver driver")

Cc: stable <stable@vger.kernel.org>     # 2.6.36
Cc: Jarod Wilson <jarod@redhat.com>
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Sean Young <sean@mess.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 09:39:19 -03:00
Colin Ian King
a2e5a3e2f8 drm/vmwgfx: fix spelling mistake "exeeds" -> "exceeds"
Trivial fix to spelling mistake in DRM_ERROR error message.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2017-06-07 14:38:59 +02:00
Sinclair Yeh
a1ac633912 drm/vmwgfx: Fix large topology crash
The previous attempt at this had an issue with with num_clips > 1
because it would always end up using the coordinates of the last
clip while using width and height calculated from the bounding
box of all the clips.

So if the last clip happens to be not at the top-left corner of
the bounding box, the CPU blit operation would go out of bounds.

The original intent was to coalesce all the clips into one blit,
and to do that we need to also track the starting point of the
content buffer.

Signed-off-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2017-06-07 14:36:02 +02:00
Dave Stevenson
4e66a52a2e [media] tc358743: Add support for platforms without IRQ line
interrupts is listed as an optional property in the DT
binding, but in reality the driver didn't work without it.
The existing driver relied on having the interrupt line
connected to the SoC to trigger handling various events.

Add the option to poll the interrupt status register via
a timer if no interrupt source is defined.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 09:31:45 -03:00
Dave Stevenson
2da2391c0f [media] tc358743: Setup default mbus_fmt before registering
Previously the mbus_fmt_code was set after the device was
registered. If a connected sub-device called tc358743_get_fmt
prior to that point it would get an invalid code back.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 09:30:54 -03:00
Dave Stevenson
3cb0fe6f74 [media] tc358743: Add enum_mbus_code
There was no way to query the supported mbus formats from this
driver. enum_mbus_code is the function to expose that, so
implement it.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 09:29:48 -03:00
Hans Verkuil
a7a04b5b2c [media] cec: improve debug messages
- use __func__ instead of writing the full function name
- drop debug message in cec_config_log_addr since the same information
  will be reported later
- use debug level 1 for errors and infrequent events, use level 2 for
  debugging CEC message traffic
- log when a transmit is retried, very useful to know when debugging
- debug messages now all start with lower case

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 09:29:08 -03:00
Vikas Manocha
f44848b6f7 ARM: dts: stm32: add stm32f769I & stm32f746 discovery board support
Stm32f769I & stm32f746 are MCUs of stm32f7 family. Here are the major
specs of the two boards:

stm32f769I discovery board:
	- Cortex-M7 core @216MHz
	- 2MB mcu internal flash
	- 512KB internal sram
	- 16MB sdram memory
	- 64MB qspi flash memory
	- 4 inch wvga LCD-TFT Display

stm32f746 discovery board:
	- Cortex-M7 core @216MHz
	- 1MB mcu internal flash
	- 320KB internal sram
	- 8MB sdram memory
	- 16MB qspi flash memory
	- 4.3 inch 480x272 LCD-TFT display

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
2017-06-07 14:28:54 +02:00
Arvind Yadav
43b288baa8 [media] tc358743: Handle return value of clk_prepare_enable
clk_prepare_enable() can fail here and we must check its return value.

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 09:28:05 -03:00
Yoshihiro Shimoda
7c7356bab8 phy: rcar-gen3-usb3: add support for R-Car Gen3 USB 3.0 PHY
The USB 3.0 PHY modules of R-Car Gen3 SoCs have:
 - Spread spectrum clock (ssc).
 - Using USB 2.0 EXTAL clock instead of USB 3.0 clock.
 - Enabling VBUS detection for usb3.0 peripheral.

So, this driver supports these features.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-07 17:55:13 +05:30
Sakari Ailus
48e3e36a25 [media] v4l2-ctrls: Correctly destroy mutex in v4l2_ctrl_handler_free()
The mutex that was initialised in v4l2_ctrl_handler_init_class() was not
destroyed in v4l2_ctrl_handler_free(). Do that.

Additionally, explicitly refer to the ctrl handler's mutex in mutex
initialisation for clarity.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 08:53:42 -03:00
Sakari Ailus
cc0140e2a0 [media] v4l2-ctrls.c: Implement unlocked variant of v4l2_ctrl_handler_setup()
Sometimes the caller is already holding the control handler mutex and
using it to serialise something. Provide an unlocked variant of the same
function to be used in those cases.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 08:38:12 -03:00
Hugues Fruchet
ec62c9a54c [media] atmel-isi: code cleanup
Ensure that ISI is clocked before starting sensor sub device.
Remove un-needed type check in try_fmt().
Use clamp() macro for hardware capabilities.
Fix wrong tabulation to space.

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 08:36:42 -03:00
Ard Biesheuvel
e71a4e1beb arm64: ftrace: add support for far branches to dynamic ftrace
Currently, dynamic ftrace support in the arm64 kernel assumes that all
core kernel code is within range of ordinary branch instructions that
occur in module code, which is usually the case, but is no longer
guaranteed now that we have support for module PLTs and address space
randomization.

Since on arm64, all patching of branch instructions involves function
calls to the same entry point [ftrace_caller()], we can emit the modules
with a trampoline that has unlimited range, and patch both the trampoline
itself and the branch instruction to redirect the call via the trampoline.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
[will: minor clarification to smp_wmb() comment]
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-06-07 11:52:02 +01:00
Mauro Carvalho Chehab
42654ebad0 media fixes for v4.12-rc4
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Merge tag 'media/v4.12-2' into patchwork

media fixes for v4.12-rc4

* tag 'media/v4.12-2': (598 commits)
  [media] rc-core: race condition during ir_raw_event_register()
  [media] cec: drop MEDIA_CEC_DEBUG
  [media] cec: rename MEDIA_CEC_NOTIFIER to CEC_NOTIFIER
  [media] cec: select CEC_CORE instead of depend on it
  [media] rainshadow-cec: ensure exit_loop is intialized
  [media] atomisp: don't treat warnings as errors
  Linux 4.12-rc3
  x86/ftrace: Make sure that ftrace trampolines are not RWX
  x86/mm/ftrace: Do not bug in early boot on irqs_disabled in cpu_flush_range()
  selftests/ftrace: Add a testcase for many kprobe events
  kprobes/x86: Fix to set RWX bits correctly before releasing trampoline
  ftrace: Fix memory leak in ftrace_graph_release()
  ipv4: add reference counting to metrics
  net: ethernet: ax88796: don't call free_irq without request_irq first
  ip6_tunnel, ip6_gre: fix setting of DSCP on encapsulated packets
  sctp: fix ICMP processing if skb is non-linear
  net: llc: add lock_sock in llc_ui_bind to avoid a race condition
  PCI/msi: fix the pci_alloc_irq_vectors_affinity stub
  blk-mq: Only register debugfs attributes for blk-mq queues
  x86/timers: Move simple_udelay_calibration past init_hypervisor_platform
  ...

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2017-06-07 07:50:49 -03:00
Ard Biesheuvel
f8af0b364e arm64: ftrace: don't validate branch via PLT in ftrace_make_nop()
When turning branch instructions into NOPs, we attempt to validate the
action by comparing the old value at the call site with the opcode of
a direct relative branch instruction pointing at the old target.

However, these call sites are statically initialized to call _mcount(),
and may be redirected via a PLT entry if the module is loaded far away
from the kernel text, leading to false negatives and spurious errors.

So skip the validation if CONFIG_ARM64_MODULE_PLTS is configured.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-06-07 11:50:34 +01:00
Andy Shevchenko
94116f8126 ACPI: Switch to use generic guid_t in acpi_evaluate_dsm()
acpi_evaluate_dsm() and friends take a pointer to a raw buffer of 16
bytes. Instead we convert them to use guid_t type. At the same time we
convert current users.

acpi_str_to_uuid() becomes useless after the conversion and it's safe to
get rid of it.

Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Cc: Amir Goldstein <amir73il@gmail.com>
Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Cc: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Acked-by: Joerg Roedel <jroedel@suse.de>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Yisen Zhuang <yisen.zhuang@huawei.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2017-06-07 12:20:49 +02:00
Sinclair Yeh
8a309c8a2d drm/vmwgfx: Make sure to update STDU when FB is updated
When a new FB is bound, we have to send an update command otherwise
the new FB may not be shown

Signed-off-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2017-06-07 12:07:35 +02:00
Sinclair Yeh
07678eca2c drm/vmwgfx: Make sure backup_handle is always valid
When vmw_gb_surface_define_ioctl() is called with an existing buffer,
we end up returning an uninitialized variable in the backup_handle.

The fix is to first initialize backup_handle to 0 just to be sure, and
second, when a user-provided buffer is found, we will use the
req->buffer_handle as the backup_handle.

Cc: <stable@vger.kernel.org>
Reported-by: Murray McAllister <murray.mcallister@insomniasec.com>
Signed-off-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Deepak Rawat <drawat@vmware.com>
2017-06-07 12:07:35 +02:00
Dan Carpenter
f0c62e9878 drm/vmwgfx: Handle vmalloc() failure in vmw_local_fifo_reserve()
If vmalloc() fails then we need to a bit of cleanup before returning.

Cc: <stable@vger.kernel.org>
Fixes: fb1d9738ca ("drm/vmwgfx: Add DRM driver for VMware Virtual GPU")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2017-06-07 12:07:35 +02:00