Drop legacy drm_for_each_connector() in favor of the race-free
drm_for_each_connector_iter().
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20170511191049.28944-4-gustavo@padovan.org
Drop legacy drm_for_each_connector() in favor of the race-free
drm_for_each_connector_iter()
Cc: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170515134330.3275-1-gustavo@padovan.org
A bunch of bug fixes:
- Fix display flickering on some chips at high refresh rates
- suspend/resume fix
- hotplug fix
- a couple of segfault fixes for certain cases
* 'drm-fixes-4.12' of git://people.freedesktop.org/~agd5f/linux:
drm/amdgpu: fix null point error when rmmod amdgpu.
drm/amd/powerplay: fix a signedness bugs
drm/amdgpu: fix NULL pointer panic of emit_gds_switch
drm/radeon: Unbreak HPD handling for r600+
drm/amd/powerplay/smu7: disable mclk switching for high refresh rates
drm/amd/powerplay/smu7: add vblank check for mclk switching (v2)
drm/radeon/ci: disable mclk switching for high refresh rates (v2)
drm/amdgpu/ci: disable mclk switching for high refresh rates (v2)
drm/amdgpu: fix fundamental suspend/resume issue
Core Changes:
- Don't drop vblank reference more than once in cases of ww retry (Daniel)
Driver Changes:
- radeon: Fix oops during radeon probe trying to reference wrong device (Lukas)
- qxl: Avoid sleeping while in atomic context on cursor update (Gabriel)
- gma500: Use VBT mode instead of pre-programmed mode for LVDS (Patrik)
Cc: Lukas Wunner <lukas@wunner.de>
Cc: Gabriel Krisman Bertazi <krisman@collabora.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
* tag 'drm-misc-fixes-2017-05-25' of git://anongit.freedesktop.org/git/drm-misc:
drm/gma500/psb: Actually use VBT mode when it is found
drm: Fix deadlock retry loop in page_flip_ioctl
drm: qxl: Delay entering atomic context during cursor update
drm/radeon: Fix oops upon driver load on PowerXpress laptops
This patch converts the ds1307 driver to using regmap. It's a rather
big patch and I can test with DS3231 only. With this chip it's
working fine.
I'd appreciate if people with other supported hardware could test as
well.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZJa1yAAoJEME3ZuaGi4PXPjsP/jaqs9fPzGHzHy5R3kK+n1ep
6Z8I98HFNpjGJAdPBHD0J65NDkzGx/GUoBnOCj/9ElQuBKGjCXf/zXnIjqutKBwd
bzqGfmXT1mKrgEAsk4eXyXlrlsaXkPCTo/mtOLORuKCRn0E7bS/iNxEJQEvzEpVY
CsvsD7mi4kIEoVW3ytvamASWQvdnIP19Px7wv42/ojsAGtg2wXI7xjAyV26Z0/yN
tKb3osSa+44wZbofCNsaEhPRbzLkEctry3/F+5tHQyTZMNxVo0DDhcp56fOgp/2C
6R6LeIJE2bDlHgHzGxsaFGbvsRhixlHKhgr8CbObEfd80eLPXq6at7d0r1rqoDp3
dcWFjoIc0Epz0W/m+E2FqinvIFXW7s2dGVKixBKA+s6rvpgFps8n8Jqhl5E4MBeV
wS2KxWNZfA3xHTWUHbOWSsskGs5v5KtNpAxpl6PIxaoLlfxClOHoJJ5D4nUuqgGf
Q8qSmr0HgAdSYGWetb0PVeTzIxWI+OUdR8YqkJ+JkpmQlPOxIMlaYKMyMSKpVfpC
x5AnxAo3HX/6mN0k5zNh8eGrjHUYsMgOJnPloftS8+MzfIR4aYqd5UHqLSoNRQvW
RRzioyPjHxjATb1chJI4h+BWReBmRBvMKT5CHprNgcKzqk8PRfOz9aq2J2n/e5jK
pB1WWUEwBeNKXKEt+Ivn
=sm+g
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into fixes
Update of maintainers entry for Samsung SoC.
* tag 'samsung-fixes-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
MAINTAINERS: Remove Javier Martinez Canillas as reviewer for Exynos
Signed-off-by: Olof Johansson <olof@lixom.net>
please pull the following:
- Phil provides a fix for the BCM283x (Raspberry Pi) by flagging the first
4KiB of physical memory as a reserved region in order to let the secondary
cores successfully spin until they are brought online
-----BEGIN PGP SIGNATURE-----
iQIcBAABCAAGBQJZJ03UAAoJEIfQlpxEBwcEnOwP/02l54jeRuwFFqn8yM89S0rE
ZXgx+DuIlcWGtFbVjzKtqcpV+9Gjdh9eOQaS9SN7p9C/UFVM4m+UUpVojs+yq538
Z6p8soGTlMhQb6zAuajaiOMp7AlARH674kU3cnRi28Iwt81FiVLrAkMf9lRLkTCx
4iyha1vXVQOwY4BxSw91I3gK8vDlDBKLRBmpiPPQ9ZUFNWXsVzbFCrirxUwd5J/h
8TqsSsfsOexqQCHLgixdpu5s5jGWZVMoP+a3xbsF066vv9K0BHZeBrzuQfb5iRdl
O92JlsVzs8gW3C1/0saGRefLwc5kRytWSNpU0RZe/AjkNHL7IR6LgIU0UNaQhwug
N4IUryKLtbJMBuLHYpwliZKmHO9TlDmOC1wdkOnnjYoS9fDEOuMo+UH2aRmFAxcz
gJgrDFb6ajQchM7dPswGrAq+09mcqkkorIvqbPRvB+qlBJoS1UZDjNPQNWvGc+Lk
3l8m71+9ABUmPl3eS4Pfbk3aVQZfsXQerQZwK9EZXyoInhvYrixWf6D5u9sXwqB/
kux4RCSbViwZe3pbOy2eguEkO84xa+nfHQTwjj3/FwsUOEu0IhFmZUyGmQTot/lH
vZqGo1BZPSWoAdd1Lg+HM5UyWn8y5SbyZRCKvz7qqyc91ROyksCaHr0gVTWA/iNS
+W3H2s+FB62Q9fmIU4sv
=x322
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.12/devicetree-fixes-2' of http://github.com/Broadcom/stblinux into fixes
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for 4.12,
please pull the following:
- Phil provides a fix for the BCM283x (Raspberry Pi) by flagging the first
4KiB of physical memory as a reserved region in order to let the secondary
cores successfully spin until they are brought online
* tag 'arm-soc/for-4.12/devicetree-fixes-2' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm283x: Reserve first page for firmware
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable some very core config options used on 64bit Rockchip socs.
As built-in driver enable the Rockchip spi driver as well as the
cros-ec-spi and cros-ec keyboard driver, as this may be helpful
in case an initrd does not work as expected and drops the user
into a shell. Another built-in is the fan53555 regulator driver,
as it and its register-compatible cousins Silergy syr827 and syr828
are often used on Rockchip socs as cpu-supply next to regular pmic.
The rest can be enabled as modules and contains the pcie host
controller and its phy, the sucessive approximation adc (saradc)
that gets often used for additional buttons on Rockchip boards
as well as the adc-keys Keyboard driver for these keys.
The cros-ec-pwm also can be a module, as it is normally only used to
drive display backlights as well as the Rockchip thermal controller
that allows to read the cpu and gpu temperatures and affect frequency
scaling if necessary.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
on DaVinci. Some resources were getting freed prematurely.
And there was an issue with resources not being on error.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJZJEVUAAoJEGFBu2jqvgRNtG0P/17rlhibE2NKUBNEhAB95OrW
etENq137LEnWxOCImTJ+qW5Yh689SfQCBXmTdNYHfgDuEN3BZ1N08nmqBRI12udu
htGTTtjljJXdgjSLaLqoSCvbpKNqkBIxPyR88jT+51tpndz1KLLh+W042+2y2y2I
0RECRNXrjSJDfX5eUOLluY9ZqGDb9cAlOnHDC08ItEE1+i+TecObNp7PUEIIuYL7
c3utY/6yOCbq/OYPmDDrClKSxLJyzyi6OOTUATr1kxETFaekdkN7SJ1qmxLLNIxy
P73DkcYCW02Kz9upvD+zojz23p7HnLb5GGCvmG7qhz6wz+yiRbD5Dditfw9QZILv
4SII4z90Cw7kdsBhcqkE5slLiycWsdDvtDTnJWBv9IYAOhoNmW7UdDxUAcLsOc0A
ezud/Xp8Ga+MY4rToR2tWTWXQ+0IPHLpmrOvRGsFdZkSca+cvZ7CNq42iKLJX+dF
Cm7U2yCn1HzdqGOShrGPes1wUQ24Gfku6p6julbKOEv/wQ04nOwPuSWfljBWNxwk
T2YZ9bEG2g7fhCcSYFHqRih3q6EKqvWbYGg6lRW35enc6ClNE3kPVtldhnz2sxxt
jFHvDoP3ZzgN4tJW730lVgnqs+ejI0n4kQC6jcz3Ov/V8H94Bx9YJdh4Bf0jPueP
FnwtSniRInuTrbP4Lc8k
=6J2I
-----END PGP SIGNATURE-----
Merge tag 'davinci-fixes-for-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into fixes
These fix issues with power management initialization code
on DaVinci. Some resources were getting freed prematurely.
And there was an issue with resources not being on error.
* tag 'davinci-fixes-for-v4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: PM: Do not free useful resources in normal path in 'davinci_pm_init'
ARM: davinci: PM: Free resources in error handling path in 'davinci_pm_init'
Signed-off-by: Olof Johansson <olof@lixom.net>
Jiri Pirko says:
====================
mlxsw: Support firmware flash
Add support for device firmware flash on mlxsw spectrum. The firmware files
are expected to be in the Mellanox Firmware Archive version 2 (MFA2)
format.
The firmware flash is triggered on driver initialization time if the device
firmware version does not meet the minimum firmware version supported by
the driver.
Currently, to activate the newly flashed firmware, the user needs to
reboot his system.
The first patch introduces the mlxfw module, which implements common logic
needed for the firmware flash process on Mellanox products, such as the
MFA2 format parsing and the firmware flash state machine logic. As the
module implements common logic which will be needed by various different
Mellanox drivers, it defines a set of callbacks needed to interact with the
specific device.
Patches 1-5 implement the needed mlxfw callbacks in the mlxsw spectrum
driver.
Patches 6 and 7 add boot-time firmware upgrade on the mlxsw spectrum
driver.
Patch 8 adds a fix needed for new firmware versions.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
In new firmware versions, when configuring a {Port, VID} as a router
interface, the driver is responsible for enabling the STP filter and
disabling learning. Otherwise, packets are discarded.
This change doesn't break existing firmware versions, but is required
for newer firmware versions.
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Make the spectrum module check the current device firmware version, and if
it is below the supported version, use the libfirmware API to request a
firmware file with the supported firmware version and flash it to the
device using the mlxfw module.
The firmware file names are expected to be of Mellanox Firmware Archive
version 2 (MFA2) format and their name are expected to be in the following
pattern: "mlxsw_spectrum-<major>.<minor>.<sub-minor>.mfa2".
Signed-off-by: Yotam Gigi <yotamg@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This struct was previously an anonymous struct defined inside the
mlxsw_bus_info struct. Extract it to a struct named mlxsw_fw_rev, as it
will be needed later by the spectrum driver.
Signed-off-by: Yotam Gigi <yotamg@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The mlxfw module defines several needed callbacks in order to flash the
device's firmware. As the mlxfw module is shared between several different
drivers, those callbacks are the glue functionality that is responsible
for hardware interaction. Add those callbacks using the MCQI, MCC, MCDA
registers.
Signed-off-by: Yotam Gigi <yotamg@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The MCDA register allows reading and writing a firmware component.
Signed-off-by: Yotam Gigi <yotamg@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The MCC register allows controlling and querying the firmware flash state
machine (FSM).
Signed-off-by: Yotam Gigi <yotamg@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The MCQI register queries information about firmware components. It will
be needed by the mlxfw module to query various options about the
components, such as their max size, alignment and max write size.
Signed-off-by: Yotam Gigi <yotamg@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The mlxfw module is in charge of common logic needed to flash Mellanox
devices firmware, which consists of:
- Parse the Mellanox Firmware Archive version 2 (MFA2) format, which is
the format used to store the Mellanox firmware. The MFA2 format file can
hold firmware for many different silicon variants, differentiated by a
unique ID called PSID. In addition, the MFA2 file data section is
compressed using xz compression to save both file-system space and
memory at extraction time.
- Implement the firmware flash state machine logic, which is a common
logic for Mellanox products needed to flash the firmware to the device.
As the module is shared between different Mellanox products, it defines a
set of callbacks to be implemented by the specific driver for hardware
interaction.
Signed-off-by: Yotam Gigi <yotamg@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Although the ack callback is supposed to be called at each appl_ptr or
hw_ptr update, we missed a few opportunities: namely, forward, rewind
and sync_ptr.
Formerly calling ack at rewind may have leaded to unexpected results
due to the forgotten negative appl_ptr update in indirect-PCM helper,
which is the major user of the PCM ack callback. But now we fixed
this oversights, thus we can call ack callback safely even at rewind
callback -- of course with the proper handling of the error from the
callback.
This patch adds the calls of ack callback in the places mentioned in
the above.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Now that the indirect-PCM transfer helper gives back an error, we
should return the error from ack callbacks.
Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Now that the indirect-PCM transfer helper gives back an error, we
should return the error from ack callbacks.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Now that the indirect-PCM transfer helper gives back an error, we
should return the error from ack callbacks.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Now that the indirect-PCM transfer helper gives back an error, we
should return the error from ack callbacks.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Now that the indirect-PCM transfer helper gives back an error, we
should return the error from ack callbacks.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The indirect-PCM helper codes have an implicit assumption that the
appl_ptr always increases. But the PCM core may deal with the
decrement of appl_ptr via rewind ioctls, and it may screw up the
buffer pointer management.
This patch adds the negative appl_ptr diff in transfer functions and
let returning an error instead of always accepting the appl_ptr
updates. The callers are usually PCM ack callbacks, and they pass the
error to the upper layer accordingly.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
AHB BIST gate is actually controlled with bit 7.
This bug was detected while trying to use the NAND controller which is
using the DMA engine to transfer data to the NAND.
Since the ahb_bist_clk gate bit conflicts with the ahb_dma_clk gate bit,
the core was disabling the DMA engine clock as part of its 'disable
unused clks' procedure, which was causing all DMA transfers to fail after
this point.
Fixes: 5e73761786 ("clk: sunxi-ng: Add sun5i CCU driver")
Cc: stable@vger.kernel.org
Reported-by: Angus Ainslie <angus@akkea.ca>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1495643669-28221-1-git-send-email-boris.brezillon@free-electrons.com
We depend on intel_iommu_gfx_mapped for various workarounds, but that is
only available under an #ifdef CONFIG_INTEL_IOMMU. Refactor all the
cut-and-paste ifdefs to a common routine.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20170525121612.2190-1-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
As only GGTT vma may be permanently pinned and are always at the head of
the object's vma list, as soon as we seen a ppGTT vma we can stop
searching for any_vma_pinned().
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170525072528.11185-1-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Babu Moger says:
====================
Enable queued rwlock and queued spinlock for SPARC
This series of patches enables queued rwlock and queued spinlock support
for SPARC. These features were introduced some time ago in upstream.
Here are some of the earlier discussions.
https://lwn.net/Articles/572765/https://lwn.net/Articles/582200/https://lwn.net/Articles/561775/https://lwn.net/Articles/590243/
Tests: Ran AIM7 benchmark to verify the performance on various workloads.
https://github.com/davidlohr/areaim. Same benchmark was used when this
feature was introduced and enabled on x86. Here are the test results.
Kernel 4.11.0-rc6 4.11.0-rc6 + Change
baseline queued locks
(Avg No.of jobs) (Avg No.of jobs)
Workload
High systime 10-100 user 17290.48 17295.18 +0.02
High systime 200-1000 users 109814.95 110248.87 +0.39
High systime 1200-2000 users 107912.40 127923.16 +18.54
Disk IO 10-100 users 168910.16 158834.17 -5.96
Disk IO 200-1000 users 242781.74 281285.80 +15.85
Disk IO 1200-2000 users 228518.23 218421.23 -4.41
Disk IO 10-100 users 183933.77 207928.67 +13.04
Disk IO 200-1000 users 491981.56 500162.33 +1.66
Disk IO 1200-2000 users 463395.66 467312.70 +0.84
fserver 10-100 users 254177.53 270283.08 +6.33
fserver IO 200-1000 users 269017.35 324812.2 +20.74
fserver IO 1200-2000 users 229538.87 284713.77 +24.03
Disk I/O results are little bit in negative territory. But majority of the
performance changes are in positive and it is significant in some cases.
Changes:
v3 -> v4:
1. Took care of Geert Uytterhoeven's comment about patch #3(def_bool y)
2. Working on separate patch sets to define CPU_BIG_ENDIAN for all the
default big endian architectures based on feedback from Geert and Arnd.
v2 -> v3:
1. Rebased the patches on top of 4.12-rc2.
2. Re-ordered the patch #1 and patch #2. That is the same order I have seen
the issues. So, it should be addressed in the same order. Patch #1 removes
the check __LINUX_SPINLOCK_TYPES_H. Patch #2 addreses the compile error
with qrwlock.c. This addresses the comments from Dave Miller on v2.
v1 -> v2:
Addressed the comments from David Miller.
1. Added CPU_BIG_ENDIAN for all SPARC
2. Removed #ifndef __LINUX_SPINLOCK_TYPES_H guard from spinlock_types.h
3. Removed check for CONFIG_QUEUED_RWLOCKS in SPARC64 as it is the
default definition for SPARC64 now. Cleaned-up the previous arch_read_xxx
and arch_write_xxx definitions as it is defined now in qrwlock.h.
4. Removed check for CONFIG_QUEUED_SPINLOCKS in SPARC64 as it is the default
definition now for SPARC64 now. Cleaned-up the previous arch_spin_xxx
definitions as it is defined in qspinlock.h.
v1: Initial version
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch makes the necessary changes in SPARC architecture to enable
queued spinlock support. Here are some of the earlier discussions about
this feature.
https://lwn.net/Articles/561775/https://lwn.net/Articles/590243/
Cleaned-up the spinlock_64.h. The definitions of arch_spin_xxx are
replaced by the function in <asm-generic/qspinlock.h>
Signed-off-by: Babu Moger <babu.moger@oracle.com>
Reviewed-by: Håkon Bugge <haakon.bugge@oracle.com>
Reviewed-by: Jane Chu <jane.chu@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
SPARC supports 32 bit and 64 bit xchg right now. Add the support
for 16 bit (2 byte) xchg. This is required to support queued spinlock
feature which uses 2 byte xchg. This is achieved using 4 byte cas
instructions with byte manipulations.
Also re-arranged the code to call __cmpxchg_u32 inside xchg16.
Signed-off-by: Babu Moger <babu.moger@oracle.com>
Reviewed-by: Håkon Bugge <haakon.bugge@oracle.com>
Reviewed-by: Steven Sistare <steven.sistare@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Reviewed-by: Jane Chu <jane.chu@oracle.com>
Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Enable queued rwlocks for SPARC. Here are the discussions on this feature
when this was introduced.
https://lwn.net/Articles/572765/https://lwn.net/Articles/582200/
Cleaned-up the arch_read_xxx and arch_write_xxx definitions in spinlock_64.h.
These routines are replaced by the functions in include/asm-generic/qrwlock.h
Signed-off-by: Babu Moger <babu.moger@oracle.com>
Reviewed-by: Håkon Bugge <haakon.bugge@oracle.com>
Reviewed-by: Jane Chu <jane.chu@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
SPARC supports 32 bit and 64 bit cmpxchg right now. Add support
for 8 bit (1 byte) cmpxchg. This is required to support queued
rwlocks feature which uses 1 byte cmpxchg.
The function __cmpxchg_u8 here uses the 4 byte cas instruction with a
byte manipulation to achieve 1 byte cmpxchg.
Signed-off-by: Babu Moger <babu.moger@oracle.com>
Reviewed-by: Håkon Bugge <haakon.bugge@oracle.com>
Reviewed-by: Steve Sistare <steven.sistare@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Reviewed-by: Jane Chu <jane.chu@oracle.com>
Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Found this problem while enabling queued rwlock on SPARC.
The parameter CONFIG_CPU_BIG_ENDIAN is used to clear the
specific byte in qrwlock structure. Without this parameter,
we clear the wrong byte. Here is the code.
static inline u8 *__qrwlock_write_byte(struct qrwlock *lock)
{
return (u8 *)lock + 3 * IS_BUILTIN(CONFIG_CPU_BIG_ENDIAN);
}
Define CPU_BIG_ENDIAN for SPARC to fix it.
Signed-off-by: Babu Moger <babu.moger@oracle.com>
Reviewed-by: Håkon Bugge <haakon.bugge@oracle.com>
Reviewed-by: Jane Chu <jane.chu@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Saw these compile errors on SPARC when queued rwlock feature is enabled.
CC kernel/locking/qrwlock.o
kernel/locking/qrwlock.c: In function ‘queued_read_lock_slowpath’:
kernel/locking/qrwlock.c:89: error: implicit declaration of function ‘arch_spin_lock’
kernel/locking/qrwlock.c:102: error: implicit declaration of function ‘arch_spin_unlock’
make[4]: *** [kernel/locking/qrwlock.o] Error 1
Include spinlock.h in qrwlock.c to fix it.
Signed-off-by: Babu Moger <babu.moger@oracle.com>
Reviewed-by: Håkon Bugge <haakon.bugge@oracle.com>
Reviewed-by: Jane Chu <jane.chu@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Reviewed-by: Vijay Kumar <vijay.ac.kumar@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Saw these compile errors on SPARC when queued rwlock feature is enabled.
CC kernel/locking/qrwlock.o
In file included from ./include/asm-generic/qrwlock_types.h:5,
from ./arch/sparc/include/asm/qrwlock.h:4,
from kernel/locking/qrwlock.c:24:
./arch/sparc/include/asm/spinlock_types.h:5:3: error:
#error "please don't include this file directly"
SPARC has this guard which causes compile error when spinlock_types.h
is included directly.
@ifndef __LINUX_SPINLOCK_TYPES_H
@ error "please don't include this file directly"
@endif
Remove this un-necessary "ifndef __LINUX_SPINLOCK_TYPES_H" stanza from SPARC.
Signed-off-by: Babu Moger <babu.moger@oracle.com>
Suggested-by: David Miller <davem@davemloft.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
In the loadbalance arp monitoring scheme, when a slave link change is
detected, the slave->link is immediately updated and slave_state_changed
is set. Later down the function, the rtnl_lock is acquired and the
changes are committed, updating the bond link state.
However, the acquisition of the rtnl_lock can fail. The next time the
monitor runs, since slave->link is already updated, it determines that
link is unchanged. This results in the bond link state permanently out
of sync with the slave link.
This patch modifies bond_loadbalance_arp_mon() to handle link changes
identical to bond_ab_arp_{inspect/commit}(). The new link state is
maintained in slave->new_link until we're ready to commit at which point
it's copied into slave->link.
NOTE: miimon_{inspect/commit}() has a more complex state machine
requiring the use of the bond_{propose,commit}_link_state() functions
which maintains the intermediate state in slave->link_new_state. The arp
monitors don't require that.
Testing: This bug is very easy to reproduce with the following steps.
1. In a loop, toggle a slave link of a bond slave interface.
2. In a separate loop, do ifconfig up/down of an unrelated interface to
create contention for rtnl_lock.
Within a few iterations, the bond link goes out of sync with the slave
link.
Signed-off-by: Nithin Nayak Sujir <nsujir@tintri.com>
Cc: Mahesh Bandewar <maheshb@google.com>
Cc: Jay Vosburgh <jay.vosburgh@canonical.com>
Acked-by: Mahesh Bandewar <maheshb@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Suresh Reddy says:
====================
be2net: patch-set
Hi Dave, Please consider applying these two patches to net-next
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
