We have been testing wrong variable when trying to make sure that input
allocation succeeded.
Reported by Coverity (CID 1295918).
Acked-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Several lines touched by the pr_foo refactoring patches are not
following the Linux Coding style.
While we won't be fixing the style globally at the driver, we should,
at least, fix on the lines we touched.
Basically, this patch add (or remove) whitespaces and blank lines
where needed.
No functional changes.
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
The debug macros are not properly defined, as they generate warnings
like:
ERROR: Macros with complex values should be enclosed in parentheses
+#define core_dbg(fmt, arg...) if (core_debug) \
+ printk(KERN_DEBUG pr_fmt("core: " fmt), ## arg)
Use do { } while (0) for those macros.
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
TUSB1210 ULPI PHY has vendor specific register for eye
diagram tuning. On some platforms the system firmware has
set optimized value to it. In order to not loose the
optimized value, the driver stores it during probe and
restores it every time the PHY is powered back on.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
ULPI PHYs need to be bound to their controllers with a
lookup. This adds helpers that the ULPI drivers can use to
do both, the registration of the PHY and the lookup, at the
same time.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Registers DWC3's ULPI interface with the ULPI bus when it's
available.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
On some BYT platforms the USB2 PHY needs to be put into
operational mode by the controller driver with GPIOs
controlling the PHYs reset and cs signals.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Platforms that have configured DWC_USB3_HSPHY_INTERFACE with
value 3, i.e. UTMI+ and ULPI, need to inform the driver of
the actual HSPHY interface type with the property. "utmi" if
the interface is UTMI+ or "ulpi" if the interface is ULPI.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This allows dwc3_phy_setup() to be more useful later. There
is nothing preventing the PHY configuration registers from
being programmed early. They do not loose their context in
soft reset.
There are however other PHY related operations that should
be executed before the driver request handles to the PHYs,
such as registering DWC3's ULPI interface, which can now be
done in dwc3_phy_setup().
Also, if there ever was need for the two 100ms delays in
dwc3_phy_setup() there isn't anymore. The PHYs are now reset
after the PHY interfaces are setup.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
So it can be called from other places later.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
So they are available when ULPI interface support is added.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
We need to store it before phys are handled, so we can later
use it in ULPI interface support code.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Make selection between ULPI and UTMI+ interfaces possible by
providing definition for the bit in Global USB2 PHY
Configuration Register that controls it.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Definitions for Global USB2 PHY Vendor Control Register
bits. We will need them to access ULPI PHY registers later.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
UTMI+ Low Pin Interface (ULPI) is a commonly used PHY
interface for USB 2.0. The ULPI specification describes a
standard set of registers which the vendors can extend for
their specific needs. ULPI PHYs provide often functions
such as charger detection and ADP sensing and probing.
There are two major issues that the bus type is meant to
tackle:
Firstly, ULPI registers are accessed from the controller.
The bus provides convenient method for the controller
drivers to share that access with the actual PHY drivers.
Secondly, there are already platforms that assume ULPI PHYs
are runtime detected, such as many Intel Baytrail based
platforms. They do not provide any kind of hardware
description for the ULPI PHYs like separate ACPI device
object that could be used to enumerate a device from.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
commit db62b9a804 (usb: dwc2: host: don't
use dma_alloc_coherent with irqs disabled)
introduced a build warning by using NULL
as an integer. Fix that by just using 0 instead
of NULL.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Update bcm63138.dtsi with the following:
- enable-method for both CPU nodes
- brcm,bcm63138-bootlut node
- resets properties to point to the correct PMB controller to release
the secondary CPU from reset
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add binding documentation for the additional nodes and properties
required to get the secondary CPU online on the BCM63138 SoC.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add the two BCM63138 PMB busses nodes found on this System-on-a-Chip as
described in their corresponding binding document.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Add a Device Tree binding for the Broadcom BCM63138 Processor Monitor
Bus, which is an internal bus used to access different power and reset
signals within a BCM63138 System-on-a-Chip.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Scott Feldman says:
====================
switchdev: more (minor) cleanups
Fix some sparse warnings and include some documentation review comments that
didn't get picked up in the switchdev Spring Cleanup series.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
There were a few review comments on the switchdev.txt documentation that
didn't get included with the Spring Cleanup series, so include them now.
Signed-off-by: Scott Feldman <sfeldma@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
And let driver convert it to host-byte order as needed.
Signed-off-by: Scott Feldman <sfeldma@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
HKEY_DATALEN remains defined after first inclusion
of ip_set_hash_gen.h, so it is incorrectly reused
for IPv6 code.
Undefine HKEY_DATALEN in ip_set_hash_gen.h at the end.
Also remove some useless defines of HKEY_DATALEN in
ip_set_hash_{ip{,mark,port},netiface}.c as ip_set_hash_gen.h
defines it correctly for such set types anyway.
Signed-off-by: Sergey Popovich <popovich_sergei@mail.ua>
Signed-off-by: Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
So pointers returned by these macros could be
referenced with -> directly.
Signed-off-by: Sergey Popovich <popovich_sergei@mail.ua>
Signed-off-by: Jozsef Kadlecsik <kadlec@blackhole.kfki.hu>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
hrtimer_start() will no longer defer already expired timers to the
softirq in 4.2, and the __hrtimer_start_range_ns() function is
getting removed, causing build errors when both the tip tree and
the arm-ccn changes are merged.
This changes the code back to using hrtimer_start, which will
do the right thing after this branch gets merged with the
timers update from tip.
As pointed out after a discussion on the mailing list, the result will
not be worse than the what was there before you pulled my updates, as
the code was using normal hrtimer_start(). It's just when I realised
that it should be pinned I looked at what x86 uncore pmu is doing and
shamelessly (and probably a bit mindlessly) copied the "do not wakeup"
version from there.
[arnd: update commit message]
Reported-by: Mark Brown <mark.brown@arm.com>
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a set of changes to the Tegra default configuration that enable
various new features (HDMI audio, watchdog) on Toradex Apalis T30.
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Merge tag 'tegra-for-4.2-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/defconfig
Merge "ARM: tegra: Default configuration updates for v4.2-rc1" from Thierry Reding:
This is a set of changes to the Tegra default configuration that enable
various new features (HDMI audio, watchdog) on Toradex Apalis T30.
* tag 'tegra-for-4.2-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Update default configuration
Contains a couple of fixes and additions to device tree files. The most
notable change is a fix for a misapplied patch that was only exposed by
a recent change in the regulator subsystem that caused USB to break on
Tegra124 recently.
Other than that there are a more or less random assortment of additions
to enable various features on a couple of boards.
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Merge tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Devicetree changes for v4.2-rc1" from Thierry Reding:
Contains a couple of fixes and additions to device tree files. The most
notable change is a fix for a misapplied patch that was only exposed by
a recent change in the regulator subsystem that caused USB to break on
Tegra124 recently.
Other than that there are a more or less random assortment of additions
to enable various features on a couple of boards.
* tag 'tegra-for-4.2-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Fix hda2codec_2x clock and reset names
ARM: tegra: Add Tegra30 HDA support
ARM: tegra: Cardhu device-tree comment spelling fix
ARM: tegra: venice2: Set min-/max-microvolt for VDD_LED supply
ARM: tegra: venice2: Mark eMMC as non-removable
ARM: tegra: jetson-tk1: Enable HDA support
ARM: tegra: Add missing HDMI +5V regulator
ARM: tegra: cardhu: Add power and volume keys
ARM: tegra: Correct which USB controller has the UTMI pad registers
A couple of changes to the core SoC support code. Perhaps the most
important part is a fix for a regression in LP1 suspend/resume code that
was introduced a while back.
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Merge tag 'tegra-for-4.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
Merge "ARM: tegra: Core SoC changes for v4.2-rc1" from Thierry Reding:
A couple of changes to the core SoC support code. Perhaps the most
important part is a fix for a regression in LP1 suspend/resume code that
was introduced a while back.
* tag 'tegra-for-4.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: move to using a restart handler
ARM: tegra20: Store CPU "resettable" status in IRAM
soc/tegra: Watch wait_for_completion_timeout() return type
The RAM code is used by the memory and external memory controllers to
determine which set of timings to use for memory frequency scaling.
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Merge tag 'tegra-for-4.2-ramcode' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "ARM: tegra: RAM code access for v4.2-rc1" from Thierry Reding:
The RAM code is used by the memory and external memory controllers to
determine which set of timings to use for memory frequency scaling.
* tag 'tegra-for-4.2-ramcode' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: fuse: Add RAM code reader helper
of: Document long-ram-code property in nvidia,tegra20-apbmisc
Adds support for Tegra132 (which is mostly the same as for Tegra124,
except for cache maintenance). debugfs support is also introduced for
the SMMU part of the memory controller, which allows users to inspect
the translation state for SWGROUPs and memory clients.
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Merge tag 'tegra-for-4.2-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "ARM: tegra: Memory controller updates for v4.2-rc1" from Thierry Reding:
Adds support for Tegra132 (which is mostly the same as for Tegra124,
except for cache maintenance). debugfs support is also introduced for
the SMMU part of the memory controller, which allows users to inspect
the translation state for SWGROUPs and memory clients.
* tag 'tegra-for-4.2-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
memory: tegra: Disable ARBITRATION_EMEM interrupt
memory: tegra: Add Tegra132 support
iommu/tegra-smmu: Add debugfs support
memory: tegra: Add SWGROUP names
Just a couple of trivial cleanups such as a typofix and conversion of
hexadecimal numbers to all lower-case in DTS files for consistency.
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Merge tag 'tegra-for-4.2-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup
Merge "ARM: tegra: Cleanup patches for v4.2-rc1" from Thierry Reding:
Just a couple of trivial cleanups such as a typofix and conversion of
hexadecimal numbers to all lower-case in DTS files for consistency.
* tag 'tegra-for-4.2-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Fix typo (reset -> rest) in comment
ARM: tegra: Use lower-case hexadecimal digits
- Add big endian support
- Add earlyprintk support on UART1 that is used on Arria10
- Remove the need to map uart_io_desc
- Use of_iomap to map the SCU
- Remove socfpga_smp_init_cpus as arm_dt_init_cpu_maps is already doing
the CPU mapping.
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Merge tag 'socfpga_updates_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/soc
Merge "SoCFPGA updates for v4.2" from Dinh Nguyen:
- Add big endian support
- Add earlyprintk support on UART1 that is used on Arria10
- Remove the need to map uart_io_desc
- Use of_iomap to map the SCU
- Remove socfpga_smp_init_cpus as arm_dt_init_cpu_maps is already doing
the CPU mapping.
* tag 'socfpga_updates_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: use of_iomap to map the SCU
ARM: socfpga: remove the need to map uart_io_desc
ARM: socfpga: Add support for UART1 debug uart for earlyprintk
ARM: socfpga: support big endian for socfpga
ARM: socfpga: enable big endian for secondary core(s)
ARM: debug: fix big endian operation for 8250 word mode
- Add a DTS node for the A9 SCU
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Merge tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
Merge "SoCFPGA update for v4.2 part 2" from Dinh Nguyen:
- Add a DTS node for the A9 SCU
* tag 'socfpga_dts_for_v4.2_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: dts: add the a9-scu node
the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288
boards, as well as some usb properties and marking the radxarock pmic
as system-power-controller.
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Merge tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: dts changes for 4.2" from Heiko Stuebner:
Some misc improvements defining additional supply regulators, enabling
the Cortex-A12 HW PMU on the rk3288 and the tsadc on some more rk3288
boards, as well as some usb properties and marking the radxarock pmic
as system-power-controller.
* tag 'v4.2-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add system-power-controller to act8846 on radxarock
ARM: dts: rockchip: add properties for dwc2 usb otg controller
ARM: dts: rockchip: enable tsadc on rk3288 boards
ARM: dts: rockchip: add act8846 supplies on rk3288-firefly
ARM: dts: rockchip: Specify VMMC and VQMMC on rk3288-evb
ARM: dts: rockchip: Enable Cortex-A12 HW PMU events on rk3288
Now that the axp20x-regulators driver supports different variants of the
AXP family, we can enable regulator support for AXP22X without the risk
of incorrectly configuring regulators.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add the list of regulators for AXP22x to the DT bindings.
This includes the names and supply names.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add AXP22X regulator definitions and variant id associations.
This introduces a new "switch" type output for one of the regulators.
It is a switchable secondary output of one regulator, with the same
voltage level as the primary output.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
[wens@csie.org: Moved variant choosing to multi family support patch]
[wens@csie.org: Add dc-dc work frequency range]
[wens@csie.org: Add "switch" type output regulator DC1SW]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Rework the AXP20X_ macros and probe function to support the several chip
families, so that each family can define it's own set of regulators.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
[wens@csie.org: Support different DC-DC work frequency ranges]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add AXP221 to the list of supported devices.
Also replace any mention of AXP20x in the document with a
generic "PMIC".
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add support for the AXP22x PMIC devices to the existing AXP20x driver.
This includes the AXP221 and AXP223, which are identical except for
the external data bus. Only AXP221 is added for now. AXP223 will be
added after it's Reduced Serial Bus (RSB) interface is supported.
AXP22x defines a new set of registers, power supplies and regulators,
but most of the API is similar to the AXP20x ones.
A new irq chip definition is used, even though the available interrupts
on AXP22x is a subset of those on AXP20x. This is done so the interrupt
numbers match those on the datasheet.
This patch only enables the interrupts, system power-off function, and PEK
sub-device. The regulator driver must first support different variants
before we enable it from the mfd driver.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
[wens@csie.org: fix interrupts and move regulators to separate patch]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
