This patch introduces tdls without tdls peer uapsd and tdls channel switching.
Transmitting tdls data frames works only for ethernet type frames, that's why
data addressed to tdls sta is in ethernet format.
This patch depends on commit c23e31cf7b ("mac80211: initialize rate control
earlier for tdls station").
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Marek Kwaczynski <marek.kwaczynski@tieto.com>
Signed-off-by: Marek Puzyniak <marek.puzyniak@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
As a part of tdls implementation introduce
tdls related wmi data structures, constant
values and functions.
Signed-off-by: Marek Puzyniak <marek.puzyniak@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Currently station counting functions
(inc_num_stations/dec_num_stations) does not handle
tdls type of stations. Tdls station should be counted
because it consumes peer in firmware. Only not tdls
stations are excluded from this counting.
Signed-off-by: Marek Puzyniak <marek.puzyniak@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Currently number of tdls vdevs supported by firmware
is hardcoded. For future usage it is stored in ath10k
structure based on defined value.
Signed-off-by: Marek Puzyniak <marek.puzyniak@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Peer type was hardcoded to default value.
For future implementation it is required
to make is configurable.
Signed-off-by: Marek Puzyniak <marek.puzyniak@tieto.com>
Signed-off-by: Marek Kwaczynski <marek.kwaczynski@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
There are a few different tx paths depending on
firmware and frame itself.
Creating a uniform decision will make it possible
to switch between different txmode easier, both
for testing and for future features as well.
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Marek Puzyniak <marek.puzyniak@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
If htt.freq isn't cleared and contains garbage fw
may discard tx packets. Prevent this from
happening by clearing htt.freq properly.
Possible manifestation of the problem could be not
being able to send auth request/response frames on
firmware with HTT >= 3.4 (when freq param was
introduced), e.g. on qca6174.
Fixes: 8d6d362436 ("ath10k: fix offchan reliability")
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Commit 8348db2984 ("ath10k: add ATH10K_FW_IE_HTT_OP_VERSION") broke QCA6174
receive side as the HTT ids from ATH10K_FW_HTT_OP_VERSION_MAIN don't have
HTT_TLV_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND set. Fix this by adding a backwards
compatibility code which sets HTT op version if it's not set by the firmware
image.
Fixes: 8348db2984 ("ath10k: add ATH10K_FW_IE_HTT_OP_VERSION")
Reported-by: Michal Kazior <michal.kazior@tieto.com>
Tested-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This is a I2C driver, so it's wrong to use platform prefix for the
modalias. We have all needed i2c aliases coming form MODULE_DEVICE_TABLE,
so let's remove the wrong and unneeded "platform:twl6040" modalias.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Given that sizeof(long) is now always 8, we can simplify syscall_get_arch()
a bit.
Just another piece I didn't find when removing 31 bit support.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This patch adds some not yet defined pinfunctions. It also adds two
comments about mistakes in the i.MX25 reference manual so it is easier
to spot the difference between reference manual and pinfunction
definitions.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
While adding the MSCM interrupt router, all interrupts have been moved
to vfxxx.dtsi again. However, some properties got lost. Readd the
missing interrupt properties.
Fixes: 97e6466ab9d0 ("ARM: dts: vf610: add Miscellaneous System Control
Module (MSCM)")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The Cubox has a recessed button between the HDMI and RJ-45 connectors
that wasn't mapped in the device tree, so I've mapped it to gpio-keys
BTN_0.
Signed-off-by: George Joseph <george.joseph@fairview5.com>
Tested-by: George Joseph <george.joseph@fairview5.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Enable a few useful options in our defconfig:
- New platform support (exynos7, seattle, tegra132)
- SKY2 (ethernet in newer revisions of Juno)
- Xgene reboot support
- Virtio-pci for kvmtool and qemu
- EFIVAR_FS (previously selected as a module)
- NFSv4
Signed-off-by: Will Deacon <will.deacon@arm.com>
This adds documentation for the PMIC wrapper unit found on Mediatek
SoCs. Currently support are the MT8135 and MT8173 SoCs, but the PMIC
wrapper can also be found on MT6xxx and possibly other SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This adds support for the PMIC wrapper found on MediaTek MT8135 and
MT8173 SoCs. The PMIC wrapper is found on MT6xxx SoCs aswell but these
are currently not supported.
On MediaTek MT8135, MT8173 and other SoCs the PMIC is connected via
SPI. The SPI master interface is not directly visible to the CPU, but
only through the PMIC wrapper inside the SoC. The communication between
the SoC and the PMIC can optionally be encrypted. Also a non standard
Dual IO SPI mode can be used to increase speed. The MT8135 also supports
a special feature named "IP Pairing". With IP Pairing the pins of some
SoC internal peripherals can be on the PMIC. The signals of these pins
are routed over the SPI bus using the pwrap bridge. Because of these
optional non SPI conform features the PMIC driver is not implemented as
a SPI bus master driver.
Signed-off-by: Flora Fu, MediaTek
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
As we detect more architectural features at runtime, it makes
sense to reuse the existing framework whilst avoiding to call
a feature an erratum...
This patch extract the core capability parsing, moves it into
a new file (cpufeature.c), and let the CPU errata detection code
use it.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Since all immediate branches are PC-relative on Aarch64, these
instructions cannot be used as an alternative with the simplistic
approach we currently have (the immediate has been computed from
the .altinstr_replacement section, and end-up being completely off
if we insert it directly).
This patch handles the b and bl instructions in a different way,
using the insn framework to recompute the immediate, and generate
the right displacement.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Patching an instruction sometimes requires extracting the immediate
field from this instruction. To facilitate this, and avoid
potential duplication of code, add aarch64_insn_decode_immediate
as the reciprocal to aarch64_insn_encode_immediate.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
This adds a new file, tegra124-nyan-blaze-emc.dtsi that contains
valid timings for the EMC memory clock. The file is included to the
main device tree file for the Nyan Blaze.
The frequency 528MHz is missing because we don't currently have a timing
configuration that works.
Additionally, only the timings for the ram-code 1 is present as that's
what could be tested currently, though downstream has timings for more
ram-codes.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds a new file, tegra124-nyan-big-emc.dtsi that contains
valid timings for the EMC memory clock. The file is included to the
main device tree file for the Nyan Big.
The frequency 528MHz is missing because we don't currently have a timing
configuration that works.
Additionally, only the timings for the ram-code 1 is present as that's
what could be tested currently, though downstream has timings for more
ram-codes.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds a new file, tegra124-jetson-tk1-emc.dtsi that contains
valid timings for the EMC memory clock. The file is included to the
main Jetson TK1 device tree.
The data is generated from the V5.0.17 version of the DVFS tables.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds a node for the EMC memory controller. It is always enabled, but only
provides read-only functionality without board-specific timing tables.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This block gathers statistics about various counters and can be configured to
fire interrupts when thresholds are crossed.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
[treding@nvidia.com: rename document, minor cleanups]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Users of the atomic state assume that if the pointer to a crtc, plane or
connector is not NULL in the respective object vector, than the state
for that object in *_states vector also won't be NULL. That assumption
was broken by drm_atomic_state_clear(), which would clear the state
pointer but leave the pointer to the object still set.
This fixes a NULL pointer dereference in i915 caused by the use of
drm_atomic_state_clear().
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Some of the PMIC's could have specific regmap configuration
tables in future, so add specific compatible strings for known
PMIC's. Also print runtime detected chip revision information.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Replace duplicated const keyword for 'axp20x_model_names' with proper
array of const pointers to const strings.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Drop support for SW controlled VCORE, nobody uses it.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
gpio_defaults needs to be specified as an unsigned int rather than an
int, because the intention of the DT binding is that all out of range
values for a 16-bit register will cause the defaults to be used,
however, if gpio_defaults is an int then values that are larger than
INT_MAX will become negative numbers and be written out directly to the
hardware. As no where in the code replies on gpio_defaults being an int,
the simplest fix is to just change it to unsigned.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This patch just sorts IDs in the table for better maintenance. There is no
functional change.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
These are mandated by IEEE802.11-2012 section 8.5.8.6 and IEEE802.11ac-2013
section 8.5.8.16.
Signed-off-by: Arik Nemtsov <arikx.nemtsov@intel.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Add VHT support for IBSS. Drivers could activate
this feature by setting NL80211_EXT_FEATURE_VHT_IBSS
flag.
Signed-off-by: Janusz Dziedzic <janusz.dziedzic@tieto.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
In case of wide bandwidth (wider than 20MHz) used by IBSS,
scan all channels in chandef to be able to find neighboring
IBSS netwqworks that use the same overall channels but a different
control channel.
Signed-off-by: Janusz Dziedzic <janusz.dziedzic@tieto.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
In order to look up the RA station earlier to implement a TX
fastpath, factor out the lookup from ieee80211_build_hdr().
To always have a valid station pointer, also move some of the
checks into the new function.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Indicating just the peer's capability is fairly pointless
if the local device doesn't support it. Make the variable
track both combined, and remove the 'local support' check
in the TX path.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Louis reported that a static checker was complaining that
the 'dst' variable was set (multiple times) but not used.
This is due to a previous commit having removed the usage
(apparently erroneously), so add it back.
Fixes: a344d6778a ("mac80211: allow drivers to support NL80211_SCAN_FLAG_RANDOM_ADDR")
Reported-by: Louis Langholtz <lou_langholtz@me.com>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Setup pwm lines as follows -
pwm1: In case HummingBoard base carrier; this pin drives through a serial
capacitor the mono out of the audio jack.
In case HummingBoard pro the this pad can be reached by wiring to
C8 capacitors on the board.
pwm2: Setup pwm2 on gpio-1 but leave the default function of the iopad as
a gpio.
The user can change the io pad mux in user space and therefore use
this function on gpio-1 (pin number 7 on the 26 pin header).
pwm3,pwm4: unused
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
[tweaked alias for pwm pinctrl group --rmk]
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Enable the commented out PCF8523 RTC support for Hummingboard pro
base boards.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It may be useful to disable the internal snvs-rtc when an external rtc is
available. This patch adds a label so that dts files can disable it.
Based on a patch from Markus Pargmann for imx6qdl.dtsi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It may be useful to disable the internal snvs-rtc when an external rtc is
available. This patch adds a label so that dts files can disable it.
Based on a patch from Markus Pargmann for imx6qdl.dtsi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Now that the GPC has been converted to be a full blown irqchip
(and not a mole on the side of the GIC), booting a new kernel
with an old DT is likely to result in a rough ride for the user.
This patch makes sure such a situation is promptly detected and
the user made aware that a DT update is in order.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
While converting the GPC code to a stacked irqchip, we lost the
possibility to change the CPU affinity of an interrupt routed
through the GPC.
This patch restore the expected behaviour by forwarding the
affinity setup to the underlying irqchip (GIC).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
